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Merge remote-tracking branch 'xenia-master/master' into edge

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This commit is contained in:
Herman S.
2026-02-18 23:21:17 +09:00
parent 32aff9af0d 80dad41454
commit b3e36b2af0
48 changed files with 1109 additions and 1576 deletions
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src/xenia/gpu/d3d12/d3d12_command_processor.cc
-78
View File
@@ -616,48 +616,6 @@ D3D12CommandProcessor::GetSystemBindlessViewHandlePair(
view_bindless_heap_gpu_start_, uint32_t(view)));
}
ui::d3d12::util::DescriptorCpuGpuHandlePair
D3D12CommandProcessor::GetSharedMemoryUintPow2BindlessSRVHandlePair(
uint32_t element_size_bytes_pow2) const {
SystemBindlessView view;
switch (element_size_bytes_pow2) {
case 2:
view = SystemBindlessView::kSharedMemoryR32UintSRV;
break;
case 3:
view = SystemBindlessView::kSharedMemoryR32G32UintSRV;
break;
case 4:
view = SystemBindlessView::kSharedMemoryR32G32B32A32UintSRV;
break;
default:
assert_unhandled_case(element_size_bytes_pow2);
view = SystemBindlessView::kSharedMemoryR32UintSRV;
}
return GetSystemBindlessViewHandlePair(view);
}
ui::d3d12::util::DescriptorCpuGpuHandlePair
D3D12CommandProcessor::GetSharedMemoryUintPow2BindlessUAVHandlePair(
uint32_t element_size_bytes_pow2) const {
SystemBindlessView view;
switch (element_size_bytes_pow2) {
case 2:
view = SystemBindlessView::kSharedMemoryR32UintUAV;
break;
case 3:
view = SystemBindlessView::kSharedMemoryR32G32UintUAV;
break;
case 4:
view = SystemBindlessView::kSharedMemoryR32G32B32A32UintUAV;
break;
default:
assert_unhandled_case(element_size_bytes_pow2);
view = SystemBindlessView::kSharedMemoryR32UintUAV;
}
return GetSystemBindlessViewHandlePair(view);
}
ui::d3d12::util::DescriptorCpuGpuHandlePair
D3D12CommandProcessor::GetEdramUintPow2BindlessSRVHandlePair(
uint32_t element_size_bytes_pow2) const {
@@ -1705,46 +1663,10 @@ bool D3D12CommandProcessor::SetupContext() {
shared_memory_->WriteRawSRVDescriptor(provider.OffsetViewDescriptor(
view_bindless_heap_cpu_start_,
uint32_t(SystemBindlessView::kSharedMemoryRawSRV)));
// kSharedMemoryR32UintSRV.
shared_memory_->WriteUintPow2SRVDescriptor(
provider.OffsetViewDescriptor(
view_bindless_heap_cpu_start_,
uint32_t(SystemBindlessView::kSharedMemoryR32UintSRV)),
2);
// kSharedMemoryR32G32UintSRV.
shared_memory_->WriteUintPow2SRVDescriptor(
provider.OffsetViewDescriptor(
view_bindless_heap_cpu_start_,
uint32_t(SystemBindlessView::kSharedMemoryR32G32UintSRV)),
3);
// kSharedMemoryR32G32B32A32UintSRV.
shared_memory_->WriteUintPow2SRVDescriptor(
provider.OffsetViewDescriptor(
view_bindless_heap_cpu_start_,
uint32_t(SystemBindlessView::kSharedMemoryR32G32B32A32UintSRV)),
4);
// kSharedMemoryRawUAV.
shared_memory_->WriteRawUAVDescriptor(provider.OffsetViewDescriptor(
view_bindless_heap_cpu_start_,
uint32_t(SystemBindlessView::kSharedMemoryRawUAV)));
// kSharedMemoryR32UintUAV.
shared_memory_->WriteUintPow2UAVDescriptor(
provider.OffsetViewDescriptor(
view_bindless_heap_cpu_start_,
uint32_t(SystemBindlessView::kSharedMemoryR32UintUAV)),
2);
// kSharedMemoryR32G32UintUAV.
shared_memory_->WriteUintPow2UAVDescriptor(
provider.OffsetViewDescriptor(
view_bindless_heap_cpu_start_,
uint32_t(SystemBindlessView::kSharedMemoryR32G32UintUAV)),
3);
// kSharedMemoryR32G32B32A32UintUAV.
shared_memory_->WriteUintPow2UAVDescriptor(
provider.OffsetViewDescriptor(
view_bindless_heap_cpu_start_,
uint32_t(SystemBindlessView::kSharedMemoryR32G32B32A32UintUAV)),
4);
// kEdramRawSRV.
render_target_cache_->WriteEdramRawSRVDescriptor(
provider.OffsetViewDescriptor(
src/xenia/gpu/d3d12/d3d12_command_processor.h
-13
View File
@@ -176,13 +176,6 @@ class D3D12CommandProcessor final : public CommandProcessor {
kNullRawSRV = kNullRawSRVAndSharedMemoryRawUAVStart,
kSharedMemoryRawUAV,
kSharedMemoryR32UintSRV,
kSharedMemoryR32G32UintSRV,
kSharedMemoryR32G32B32A32UintSRV,
kSharedMemoryR32UintUAV,
kSharedMemoryR32G32UintUAV,
kSharedMemoryR32G32B32A32UintUAV,
kEdramRawSRV,
kEdramR32UintSRV,
kEdramR32G32UintSRV,
@@ -208,12 +201,6 @@ class D3D12CommandProcessor final : public CommandProcessor {
ui::d3d12::util::DescriptorCpuGpuHandlePair GetSystemBindlessViewHandlePair(
SystemBindlessView view) const;
ui::d3d12::util::DescriptorCpuGpuHandlePair
GetSharedMemoryUintPow2BindlessSRVHandlePair(
uint32_t element_size_bytes_pow2) const;
ui::d3d12::util::DescriptorCpuGpuHandlePair
GetSharedMemoryUintPow2BindlessUAVHandlePair(
uint32_t element_size_bytes_pow2) const;
ui::d3d12::util::DescriptorCpuGpuHandlePair
GetEdramUintPow2BindlessSRVHandlePair(uint32_t element_size_bytes_pow2) const;
ui::d3d12::util::DescriptorCpuGpuHandlePair
GetEdramUintPow2BindlessUAVHandlePair(uint32_t element_size_bytes_pow2) const;
src/xenia/gpu/d3d12/d3d12_render_target_cache.cc
+107 -220
View File
@@ -247,6 +247,7 @@ bool D3D12RenderTargetCache::Initialize() {
return false;
}
edram_buffer_->SetName(L"EDRAM Buffer");
edram_buffer_gpu_address_ = edram_buffer_->GetGPUVirtualAddress();
edram_buffer_modification_status_ =
EdramBufferModificationStatus::kUnmodified;
@@ -337,31 +338,15 @@ bool D3D12RenderTargetCache::Initialize() {
resolve_copy_root_parameters[0].ShaderVisibility =
D3D12_SHADER_VISIBILITY_ALL;
// Parameter 1 is the destination (shared memory).
D3D12_DESCRIPTOR_RANGE resolve_copy_dest_range;
resolve_copy_dest_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_UAV;
resolve_copy_dest_range.NumDescriptors = 1;
resolve_copy_dest_range.BaseShaderRegister = 0;
resolve_copy_dest_range.RegisterSpace = 0;
resolve_copy_dest_range.OffsetInDescriptorsFromTableStart = 0;
resolve_copy_root_parameters[1].ParameterType =
D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE;
resolve_copy_root_parameters[1].DescriptorTable.NumDescriptorRanges = 1;
resolve_copy_root_parameters[1].DescriptorTable.pDescriptorRanges =
&resolve_copy_dest_range;
resolve_copy_root_parameters[1].ParameterType = D3D12_ROOT_PARAMETER_TYPE_UAV;
resolve_copy_root_parameters[1].Descriptor.ShaderRegister = 0;
resolve_copy_root_parameters[1].Descriptor.RegisterSpace = 0;
resolve_copy_root_parameters[1].ShaderVisibility =
D3D12_SHADER_VISIBILITY_ALL;
// Parameter 2 is the source (EDRAM).
D3D12_DESCRIPTOR_RANGE resolve_copy_source_range;
resolve_copy_source_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_SRV;
resolve_copy_source_range.NumDescriptors = 1;
resolve_copy_source_range.BaseShaderRegister = 0;
resolve_copy_source_range.RegisterSpace = 0;
resolve_copy_source_range.OffsetInDescriptorsFromTableStart = 0;
resolve_copy_root_parameters[2].ParameterType =
D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE;
resolve_copy_root_parameters[2].DescriptorTable.NumDescriptorRanges = 1;
resolve_copy_root_parameters[2].DescriptorTable.pDescriptorRanges =
&resolve_copy_source_range;
resolve_copy_root_parameters[2].ParameterType = D3D12_ROOT_PARAMETER_TYPE_SRV;
resolve_copy_root_parameters[2].Descriptor.ShaderRegister = 0;
resolve_copy_root_parameters[2].Descriptor.RegisterSpace = 0;
resolve_copy_root_parameters[2].ShaderVisibility =
D3D12_SHADER_VISIBILITY_ALL;
D3D12_ROOT_SIGNATURE_DESC resolve_copy_root_signature_desc;
@@ -557,20 +542,11 @@ bool D3D12RenderTargetCache::Initialize() {
&host_depth_store_root_source_range;
host_depth_store_root_source.ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL;
// Destination.
D3D12_DESCRIPTOR_RANGE host_depth_store_root_dest_range;
host_depth_store_root_dest_range.RangeType =
D3D12_DESCRIPTOR_RANGE_TYPE_UAV;
host_depth_store_root_dest_range.NumDescriptors = 1;
host_depth_store_root_dest_range.BaseShaderRegister = 0;
host_depth_store_root_dest_range.RegisterSpace = 0;
host_depth_store_root_dest_range.OffsetInDescriptorsFromTableStart = 0;
D3D12_ROOT_PARAMETER& host_depth_store_root_dest =
host_depth_store_root_parameters[kHostDepthStoreRootParameterDest];
host_depth_store_root_dest.ParameterType =
D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE;
host_depth_store_root_dest.DescriptorTable.NumDescriptorRanges = 1;
host_depth_store_root_dest.DescriptorTable.pDescriptorRanges =
&host_depth_store_root_dest_range;
host_depth_store_root_dest.ParameterType = D3D12_ROOT_PARAMETER_TYPE_UAV;
host_depth_store_root_dest.Descriptor.ShaderRegister = 0;
host_depth_store_root_dest.Descriptor.RegisterSpace = 0;
host_depth_store_root_dest.ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL;
// Root signature.
D3D12_ROOT_SIGNATURE_DESC host_depth_store_root_desc;
@@ -1022,18 +998,10 @@ bool D3D12RenderTargetCache::Initialize() {
resolve_rov_clear_root_parameters[0].ShaderVisibility =
D3D12_SHADER_VISIBILITY_ALL;
// Parameter 1 is the destination (EDRAM).
D3D12_DESCRIPTOR_RANGE resolve_rov_clear_dest_range;
resolve_rov_clear_dest_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_UAV;
resolve_rov_clear_dest_range.NumDescriptors = 1;
resolve_rov_clear_dest_range.BaseShaderRegister = 0;
resolve_rov_clear_dest_range.RegisterSpace = 0;
resolve_rov_clear_dest_range.OffsetInDescriptorsFromTableStart = 0;
resolve_rov_clear_root_parameters[1].ParameterType =
D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE;
resolve_rov_clear_root_parameters[1].DescriptorTable.NumDescriptorRanges =
1;
resolve_rov_clear_root_parameters[1].DescriptorTable.pDescriptorRanges =
&resolve_rov_clear_dest_range;
D3D12_ROOT_PARAMETER_TYPE_UAV;
resolve_rov_clear_root_parameters[1].Descriptor.ShaderRegister = 0;
resolve_rov_clear_root_parameters[1].Descriptor.RegisterSpace = 0;
resolve_rov_clear_root_parameters[1].ShaderVisibility =
D3D12_SHADER_VISIBILITY_ALL;
D3D12_ROOT_SIGNATURE_DESC resolve_rov_clear_root_signature_desc;
@@ -1387,95 +1355,52 @@ bool D3D12RenderTargetCache::Resolve(const Memory& memory,
resolve_info.copy_dest_extent_length);
}
if (copy_dest_committed) {
// Write the descriptors and transition the resources.
// Full shared memory without resolution scaling, range of the scaled
// resolve buffer with scaling because only at least 128 * 2^20 R32
// elements must be addressable
// (D3D12_REQ_BUFFER_RESOURCE_TEXEL_COUNT_2_TO_EXP).
ui::d3d12::util::DescriptorCpuGpuHandlePair descriptor_dest;
ui::d3d12::util::DescriptorCpuGpuHandlePair descriptor_source;
ui::d3d12::util::DescriptorCpuGpuHandlePair descriptors[2];
if (command_processor_.RequestOneUseSingleViewDescriptors(
bindless_resources_used_ ? uint32_t(draw_resolution_scaled) : 2,
descriptors)) {
if (bindless_resources_used_) {
if (draw_resolution_scaled) {
descriptor_dest = descriptors[0];
} else {
descriptor_dest =
command_processor_
.GetSharedMemoryUintPow2BindlessUAVHandlePair(
copy_shader_info.dest_bpe_log2);
}
if (copy_shader_info.source_is_raw) {
descriptor_source =
command_processor_.GetSystemBindlessViewHandlePair(
D3D12CommandProcessor::SystemBindlessView::kEdramRawSRV);
} else {
descriptor_source =
command_processor_.GetEdramUintPow2BindlessSRVHandlePair(
copy_shader_info.source_bpe_log2);
}
} else {
descriptor_dest = descriptors[0];
if (!draw_resolution_scaled) {
shared_memory.WriteUintPow2UAVDescriptor(
descriptor_dest.first, copy_shader_info.dest_bpe_log2);
}
descriptor_source = descriptors[1];
if (copy_shader_info.source_is_raw) {
WriteEdramRawSRVDescriptor(descriptor_source.first);
} else {
WriteEdramUintPow2SRVDescriptor(descriptor_source.first,
copy_shader_info.source_bpe_log2);
}
}
if (draw_resolution_scaled) {
texture_cache.CreateCurrentScaledResolveRangeUintPow2UAV(
descriptor_dest.first, copy_shader_info.dest_bpe_log2);
texture_cache.TransitionCurrentScaledResolveRange(
D3D12_RESOURCE_STATE_UNORDERED_ACCESS);
} else {
shared_memory.UseForWriting();
}
TransitionEdramBuffer(D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE);
command_list.D3DSetComputeRootSignature(resolve_copy_root_signature_);
// Submit the resolve.
command_list.D3DSetComputeRootSignature(resolve_copy_root_signature_);
command_list.D3DSetComputeRootDescriptorTable(
2, descriptor_source.second);
command_list.D3DSetComputeRootDescriptorTable(1,
descriptor_dest.second);
if (draw_resolution_scaled) {
command_list.D3DSetComputeRoot32BitConstants(
0,
sizeof(copy_shader_constants.dest_relative) / sizeof(uint32_t),
&copy_shader_constants.dest_relative, 0);
} else {
command_list.D3DSetComputeRoot32BitConstants(
0, sizeof(copy_shader_constants) / sizeof(uint32_t),
&copy_shader_constants, 0);
}
command_processor_.SetExternalPipeline(
resolve_copy_pipelines_[size_t(copy_shader)]);
command_processor_.SubmitBarriers();
command_list.D3DDispatch(copy_group_count_x, copy_group_count_y, 1);
// Source.
TransitionEdramBuffer(D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE);
command_list.D3DSetComputeRootShaderResourceView(
2, edram_buffer_gpu_address_);
// Order the resolve with other work using the destination as a UAV.
if (draw_resolution_scaled) {
texture_cache.MarkCurrentScaledResolveRangeUAVWritesCommitNeeded();
} else {
shared_memory.MarkUAVWritesCommitNeeded();
}
// Destination and constants.
if (draw_resolution_scaled) {
texture_cache.TransitionCurrentScaledResolveRange(
D3D12_RESOURCE_STATE_UNORDERED_ACCESS);
command_list.D3DSetComputeRootUnorderedAccessView(
1, texture_cache.GetCurrentScaledResolveRangeGPUAddress());
// Invalidate textures and mark the range as scaled if needed.
texture_cache.MarkRangeAsResolved(
resolve_info.copy_dest_extent_start,
resolve_info.copy_dest_extent_length);
written_address_out = resolve_info.copy_dest_extent_start;
written_length_out = resolve_info.copy_dest_extent_length;
copied = true;
command_list.D3DSetComputeRoot32BitConstants(
0, sizeof(copy_shader_constants.dest_relative) / sizeof(uint32_t),
&copy_shader_constants.dest_relative, 0);
} else {
shared_memory.UseForWriting();
command_list.D3DSetComputeRootUnorderedAccessView(
1, shared_memory.GetGPUAddress());
command_list.D3DSetComputeRoot32BitConstants(
0, sizeof(copy_shader_constants) / sizeof(uint32_t),
&copy_shader_constants, 0);
}
// Dispatch the resolve.
command_processor_.SetExternalPipeline(
resolve_copy_pipelines_[size_t(copy_shader)]);
command_processor_.SubmitBarriers();
command_list.D3DDispatch(copy_group_count_x, copy_group_count_y, 1);
// Order the resolve with other work using the destination as a UAV.
if (draw_resolution_scaled) {
texture_cache.MarkCurrentScaledResolveRangeUAVWritesCommitNeeded();
} else {
shared_memory.MarkUAVWritesCommitNeeded();
}
// Invalidate textures and mark the range as scaled if needed.
texture_cache.MarkRangeAsResolved(resolve_info.copy_dest_extent_start,
resolve_info.copy_dest_extent_length);
written_address_out = resolve_info.copy_dest_extent_start;
written_length_out = resolve_info.copy_dest_extent_length;
copied = true;
} else {
XELOGE(
"D3D12RenderTargetCache: Failed to obtain the resolve destination "
@@ -1519,76 +1444,57 @@ bool D3D12RenderTargetCache::Resolve(const Memory& memory,
cleared = true;
} break;
case Path::kPixelShaderInterlock: {
ui::d3d12::util::DescriptorCpuGpuHandlePair descriptor_edram;
bool descriptor_edram_obtained;
if (bindless_resources_used_) {
descriptor_edram = command_processor_.GetSystemBindlessViewHandlePair(
D3D12CommandProcessor::SystemBindlessView ::
kEdramR32G32B32A32UintUAV);
descriptor_edram_obtained = true;
} else {
descriptor_edram_obtained =
command_processor_.RequestOneUseSingleViewDescriptors(
1, &descriptor_edram);
if (descriptor_edram_obtained) {
WriteEdramUintPow2UAVDescriptor(descriptor_edram.first, 4);
}
TransitionEdramBuffer(D3D12_RESOURCE_STATE_UNORDERED_ACCESS);
// Should be safe to only commit once (if was UAV / ROV previously - if
// there was nothing to copy, only to clear, for some reason, for
// instance), overlap of the depth and the color ranges is highly
// unlikely.
CommitEdramBufferUAVWrites();
command_list.D3DSetComputeRootSignature(
resolve_rov_clear_root_signature_);
command_list.D3DSetComputeRootUnorderedAccessView(
1, edram_buffer_gpu_address_);
std::pair<uint32_t, uint32_t> clear_group_count =
resolve_info.GetClearShaderGroupCount(draw_resolution_scale_x(),
draw_resolution_scale_y());
assert_true(clear_group_count.first && clear_group_count.second);
if (clear_depth) {
draw_util::ResolveClearShaderConstants depth_clear_constants;
resolve_info.GetDepthClearShaderConstants(depth_clear_constants);
command_list.D3DSetComputeRoot32BitConstants(
0, sizeof(depth_clear_constants) / sizeof(uint32_t),
&depth_clear_constants, 0);
command_processor_.SetExternalPipeline(
resolve_rov_clear_32bpp_pipeline_);
command_processor_.SubmitBarriers();
command_list.D3DDispatch(clear_group_count.first,
clear_group_count.second, 1);
}
if (descriptor_edram_obtained) {
TransitionEdramBuffer(D3D12_RESOURCE_STATE_UNORDERED_ACCESS);
// Should be safe to only commit once (if was UAV / ROV previously -
// if there was nothing to copy, only to clear, for some reason, for
// instance), overlap of the depth and the color ranges is highly
// unlikely.
CommitEdramBufferUAVWrites();
command_list.D3DSetComputeRootSignature(
resolve_rov_clear_root_signature_);
command_list.D3DSetComputeRootDescriptorTable(
1, descriptor_edram.second);
std::pair<uint32_t, uint32_t> clear_group_count =
resolve_info.GetClearShaderGroupCount(draw_resolution_scale_x(),
draw_resolution_scale_y());
assert_true(clear_group_count.first && clear_group_count.second);
if (clear_color) {
draw_util::ResolveClearShaderConstants color_clear_constants;
resolve_info.GetColorClearShaderConstants(color_clear_constants);
if (clear_depth) {
draw_util::ResolveClearShaderConstants depth_clear_constants;
resolve_info.GetDepthClearShaderConstants(depth_clear_constants);
// Non-RT-specific constants have already been set.
command_list.D3DSetComputeRoot32BitConstants(
0, sizeof(depth_clear_constants) / sizeof(uint32_t),
&depth_clear_constants, 0);
command_processor_.SetExternalPipeline(
resolve_rov_clear_32bpp_pipeline_);
command_processor_.SubmitBarriers();
command_list.D3DDispatch(clear_group_count.first,
clear_group_count.second, 1);
0, sizeof(color_clear_constants.rt_specific) / sizeof(uint32_t),
&color_clear_constants.rt_specific,
offsetof(draw_util::ResolveClearShaderConstants, rt_specific) /
sizeof(uint32_t));
} else {
command_list.D3DSetComputeRoot32BitConstants(
0, sizeof(color_clear_constants) / sizeof(uint32_t),
&color_clear_constants, 0);
}
if (clear_color) {
draw_util::ResolveClearShaderConstants color_clear_constants;
resolve_info.GetColorClearShaderConstants(color_clear_constants);
if (clear_depth) {
// Non-RT-specific constants have already been set.
command_list.D3DSetComputeRoot32BitConstants(
0,
sizeof(color_clear_constants.rt_specific) / sizeof(uint32_t),
&color_clear_constants.rt_specific,
offsetof(draw_util::ResolveClearShaderConstants,
rt_specific) /
sizeof(uint32_t));
} else {
command_list.D3DSetComputeRoot32BitConstants(
0, sizeof(color_clear_constants) / sizeof(uint32_t),
&color_clear_constants, 0);
}
command_processor_.SetExternalPipeline(
resolve_info.color_edram_info.format_is_64bpp
? resolve_rov_clear_64bpp_pipeline_
: resolve_rov_clear_32bpp_pipeline_);
command_processor_.SubmitBarriers();
command_list.D3DDispatch(clear_group_count.first,
clear_group_count.second, 1);
}
MarkEdramBufferModified();
cleared = true;
command_processor_.SetExternalPipeline(
resolve_info.color_edram_info.format_is_64bpp
? resolve_rov_clear_64bpp_pipeline_
: resolve_rov_clear_32bpp_pipeline_);
command_processor_.SubmitBarriers();
command_list.D3DDispatch(clear_group_count.first,
clear_group_count.second, 1);
}
MarkEdramBufferModified();
cleared = true;
} break;
default:
assert_unhandled_case(GetPath());
@@ -4576,38 +4482,19 @@ void D3D12RenderTargetCache::PerformTransfersAndResolveClears(
continue;
}
if (!host_depth_store_set_up) {
// Bindings.
// 0 - source.
// 1 - EDRAM if bindful.
// Source descriptor.
ui::d3d12::util::DescriptorCpuGpuHandlePair
host_depth_store_descriptors[2];
host_depth_store_descriptor_source;
if (!command_processor_.RequestOneUseSingleViewDescriptors(
1 + uint32_t(!bindless_resources_used_),
host_depth_store_descriptors)) {
1, &host_depth_store_descriptor_source)) {
continue;
}
command_list.D3DSetComputeRootSignature(
host_depth_store_root_signature_);
// Destination (EDRAM uint4 buffer).
if (bindless_resources_used_) {
command_list.D3DSetComputeRootDescriptorTable(
kHostDepthStoreRootParameterDest,
command_processor_.GetEdramUintPow2BindlessUAVHandlePair(4)
.second);
} else {
const ui::d3d12::util::DescriptorCpuGpuHandlePair&
host_depth_store_descriptor_dest =
host_depth_store_descriptors[1];
WriteEdramUintPow2UAVDescriptor(
host_depth_store_descriptor_dest.first, 4);
command_list.D3DSetComputeRootDescriptorTable(
kHostDepthStoreRootParameterDest,
host_depth_store_descriptor_dest.second);
}
// Destination (EDRAM buffer).
command_list.D3DSetComputeRootUnorderedAccessView(
kHostDepthStoreRootParameterDest, edram_buffer_gpu_address_);
// Depth source texture.
const ui::d3d12::util::DescriptorCpuGpuHandlePair&
host_depth_store_descriptor_source =
host_depth_store_descriptors[0];
device->CopyDescriptorsSimple(
1, host_depth_store_descriptor_source.first,
dest_d3d12_rt.descriptor_srv().GetHandle(),
src/xenia/gpu/d3d12/d3d12_render_target_cache.h
+1
View File
@@ -180,6 +180,7 @@ class D3D12RenderTargetCache final : public RenderTargetCache {
// copied to a different buffer - the same range may have ROV-owned color and
// host float32 depth at the same time).
ID3D12Resource* edram_buffer_ = nullptr;
D3D12_GPU_VIRTUAL_ADDRESS edram_buffer_gpu_address_ = 0;
D3D12_RESOURCE_STATES edram_buffer_state_;
EdramBufferModificationStatus edram_buffer_modification_status_ =
EdramBufferModificationStatus::kUnmodified;
src/xenia/gpu/d3d12/d3d12_shared_memory.cc
-54
View File
@@ -233,60 +233,6 @@ void D3D12SharedMemory::WriteRawUAVDescriptor(
D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV);
}
void D3D12SharedMemory::WriteUintPow2SRVDescriptor(
D3D12_CPU_DESCRIPTOR_HANDLE handle, uint32_t element_size_bytes_pow2) {
BufferDescriptorIndex descriptor_index;
switch (element_size_bytes_pow2) {
case 2:
descriptor_index = BufferDescriptorIndex::kR32UintSRV;
break;
case 3:
descriptor_index = BufferDescriptorIndex::kR32G32UintSRV;
break;
case 4:
descriptor_index = BufferDescriptorIndex::kR32G32B32A32UintSRV;
break;
default:
assert_unhandled_case(element_size_bytes_pow2);
return;
}
const ui::d3d12::D3D12Provider& provider =
command_processor_.GetD3D12Provider();
ID3D12Device* device = provider.GetDevice();
device->CopyDescriptorsSimple(
1, handle,
provider.OffsetViewDescriptor(buffer_descriptor_heap_start_,
uint32_t(descriptor_index)),
D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV);
}
void D3D12SharedMemory::WriteUintPow2UAVDescriptor(
D3D12_CPU_DESCRIPTOR_HANDLE handle, uint32_t element_size_bytes_pow2) {
BufferDescriptorIndex descriptor_index;
switch (element_size_bytes_pow2) {
case 2:
descriptor_index = BufferDescriptorIndex::kR32UintUAV;
break;
case 3:
descriptor_index = BufferDescriptorIndex::kR32G32UintUAV;
break;
case 4:
descriptor_index = BufferDescriptorIndex::kR32G32B32A32UintUAV;
break;
default:
assert_unhandled_case(element_size_bytes_pow2);
return;
}
const ui::d3d12::D3D12Provider& provider =
command_processor_.GetD3D12Provider();
ID3D12Device* device = provider.GetDevice();
device->CopyDescriptorsSimple(
1, handle,
provider.OffsetViewDescriptor(buffer_descriptor_heap_start_,
uint32_t(descriptor_index)),
D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV);
}
bool D3D12SharedMemory::InitializeTraceSubmitDownloads() {
ResetTraceDownload();
PrepareForTraceDownload();
src/xenia/gpu/d3d12/d3d12_shared_memory.h
-6
View File
@@ -76,12 +76,6 @@ class D3D12SharedMemory : public SharedMemory {
void WriteRawSRVDescriptor(D3D12_CPU_DESCRIPTOR_HANDLE handle);
void WriteRawUAVDescriptor(D3D12_CPU_DESCRIPTOR_HANDLE handle);
// Due to the D3D12_REQ_BUFFER_RESOURCE_TEXEL_COUNT_2_TO_EXP limitation, the
// smallest supported formats are 32-bit.
void WriteUintPow2SRVDescriptor(D3D12_CPU_DESCRIPTOR_HANDLE handle,
uint32_t element_size_bytes_pow2);
void WriteUintPow2UAVDescriptor(D3D12_CPU_DESCRIPTOR_HANDLE handle,
uint32_t element_size_bytes_pow2);
// Returns true if any downloads were submitted to the command processor.
bool InitializeTraceSubmitDownloads();
src/xenia/gpu/d3d12/d3d12_texture_cache.cc
+21 -105
View File
@@ -183,26 +183,14 @@ bool D3D12TextureCache::Initialize() {
root_parameters[0].ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL;
// Parameter 1 is the source (may be changed multiple times for the same
// destination).
D3D12_DESCRIPTOR_RANGE root_dest_range;
root_dest_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_SRV;
root_dest_range.NumDescriptors = 1;
root_dest_range.BaseShaderRegister = 0;
root_dest_range.RegisterSpace = 0;
root_dest_range.OffsetInDescriptorsFromTableStart = 0;
root_parameters[1].ParameterType = D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE;
root_parameters[1].DescriptorTable.NumDescriptorRanges = 1;
root_parameters[1].DescriptorTable.pDescriptorRanges = &root_dest_range;
root_parameters[1].ParameterType = D3D12_ROOT_PARAMETER_TYPE_SRV;
root_parameters[1].Descriptor.ShaderRegister = 0;
root_parameters[1].Descriptor.RegisterSpace = 0;
root_parameters[1].ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL;
// Parameter 2 is the destination.
D3D12_DESCRIPTOR_RANGE root_source_range;
root_source_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_UAV;
root_source_range.NumDescriptors = 1;
root_source_range.BaseShaderRegister = 0;
root_source_range.RegisterSpace = 0;
root_source_range.OffsetInDescriptorsFromTableStart = 0;
root_parameters[2].ParameterType = D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE;
root_parameters[2].DescriptorTable.NumDescriptorRanges = 1;
root_parameters[2].DescriptorTable.pDescriptorRanges = &root_source_range;
root_parameters[2].ParameterType = D3D12_ROOT_PARAMETER_TYPE_UAV;
root_parameters[2].Descriptor.ShaderRegister = 0;
root_parameters[2].Descriptor.RegisterSpace = 0;
root_parameters[2].ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL;
D3D12_ROOT_SIGNATURE_DESC root_signature_desc;
root_signature_desc.NumParameters = UINT(xe::countof(root_parameters));
@@ -1283,40 +1271,16 @@ void D3D12TextureCache::TransitionCurrentScaledResolveRange(
buffer.resource(), buffer.SetResourceState(new_state), new_state);
}
void D3D12TextureCache::CreateCurrentScaledResolveRangeUintPow2SRV(
D3D12_CPU_DESCRIPTOR_HANDLE handle, uint32_t element_size_bytes_pow2) {
D3D12_GPU_VIRTUAL_ADDRESS
D3D12TextureCache::GetCurrentScaledResolveRangeGPUAddress() const {
assert_true(IsDrawResolutionScaled());
size_t buffer_index = GetCurrentScaledResolveBufferIndex();
const size_t buffer_index = GetCurrentScaledResolveBufferIndex();
const ScaledResolveVirtualBuffer* buffer =
scaled_resolve_2gb_buffers_[buffer_index].get();
assert_not_null(buffer);
ui::d3d12::util::CreateBufferTypedSRV(
command_processor_.GetD3D12Provider().GetDevice(), handle,
buffer->resource(),
ui::d3d12::util::GetUintPow2DXGIFormat(element_size_bytes_pow2),
uint32_t(scaled_resolve_current_range_length_scaled_ >>
element_size_bytes_pow2),
(scaled_resolve_current_range_start_scaled_ -
(uint64_t(buffer_index) << 30)) >>
element_size_bytes_pow2);
}
void D3D12TextureCache::CreateCurrentScaledResolveRangeUintPow2UAV(
D3D12_CPU_DESCRIPTOR_HANDLE handle, uint32_t element_size_bytes_pow2) {
assert_true(IsDrawResolutionScaled());
size_t buffer_index = GetCurrentScaledResolveBufferIndex();
const ScaledResolveVirtualBuffer* buffer =
scaled_resolve_2gb_buffers_[buffer_index].get();
assert_not_null(buffer);
ui::d3d12::util::CreateBufferTypedUAV(
command_processor_.GetD3D12Provider().GetDevice(), handle,
buffer->resource(),
ui::d3d12::util::GetUintPow2DXGIFormat(element_size_bytes_pow2),
uint32_t(scaled_resolve_current_range_length_scaled_ >>
element_size_bytes_pow2),
(scaled_resolve_current_range_start_scaled_ -
(uint64_t(buffer_index) << 30)) >>
element_size_bytes_pow2);
return buffer->resource()->GetGPUVirtualAddress() +
(scaled_resolve_current_range_start_scaled_ -
(uint64_t(buffer_index) << 30));
}
ID3D12Resource* D3D12TextureCache::RequestSwapTexture(
@@ -1678,61 +1642,18 @@ bool D3D12TextureCache::LoadTextureDataFromResidentMemoryImpl(Texture& texture,
return false;
}
// Begin loading.
// May use different buffers for scaled base and mips, and also addressability
// of more than 128 * 2^20 (2^D3D12_REQ_BUFFER_RESOURCE_TEXEL_COUNT_2_TO_EXP)
// texels is not mandatory - need two separate UAV descriptors for base and
// mips.
// Destination.
uint32_t descriptor_count = 1;
if (texture_resolution_scaled) {
// Source - base and mips, one or both.
descriptor_count += (level_first == 0 && level_last != 0) ? 2 : 1;
} else {
// Source - shared memory.
if (!bindless_resources_used_) {
++descriptor_count;
}
}
ui::d3d12::util::DescriptorCpuGpuHandlePair descriptors_allocated[3];
if (!command_processor_.RequestOneUseSingleViewDescriptors(
descriptor_count, descriptors_allocated)) {
command_processor_.ReleaseScratchGPUBuffer(copy_buffer, copy_buffer_state);
return false;
}
uint32_t descriptor_write_index = 0;
command_processor_.SetExternalPipeline(pipeline);
command_list.D3DSetComputeRootSignature(load_root_signature_.Get());
// Set up the destination descriptor.
assert_true(descriptor_write_index < descriptor_count);
ui::d3d12::util::DescriptorCpuGpuHandlePair descriptor_dest =
descriptors_allocated[descriptor_write_index++];
ui::d3d12::util::CreateBufferTypedUAV(
device, descriptor_dest.first, copy_buffer,
ui::d3d12::util::GetUintPow2DXGIFormat(load_shader_info.dest_bpe_log2),
uint32_t(copy_buffer_size) >> load_shader_info.dest_bpe_log2);
command_list.D3DSetComputeRootDescriptorTable(2, descriptor_dest.second);
// Set up the unscaled source descriptor (scaled needs two descriptors that
// depend on the buffer being current, so they will be set later - for mips,
// after loading the base is done).
command_list.D3DSetComputeRootUnorderedAccessView(
2, copy_buffer->GetGPUVirtualAddress());
// Set up the unscaled source binding (scaled may have the base and the mips
// in different buffer resources).
if (!texture_resolution_scaled) {
D3D12SharedMemory& d3d12_shared_memory =
static_cast<D3D12SharedMemory&>(shared_memory());
d3d12_shared_memory.UseForReading();
ui::d3d12::util::DescriptorCpuGpuHandlePair descriptor_unscaled_source;
if (bindless_resources_used_) {
descriptor_unscaled_source =
command_processor_.GetSharedMemoryUintPow2BindlessSRVHandlePair(
load_shader_info.source_bpe_log2);
} else {
assert_true(descriptor_write_index < descriptor_count);
descriptor_unscaled_source =
descriptors_allocated[descriptor_write_index++];
d3d12_shared_memory.WriteUintPow2SRVDescriptor(
descriptor_unscaled_source.first, load_shader_info.source_bpe_log2);
}
command_list.D3DSetComputeRootDescriptorTable(
1, descriptor_unscaled_source.second);
command_list.D3DSetComputeRootShaderResourceView(
1, d3d12_shared_memory.GetGPUAddress());
}
// Submit the copy buffer population commands.
@@ -1774,20 +1695,15 @@ bool D3D12TextureCache::LoadTextureDataFromResidentMemoryImpl(Texture& texture,
uint32_t guest_size_unscaled = is_base ? d3d12_texture.GetGuestBaseSize()
: d3d12_texture.GetGuestMipsSize();
if (!MakeScaledResolveRangeCurrent(guest_address, guest_size_unscaled,
load_shader_info.source_bpe_log2)) {
4)) {
command_processor_.ReleaseScratchGPUBuffer(copy_buffer,
copy_buffer_state);
return false;
}
TransitionCurrentScaledResolveRange(
D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE);
assert_true(descriptor_write_index < descriptor_count);
ui::d3d12::util::DescriptorCpuGpuHandlePair descriptor_scaled_source =
descriptors_allocated[descriptor_write_index++];
CreateCurrentScaledResolveRangeUintPow2SRV(
descriptor_scaled_source.first, load_shader_info.source_bpe_log2);
command_list.D3DSetComputeRootDescriptorTable(
1, descriptor_scaled_source.second);
command_list.D3DSetComputeRootShaderResourceView(
1, GetCurrentScaledResolveRangeGPUAddress());
if (!is_base) {
scaled_mips_source_set_up = true;
}
src/xenia/gpu/d3d12/d3d12_texture_cache.h
+3 -7
View File
@@ -137,13 +137,9 @@ class D3D12TextureCache final : public TextureCache {
bool MakeScaledResolveRangeCurrent(uint32_t start_unscaled,
uint32_t length_unscaled,
uint32_t length_scaled_alignment_log2 = 0);
// These functions create a view of the range specified in the last successful
// MakeScaledResolveRangeCurrent call because that function must be called
// before this.
void CreateCurrentScaledResolveRangeUintPow2SRV(
D3D12_CPU_DESCRIPTOR_HANDLE handle, uint32_t element_size_bytes_pow2);
void CreateCurrentScaledResolveRangeUintPow2UAV(
D3D12_CPU_DESCRIPTOR_HANDLE handle, uint32_t element_size_bytes_pow2);
// Returns the GPU address of the range specified in the last successful
// MakeScaledResolveRangeCurrent call.
D3D12_GPU_VIRTUAL_ADDRESS GetCurrentScaledResolveRangeGPUAddress() const;
void TransitionCurrentScaledResolveRange(D3D12_RESOURCE_STATES new_state);
void MarkCurrentScaledResolveRangeUAVWritesCommitNeeded() {
assert_true(IsDrawResolutionScaled());
src/xenia/gpu/d3d12/deferred_command_list.cc
+26 -4
View File
@@ -200,15 +200,13 @@ void DeferredCommandList::Execute(ID3D12GraphicsCommandList* command_list,
} break;
case Command::kD3DSetComputeRootConstantBufferView: {
auto& args =
*reinterpret_cast<const SetRootConstantBufferViewArguments*>(
stream);
*reinterpret_cast<const SetRootDescriptorArguments*>(stream);
command_list->SetComputeRootConstantBufferView(
args.root_parameter_index, args.buffer_location);
} break;
case Command::kD3DSetGraphicsRootConstantBufferView: {
auto& args =
*reinterpret_cast<const SetRootConstantBufferViewArguments*>(
stream);
*reinterpret_cast<const SetRootDescriptorArguments*>(stream);
command_list->SetGraphicsRootConstantBufferView(
args.root_parameter_index, args.buffer_location);
} break;
@@ -224,6 +222,18 @@ void DeferredCommandList::Execute(ID3D12GraphicsCommandList* command_list,
command_list->SetGraphicsRootDescriptorTable(args.root_parameter_index,
args.base_descriptor);
} break;
case Command::kD3DSetComputeRootShaderResourceView: {
auto& args =
*reinterpret_cast<const SetRootDescriptorArguments*>(stream);
command_list->SetComputeRootShaderResourceView(
args.root_parameter_index, args.buffer_location);
} break;
case Command::kD3DSetGraphicsRootShaderResourceView: {
auto& args =
*reinterpret_cast<const SetRootDescriptorArguments*>(stream);
command_list->SetGraphicsRootShaderResourceView(
args.root_parameter_index, args.buffer_location);
} break;
case Command::kD3DSetComputeRootSignature: {
command_list->SetComputeRootSignature(
*reinterpret_cast<ID3D12RootSignature* const*>(stream));
@@ -232,6 +242,18 @@ void DeferredCommandList::Execute(ID3D12GraphicsCommandList* command_list,
command_list->SetGraphicsRootSignature(
*reinterpret_cast<ID3D12RootSignature* const*>(stream));
} break;
case Command::kD3DSetComputeRootUnorderedAccessView: {
auto& args =
*reinterpret_cast<const SetRootDescriptorArguments*>(stream);
command_list->SetComputeRootUnorderedAccessView(
args.root_parameter_index, args.buffer_location);
} break;
case Command::kD3DSetGraphicsRootUnorderedAccessView: {
auto& args =
*reinterpret_cast<const SetRootDescriptorArguments*>(stream);
command_list->SetGraphicsRootUnorderedAccessView(
args.root_parameter_index, args.buffer_location);
} break;
case Command::kSetDescriptorHeaps: {
auto& args =
*reinterpret_cast<const SetDescriptorHeapsArguments*>(stream);
src/xenia/gpu/d3d12/deferred_command_list.h
+45 -5
View File
@@ -357,18 +357,18 @@ class DeferredCommandList {
void D3DSetComputeRootConstantBufferView(
UINT root_parameter_index, D3D12_GPU_VIRTUAL_ADDRESS buffer_location) {
auto& args = *reinterpret_cast<SetRootConstantBufferViewArguments*>(
auto& args = *reinterpret_cast<SetRootDescriptorArguments*>(
WriteCommand(Command::kD3DSetComputeRootConstantBufferView,
sizeof(SetRootConstantBufferViewArguments)));
sizeof(SetRootDescriptorArguments)));
args.root_parameter_index = root_parameter_index;
args.buffer_location = buffer_location;
}
void D3DSetGraphicsRootConstantBufferView(
UINT root_parameter_index, D3D12_GPU_VIRTUAL_ADDRESS buffer_location) {
auto& args = *reinterpret_cast<SetRootConstantBufferViewArguments*>(
auto& args = *reinterpret_cast<SetRootDescriptorArguments*>(
WriteCommand(Command::kD3DSetGraphicsRootConstantBufferView,
sizeof(SetRootConstantBufferViewArguments)));
sizeof(SetRootDescriptorArguments)));
args.root_parameter_index = root_parameter_index;
args.buffer_location = buffer_location;
}
@@ -391,6 +391,24 @@ class DeferredCommandList {
args.base_descriptor.ptr = base_descriptor.ptr;
}
void D3DSetComputeRootShaderResourceView(
UINT root_parameter_index, D3D12_GPU_VIRTUAL_ADDRESS buffer_location) {
auto& args = *reinterpret_cast<SetRootDescriptorArguments*>(
WriteCommand(Command::kD3DSetComputeRootShaderResourceView,
sizeof(SetRootDescriptorArguments)));
args.root_parameter_index = root_parameter_index;
args.buffer_location = buffer_location;
}
void D3DSetGraphicsRootShaderResourceView(
UINT root_parameter_index, D3D12_GPU_VIRTUAL_ADDRESS buffer_location) {
auto& args = *reinterpret_cast<SetRootDescriptorArguments*>(
WriteCommand(Command::kD3DSetGraphicsRootShaderResourceView,
sizeof(SetRootDescriptorArguments)));
args.root_parameter_index = root_parameter_index;
args.buffer_location = buffer_location;
}
void D3DSetComputeRootSignature(ID3D12RootSignature* root_signature) {
auto& arg = *reinterpret_cast<ID3D12RootSignature**>(WriteCommand(
Command::kD3DSetComputeRootSignature, sizeof(ID3D12RootSignature*)));
@@ -403,6 +421,24 @@ class DeferredCommandList {
arg = root_signature;
}
void D3DSetComputeRootUnorderedAccessView(
UINT root_parameter_index, D3D12_GPU_VIRTUAL_ADDRESS buffer_location) {
auto& args = *reinterpret_cast<SetRootDescriptorArguments*>(
WriteCommand(Command::kD3DSetComputeRootUnorderedAccessView,
sizeof(SetRootDescriptorArguments)));
args.root_parameter_index = root_parameter_index;
args.buffer_location = buffer_location;
}
void D3DSetGraphicsRootUnorderedAccessView(
UINT root_parameter_index, D3D12_GPU_VIRTUAL_ADDRESS buffer_location) {
auto& args = *reinterpret_cast<SetRootDescriptorArguments*>(
WriteCommand(Command::kD3DSetGraphicsRootUnorderedAccessView,
sizeof(SetRootDescriptorArguments)));
args.root_parameter_index = root_parameter_index;
args.buffer_location = buffer_location;
}
void SetDescriptorHeaps(ID3D12DescriptorHeap* cbv_srv_uav_descriptor_heap,
ID3D12DescriptorHeap* sampler_descriptor_heap) {
auto& args = *reinterpret_cast<SetDescriptorHeapsArguments*>(WriteCommand(
@@ -489,8 +525,12 @@ class DeferredCommandList {
kD3DSetGraphicsRootConstantBufferView,
kD3DSetComputeRootDescriptorTable,
kD3DSetGraphicsRootDescriptorTable,
kD3DSetComputeRootShaderResourceView,
kD3DSetGraphicsRootShaderResourceView,
kD3DSetComputeRootSignature,
kD3DSetGraphicsRootSignature,
kD3DSetComputeRootUnorderedAccessView,
kD3DSetGraphicsRootUnorderedAccessView,
kSetDescriptorHeaps,
kD3DSetPipelineState,
kSetPipelineStateHandle,
@@ -616,7 +656,7 @@ class DeferredCommandList {
UINT dest_offset_in_32bit_values;
};
struct SetRootConstantBufferViewArguments {
struct SetRootDescriptorArguments {
UINT root_parameter_index;
D3D12_GPU_VIRTUAL_ADDRESS buffer_location;
};
src/xenia/gpu/draw_util.cc
+9 -9
View File
@@ -935,15 +935,15 @@ void GetResolveEdramTileSpan(ResolveEdramInfo edram_info,
constexpr ResolveCopyShaderInfo
resolve_copy_shader_info[size_t(ResolveCopyShaderIndex::kCount)] = {
{"Resolve Copy Fast 32bpp 1x/2xMSAA", false, 4, 4, 6, 3},
{"Resolve Copy Fast 32bpp 4xMSAA", false, 4, 4, 6, 3},
{"Resolve Copy Fast 64bpp 1x/2xMSAA", false, 4, 4, 5, 3},
{"Resolve Copy Fast 64bpp 4xMSAA", false, 3, 4, 5, 3},
{"Resolve Copy Full 8bpp", true, 2, 3, 6, 3},
{"Resolve Copy Full 16bpp", true, 2, 3, 5, 3},
{"Resolve Copy Full 32bpp", true, 2, 4, 5, 3},
{"Resolve Copy Full 64bpp", true, 2, 4, 5, 3},
{"Resolve Copy Full 128bpp", true, 2, 4, 4, 3},
{"Resolve Copy Fast 32bpp 1x/2xMSAA", 6, 3},
{"Resolve Copy Fast 32bpp 4xMSAA", 6, 3},
{"Resolve Copy Fast 64bpp 1x/2xMSAA", 5, 3},
{"Resolve Copy Fast 64bpp 4xMSAA", 5, 3},
{"Resolve Copy Full 8bpp", 6, 3},
{"Resolve Copy Full 16bpp", 5, 3},
{"Resolve Copy Full 32bpp", 5, 3},
{"Resolve Copy Full 64bpp", 5, 3},
{"Resolve Copy Full 128bpp", 4, 3},
};
XE_MSVC_OPTIMIZE_SMALL()
bool GetResolveInfo(const RegisterFile& regs, const Memory& memory,
src/xenia/gpu/draw_util.h
-14
View File
@@ -593,20 +593,6 @@ enum class ResolveCopyShaderIndex {
struct ResolveCopyShaderInfo {
// Debug name of the pipeline state object with this shader.
const char* debug_name;
// Whether the EDRAM source needs be bound as a raw buffer (ByteAddressBuffer
// in Direct3D) since it can load different numbers of 32-bit values at once
// on some hardware. If the host API doesn't support raw buffers, a typed
// buffer with source_bpe_log2-byte elements needs to be used instead.
bool source_is_raw;
// Log2 of bytes per element of the type of the EDRAM buffer bound to the
// shader (at least 2).
uint32_t source_bpe_log2;
// Log2 of bytes per element of the type of the destination buffer bound to
// the shader (at least 2 because of the 128 megatexel minimum requirement on
// Direct3D 10+ - D3D12_REQ_BUFFER_RESOURCE_TEXEL_COUNT_2_TO_EXP - that
// prevents binding the entire shared memory buffer with smaller element
// sizes).
uint32_t dest_bpe_log2;
// Log2 of number of pixels in a single thread group along X and Y. 64 threads
// per group preferred (GCN lane count).
uint32_t group_size_x_log2, group_size_y_log2;
src/xenia/gpu/shaders/bytecode/.clang-format
Generated
-2
View File
@@ -1,2 +0,0 @@
DisableFormat: true
SortIncludes: false
src/xenia/gpu/shaders/edram.xesli
+5 -5
View File
@@ -20,10 +20,10 @@
// can't exceed 11 bits, and the modulo operator doesn't need to be performed to
// access the data in the render targets that are located in both ends of the
// EDRAM at the same time.
uint XeEdramOffsetInts(uint2_xe pixel_index, uint base_tiles, bool wrap,
uint pitch_tiles, uint msaa_samples, bool is_depth,
uint format_ints_log2, uint pixel_sample_index,
uint2_xe resolution_scale) {
uint XeEdramOffsetBytes(uint2_xe pixel_index, uint base_tiles, bool wrap,
uint pitch_tiles, uint msaa_samples, bool is_depth,
uint format_ints_log2, uint pixel_sample_index,
uint2_xe resolution_scale) {
uint2_xe rt_sample_index =
pixel_index <<
uint2_xe(greater_than_equal_xe(
@@ -54,7 +54,7 @@ uint XeEdramOffsetInts(uint2_xe pixel_index, uint base_tiles, bool wrap,
// EDRAM addressing is periodic (modulo the EDRAM size).
address %= tile_size_at_32bpp.x * tile_size_at_32bpp.y * 2048u;
}
return address;
return address << 2;
}
#endif // XENIA_GPU_SHADERS_EDRAM_XESLI_
src/xenia/gpu/shaders/host_depth_store_1xmsaa.cs.xesl
+11 -13
View File
@@ -10,15 +10,15 @@
#include "edram.xesli"
#include "host_depth_store.xesli"
array_buffer_wo_declare_xe(uint4_xe, xe_host_depth_store_dest, set=0, binding=0,
u0, space0)
byte_buffer_align16_wo_declare_xe(xe_host_depth_store_dest, set=0, binding=0,
u0, space0)
#define LOCAL_SIZE_X_XE 8
#define LOCAL_SIZE_Y_XE 8
#define LOCAL_SIZE_Z_XE 1
entry_bindings_begin_compute_xe
XE_HOST_DEPTH_STORE_PUSH_CONSTANTS_BINDING
entry_binding_next_xe
array_buffer_wo_binding_xe(uint4_xe, xe_host_depth_store_dest, buffer(1))
byte_buffer_wo_binding_xe(xe_host_depth_store_dest, buffer(1))
entry_binding_next_xe
texture_xe(texture_2d_xe, xe_host_depth_store_source, set=1, binding=0, t0,
space0, texture(0))
@@ -40,14 +40,12 @@ entry_inputs_end_code_begin_compute_xe
int2_xe pixel_index = int2_xe(
XeHostDepthStoreRectUnscaledOrigin(rect_constant) * resolution_scale +
(in_global_thread_id_xe.xy << uint2_xe(3u, 0u)));
uint edram_address_int4s =
XeEdramOffsetInts(uint2_xe(pixel_index), 0u, false,
XeHostDepthStoreRTPitchTiles(rt_constant),
kXenosMsaaSamples_1X, false, 0u, 0u,
resolution_scale)
>> 2u;
array_buffer_store_xe(
xe_host_depth_store_dest, edram_address_int4s,
uint edram_address = XeEdramOffsetBytes(
uint2_xe(pixel_index), 0u, false,
XeHostDepthStoreRTPitchTiles(rt_constant), kXenosMsaaSamples_1X, false,
0u, 0u, resolution_scale);
byte_buffer_align16_store16_xe(
xe_host_depth_store_dest, edram_address,
float_bits_to_uint_xe(float4_xe(
texel_fetch_2d_xe(xe_host_depth_store_source, pixel_index, 0).r,
texel_fetch_2d_xe(xe_host_depth_store_source,
@@ -56,8 +54,8 @@ entry_inputs_end_code_begin_compute_xe
pixel_index + int2_xe(2, 0), 0).r,
texel_fetch_2d_xe(xe_host_depth_store_source,
pixel_index + int2_xe(3, 0), 0).r)));
array_buffer_store_xe(
xe_host_depth_store_dest, edram_address_int4s + 1u,
byte_buffer_align16_store16_xe(
xe_host_depth_store_dest, edram_address + 16u,
float_bits_to_uint_xe(float4_xe(
texel_fetch_2d_xe(xe_host_depth_store_source,
pixel_index + int2_xe(4, 0), 0).r,
src/xenia/gpu/shaders/host_depth_store_2xmsaa.cs.xesl
+11 -13
View File
@@ -10,15 +10,15 @@
#include "edram.xesli"
#include "host_depth_store.xesli"
array_buffer_wo_declare_xe(uint4_xe, xe_host_depth_store_dest, set=0, binding=0,
u0, space0)
byte_buffer_align16_wo_declare_xe(xe_host_depth_store_dest, set=0, binding=0,
u0, space0)
#define LOCAL_SIZE_X_XE 8
#define LOCAL_SIZE_Y_XE 8
#define LOCAL_SIZE_Z_XE 1
entry_bindings_begin_compute_xe
XE_HOST_DEPTH_STORE_PUSH_CONSTANTS_BINDING
entry_binding_next_xe
array_buffer_wo_binding_xe(uint4_xe, xe_host_depth_store_dest, buffer(1))
byte_buffer_wo_binding_xe(xe_host_depth_store_dest, buffer(1))
entry_binding_next_xe
texture_xe(texture_2d_ms_xe, xe_host_depth_store_source, set=1, binding=0,
t0, space0, texture(0))
@@ -41,20 +41,18 @@ entry_inputs_end_code_begin_compute_xe
XeHostDepthStoreRectUnscaledOrigin(rect_constant) * resolution_scale +
uint2_xe(in_global_thread_id_xe.x << 3u, in_global_thread_id_xe.y >> 1u));
uint dest_sample_index = in_global_thread_id_xe.y & 1u;
uint edram_address_int4s =
XeEdramOffsetInts(uint2_xe(pixel_index), 0u, false,
XeHostDepthStoreRTPitchTiles(rt_constant),
kXenosMsaaSamples_2X, false, 0u, dest_sample_index,
resolution_scale)
>> 2u;
uint edram_address = XeEdramOffsetBytes(
uint2_xe(pixel_index), 0u, false,
XeHostDepthStoreRTPitchTiles(rt_constant), kXenosMsaaSamples_2X, false,
0u, dest_sample_index, resolution_scale);
// Top and bottom to Direct3D 10.1+ and Vulkan top 1 and bottom 0 (for 2x) or
// top-left 0 and bottom-right 3 (for 4x).
int source_sample_index =
XeHostDepthStoreRTMsaa2xSupported(rt_constant)
? (bool(dest_sample_index) ? 0 : 1)
: (bool(dest_sample_index) ? 3 : 0);
array_buffer_store_xe(
xe_host_depth_store_dest, edram_address_int4s,
byte_buffer_align16_store16_xe(
xe_host_depth_store_dest, edram_address,
float_bits_to_uint_xe(float4_xe(
texel_fetch_2d_ms_xe(xe_host_depth_store_source, pixel_index,
source_sample_index).r,
@@ -67,8 +65,8 @@ entry_inputs_end_code_begin_compute_xe
texel_fetch_2d_ms_xe(xe_host_depth_store_source,
pixel_index + int2_xe(3, 0),
source_sample_index).r)));
array_buffer_store_xe(
xe_host_depth_store_dest, edram_address_int4s + 1u,
byte_buffer_align16_store16_xe(
xe_host_depth_store_dest, edram_address + 16u,
float_bits_to_uint_xe(float4_xe(
texel_fetch_2d_ms_xe(xe_host_depth_store_source,
pixel_index + int2_xe(4, 0),
src/xenia/gpu/shaders/host_depth_store_4xmsaa.cs.xesl
+13 -14
View File
@@ -10,15 +10,15 @@
#include "edram.xesli"
#include "host_depth_store.xesli"
array_buffer_wo_declare_xe(uint4_xe, xe_host_depth_store_dest, set=0, binding=0,
u0, space0)
byte_buffer_align16_wo_declare_xe(xe_host_depth_store_dest, set=0, binding=0,
u0, space0)
#define LOCAL_SIZE_X_XE 8
#define LOCAL_SIZE_Y_XE 8
#define LOCAL_SIZE_Z_XE 1
entry_bindings_begin_compute_xe
XE_HOST_DEPTH_STORE_PUSH_CONSTANTS_BINDING
entry_binding_next_xe
array_buffer_wo_binding_xe(uint4_xe, xe_host_depth_store_dest, buffer(1))
byte_buffer_wo_binding_xe(xe_host_depth_store_dest, buffer(1))
entry_binding_next_xe
texture_xe(texture_2d_ms_xe, xe_host_depth_store_source, set=1, binding=0,
t0, space0, texture(0))
@@ -40,18 +40,17 @@ entry_inputs_end_code_begin_compute_xe
int2_xe pixel_index = int2_xe(
XeHostDepthStoreRectUnscaledOrigin(rect_constant) * resolution_scale +
uint2_xe(in_global_thread_id_xe.x << 2u, in_global_thread_id_xe.y >> 1u));
// For simplicity, passing samples directly, not pixels, to XeEdramOffsetInts.
uint edram_address_int4s =
XeEdramOffsetInts(
(uint2_xe(pixel_index) << 1u) | (in_global_thread_id_xe.xy & 1u),
0u, false, XeHostDepthStoreRTPitchTiles(rt_constant),
kXenosMsaaSamples_1X, false, 0u, 0u, resolution_scale)
>> 2u;
// For simplicity, passing samples directly, not pixels, to
// XeEdramOffsetBytes.
uint edram_address = XeEdramOffsetBytes(
(uint2_xe(pixel_index) << 1u) | (in_global_thread_id_xe.xy & 1u), 0u,
false, XeHostDepthStoreRTPitchTiles(rt_constant), kXenosMsaaSamples_1X,
false, 0u, 0u, resolution_scale);
// Render target horizontal sample in bit 0, vertical sample in bit 1.
int source_sample_left = int((in_global_thread_id_xe.y & 1u) << 1u);
int source_sample_right = source_sample_left + 1;
array_buffer_store_xe(
xe_host_depth_store_dest, edram_address_int4s,
byte_buffer_align16_store16_xe(
xe_host_depth_store_dest, edram_address,
float_bits_to_uint_xe(float4_xe(
texel_fetch_2d_ms_xe(xe_host_depth_store_source, pixel_index,
source_sample_left).r,
@@ -63,8 +62,8 @@ entry_inputs_end_code_begin_compute_xe
texel_fetch_2d_ms_xe(xe_host_depth_store_source,
pixel_index + int2_xe(1, 0),
source_sample_right).r)));
array_buffer_store_xe(
xe_host_depth_store_dest, edram_address_int4s + 1u,
byte_buffer_align16_store16_xe(
xe_host_depth_store_dest, edram_address + 16u,
float_bits_to_uint_xe(float4_xe(
texel_fetch_2d_ms_xe(xe_host_depth_store_source,
pixel_index + int2_xe(2, 0),
src/xenia/gpu/shaders/resolve.xesli
+147 -152
View File
@@ -44,18 +44,22 @@ push_const_end_xe
#define XE_RESOLVE_PUSH_CONST_BINDING push_const_binding_xe(buffer(0))
#ifndef XE_RESOLVE_CLEAR
#ifdef XE_RESOLVE_COPY_EDRAM_IS_UINT_VECTOR_BUFFER
uint_vector_buffer_declare_xe(xe_resolve_edram, set=0, binding=0, t0,
space0)
#define XE_RESOLVE_COPY_EDRAM_BINDING \
uint_vector_buffer_binding_xe(xe_resolve_edram, buffer(2))
#else
array_buffer_declare_xe(XE_RESOLVE_SOURCE_TYPE, xe_resolve_edram, set=0,
binding=0, t0, space0)
#define XE_RESOLVE_COPY_EDRAM_BINDING \
array_buffer_binding_xe(XE_RESOLVE_SOURCE_TYPE, xe_resolve_edram, \
buffer(2))
#if XE_RESOLVE_COPY_EDRAM_BYTE_BUFFER_ALIGNMENT == 4
#define XE_RESOLVE_COPY_EDRAM_BYTE_BUFFER_DECLARE_MACRO \
byte_buffer_align4_declare_xe
#elif XE_RESOLVE_COPY_EDRAM_BYTE_BUFFER_ALIGNMENT == 8
#define XE_RESOLVE_COPY_EDRAM_BYTE_BUFFER_DECLARE_MACRO \
byte_buffer_align8_declare_xe
#elif XE_RESOLVE_COPY_EDRAM_BYTE_BUFFER_ALIGNMENT == 16
#define XE_RESOLVE_COPY_EDRAM_BYTE_BUFFER_DECLARE_MACRO \
byte_buffer_align16_declare_xe
#endif
#ifdef XE_RESOLVE_COPY_EDRAM_BYTE_BUFFER_DECLARE_MACRO
XE_RESOLVE_COPY_EDRAM_BYTE_BUFFER_DECLARE_MACRO(xe_resolve_edram, set=0,
binding=0, t0, space0)
#endif
#define XE_RESOLVE_COPY_EDRAM_BINDING \
byte_buffer_binding_xe(xe_resolve_edram, buffer(2))
#endif
struct XeResolveInfo {
@@ -153,8 +157,8 @@ XeResolveInfo XeResolveGetInfo(param_push_consts_xe) {
return resolve_info;
}
uint XeResolveEdramPixelStrideInts(XeResolveInfo resolve_info) {
return 1u << (resolve_info.edram_format_ints_log2 +
uint XeResolveEdramPixelStrideBytes(XeResolveInfo resolve_info) {
return 4u << (resolve_info.edram_format_ints_log2 +
uint(resolve_info.edram_msaa_samples >= kXenosMsaaSamples_4X));
}
@@ -231,9 +235,9 @@ uint XeResolveEdramPixelStrideInts(XeResolveInfo resolve_info) {
// Offset to the first sample to participate in averaging (or the sample to be
// copied if not averaging).
uint XeResolveColorCopySourcePixelAddressIntsYHalfPixelOffsetFilling(
uint XeResolveColorCopySourcePixelAddressBytesYHalfPixelOffsetFilling(
XeResolveInfo resolve_info, uint2_xe pixel_index) {
return XeEdramOffsetInts(
return XeEdramOffsetBytes(
uint2_xe(pixel_index.x,
max(pixel_index.y,
resolve_info.half_pixel_offset_fill_source.y)) +
@@ -457,116 +461,114 @@ uint XeResolveEdramPixelStrideInts(XeResolveInfo resolve_info) {
}
}
#ifdef XE_RESOLVE_COPY_EDRAM_IS_UINT_VECTOR_BUFFER
#if XE_RESOLVE_COPY_EDRAM_BYTE_BUFFER_ALIGNMENT == 4
void XeResolveLoad2RGBAUnswappedPixelSamplesFromRaw(
param_uint_vector_buffer_xe(xe_resolve_edram)
param_next_after_uint_vector_buffer_xe
uint sample_address_ints, uint pixel_stride_ints, uint format_ints_log2,
uint format, out_param_xe(float4_xe, pixel_0),
param_byte_buffer_xe(xe_resolve_edram) param_next_after_byte_buffer_xe
uint sample_address_bytes, uint pixel_stride_bytes,
uint format_ints_log2, uint format, out_param_xe(float4_xe, pixel_0),
out_param_xe(float4_xe, pixel_1)) {
dont_flatten_xe if (format_ints_log2 != 0u) {
uint4_xe packed;
dont_flatten_xe if (pixel_stride_ints == 2u) {
packed = uint_vector_buffer_load4_xe(
xe_resolve_edram, sample_address_ints);
dont_flatten_xe if (pixel_stride_bytes == 8u) {
packed = byte_buffer_align4_load16u_xe(
xe_resolve_edram, sample_address_bytes);
} else {
packed.xy = uint_vector_buffer_load2_xe(
xe_resolve_edram, sample_address_ints);
packed.zw = uint_vector_buffer_load2_xe(
xe_resolve_edram, sample_address_ints + pixel_stride_ints);
packed.xy = byte_buffer_align4_load8u_xe(
xe_resolve_edram, sample_address_bytes);
packed.zw = byte_buffer_align4_load8u_xe(
xe_resolve_edram, sample_address_bytes + pixel_stride_bytes);
}
XeResolveUnpack64bpp2Samples(packed, format, pixel_0, pixel_1);
} else {
uint2_xe packed;
dont_flatten_xe if (pixel_stride_ints == 1u) {
packed = uint_vector_buffer_load2_xe(
xe_resolve_edram, sample_address_ints);
dont_flatten_xe if (pixel_stride_bytes == 4u) {
packed = byte_buffer_align4_load8u_xe(
xe_resolve_edram, sample_address_bytes);
} else {
packed.x = uint_vector_buffer_load1_xe(
xe_resolve_edram, sample_address_ints);
packed.y = uint_vector_buffer_load1_xe(
xe_resolve_edram, sample_address_ints + pixel_stride_ints);
packed.x = byte_buffer_align4_load4_xe(
xe_resolve_edram, sample_address_bytes);
packed.y = byte_buffer_align4_load4_xe(
xe_resolve_edram, sample_address_bytes + pixel_stride_bytes);
}
XeResolveUnpack32bpp2Samples(packed, format, pixel_0, pixel_1);
}
}
void XeResolveLoad4RGBAUnswappedPixelSamplesFromRaw(
param_uint_vector_buffer_xe(xe_resolve_edram)
param_next_after_uint_vector_buffer_xe
uint sample_address_ints, uint pixel_stride_ints, uint format_ints_log2,
uint format, out_param_xe(float4_xe, pixel_0),
param_byte_buffer_xe(xe_resolve_edram) param_next_after_byte_buffer_xe
uint sample_address_bytes, uint pixel_stride_bytes,
uint format_ints_log2, uint format, out_param_xe(float4_xe, pixel_0),
out_param_xe(float4_xe, pixel_1), out_param_xe(float4_xe, pixel_2),
out_param_xe(float4_xe, pixel_3)) {
dont_flatten_xe if (format_ints_log2 != 0u) {
uint4_xe packed_01, packed_23;
dont_flatten_xe if (pixel_stride_ints == 2u) {
packed_01 = uint_vector_buffer_load4_xe(
xe_resolve_edram, sample_address_ints);
packed_23 = uint_vector_buffer_load4_xe(
xe_resolve_edram, sample_address_ints + 4u);
dont_flatten_xe if (pixel_stride_bytes == 8u) {
packed_01 = byte_buffer_align4_load16u_xe(
xe_resolve_edram, sample_address_bytes);
packed_23 = byte_buffer_align4_load16u_xe(
xe_resolve_edram, sample_address_bytes + 16u);
} else {
packed_01.xy = uint_vector_buffer_load2_xe(
xe_resolve_edram, sample_address_ints);
packed_01.zw = uint_vector_buffer_load2_xe(
xe_resolve_edram, sample_address_ints + pixel_stride_ints);
packed_23.xy = uint_vector_buffer_load2_xe(
xe_resolve_edram, sample_address_ints + 2u * pixel_stride_ints);
packed_23.zw = uint_vector_buffer_load2_xe(
xe_resolve_edram, sample_address_ints + 3u * pixel_stride_ints);
packed_01.xy = byte_buffer_align4_load8u_xe(
xe_resolve_edram, sample_address_bytes);
packed_01.zw = byte_buffer_align4_load8u_xe(
xe_resolve_edram, sample_address_bytes + pixel_stride_bytes);
packed_23.xy = byte_buffer_align4_load8u_xe(
xe_resolve_edram, sample_address_bytes + 2u * pixel_stride_bytes);
packed_23.zw = byte_buffer_align4_load8u_xe(
xe_resolve_edram, sample_address_bytes + 3u * pixel_stride_bytes);
}
XeResolveUnpack64bpp4Samples(packed_01, packed_23, format, pixel_0,
pixel_1, pixel_2, pixel_3);
} else {
uint4_xe packed;
dont_flatten_xe if (pixel_stride_ints == 1u) {
packed = uint_vector_buffer_load4_xe(
xe_resolve_edram, sample_address_ints);
dont_flatten_xe if (pixel_stride_bytes == 4u) {
packed = byte_buffer_align4_load16u_xe(
xe_resolve_edram, sample_address_bytes);
} else {
packed.x = uint_vector_buffer_load1_xe(
xe_resolve_edram, sample_address_ints);
packed.y = uint_vector_buffer_load1_xe(
xe_resolve_edram, sample_address_ints + pixel_stride_ints);
packed.z = uint_vector_buffer_load1_xe(
xe_resolve_edram, sample_address_ints + 2u * pixel_stride_ints);
packed.w = uint_vector_buffer_load1_xe(
xe_resolve_edram, sample_address_ints + 3u * pixel_stride_ints);
packed.x = byte_buffer_align4_load4_xe(
xe_resolve_edram, sample_address_bytes);
packed.y = byte_buffer_align4_load4_xe(
xe_resolve_edram, sample_address_bytes + pixel_stride_bytes);
packed.z = byte_buffer_align4_load4_xe(
xe_resolve_edram, sample_address_bytes + 2u * pixel_stride_bytes);
packed.w = byte_buffer_align4_load4_xe(
xe_resolve_edram, sample_address_bytes + 3u * pixel_stride_bytes);
}
XeResolveUnpack32bpp4Samples(packed, format, pixel_0, pixel_1, pixel_2,
pixel_3);
}
}
// For red/blue swapping for 64bpp, pre-add 1 to sample_address_ints.
// For red/blue swapping for 64bpp, pre-add 4 to sample_address_bytes.
void XeResolveLoad8RedPixelSamplesFromRaw(
param_uint_vector_buffer_xe(xe_resolve_edram)
param_next_after_uint_vector_buffer_xe
uint sample_address_ints, uint pixel_stride_ints, uint format_ints_log2,
uint format, bool swap_32bpp, out_param_xe(float4_xe, pixels_0123),
param_byte_buffer_xe(xe_resolve_edram) param_next_after_byte_buffer_xe
uint sample_address_bytes, uint pixel_stride_bytes,
uint format_ints_log2, uint format, bool swap_32bpp,
out_param_xe(float4_xe, pixels_0123),
out_param_xe(float4_xe, pixels_4567)) {
uint4_xe packed_0123, packed_4567;
dont_flatten_xe if (pixel_stride_ints == 1u) {
packed_0123 = uint_vector_buffer_load4_xe(
xe_resolve_edram, sample_address_ints);
packed_4567 = uint_vector_buffer_load4_xe(
xe_resolve_edram, sample_address_ints + 4u);
dont_flatten_xe if (pixel_stride_bytes == 4u) {
packed_0123 = byte_buffer_align4_load16u_xe(
xe_resolve_edram, sample_address_bytes);
packed_4567 = byte_buffer_align4_load16u_xe(
xe_resolve_edram, sample_address_bytes + 16u);
} else {
packed_0123.x = uint_vector_buffer_load1_xe(
xe_resolve_edram, sample_address_ints);
packed_0123.y = uint_vector_buffer_load1_xe(
xe_resolve_edram, sample_address_ints + pixel_stride_ints);
packed_0123.z = uint_vector_buffer_load1_xe(
xe_resolve_edram, sample_address_ints + 2u * pixel_stride_ints);
packed_0123.w = uint_vector_buffer_load1_xe(
xe_resolve_edram, sample_address_ints + 3u * pixel_stride_ints);
packed_4567.x = uint_vector_buffer_load1_xe(
xe_resolve_edram, sample_address_ints + 4u * pixel_stride_ints);
packed_4567.y = uint_vector_buffer_load1_xe(
xe_resolve_edram, sample_address_ints + 5u * pixel_stride_ints);
packed_4567.z = uint_vector_buffer_load1_xe(
xe_resolve_edram, sample_address_ints + 6u * pixel_stride_ints);
packed_4567.w = uint_vector_buffer_load1_xe(
xe_resolve_edram, sample_address_ints + 7u * pixel_stride_ints);
packed_0123.x = byte_buffer_align4_load4_xe(
xe_resolve_edram, sample_address_bytes);
packed_0123.y = byte_buffer_align4_load4_xe(
xe_resolve_edram, sample_address_bytes + pixel_stride_bytes);
packed_0123.z = byte_buffer_align4_load4_xe(
xe_resolve_edram, sample_address_bytes + 2u * pixel_stride_bytes);
packed_0123.w = byte_buffer_align4_load4_xe(
xe_resolve_edram, sample_address_bytes + 3u * pixel_stride_bytes);
packed_4567.x = byte_buffer_align4_load4_xe(
xe_resolve_edram, sample_address_bytes + 4u * pixel_stride_bytes);
packed_4567.y = byte_buffer_align4_load4_xe(
xe_resolve_edram, sample_address_bytes + 5u * pixel_stride_bytes);
packed_4567.z = byte_buffer_align4_load4_xe(
xe_resolve_edram, sample_address_bytes + 6u * pixel_stride_bytes);
packed_4567.w = byte_buffer_align4_load4_xe(
xe_resolve_edram, sample_address_bytes + 7u * pixel_stride_bytes);
}
dont_flatten_xe if (format_ints_log2 != 0u) {
XeResolveUnpack64bpp8RedUnswappedSamples(packed_0123, packed_4567,
@@ -579,48 +581,46 @@ uint XeResolveEdramPixelStrideInts(XeResolveInfo resolve_info) {
}
void XeResolveLoad2RGBAColors(
param_uint_vector_buffer_xe(xe_resolve_edram)
param_next_after_uint_vector_buffer_xe
XeResolveInfo resolve_info, uint address_ints,
param_byte_buffer_xe(xe_resolve_edram) param_next_after_byte_buffer_xe
XeResolveInfo resolve_info, uint address_bytes,
out_param_xe(float4_xe, pixel_0), out_param_xe(float4_xe, pixel_1)) {
uint pixel_stride_ints = XeResolveEdramPixelStrideInts(resolve_info);
uint pixel_stride_bytes = XeResolveEdramPixelStrideBytes(resolve_info);
XeResolveLoad2RGBAUnswappedPixelSamplesFromRaw(
pass_uint_vector_buffer_xe(xe_resolve_edram)
pass_next_after_uint_vector_buffer_xe
address_ints, pixel_stride_ints, resolve_info.edram_format_ints_log2,
resolve_info.edram_format, pixel_0, pixel_1);
pass_byte_buffer_xe(xe_resolve_edram) pass_next_after_byte_buffer_xe
address_bytes, pixel_stride_bytes,
resolve_info.edram_format_ints_log2, resolve_info.edram_format,
pixel_0, pixel_1);
float exp_bias = resolve_info.dest_exp_bias_factor;
dont_flatten_xe
if (resolve_info.sample_select >= kXenosCopySampleSelect_01) {
uint tile_row_stride_ints = 80u * resolve_info.resolution_scale.x;
uint tile_row_stride_bytes = 4u * 80u * resolve_info.resolution_scale.x;
// TODO(Triang3l): Gamma-correct resolve for 8_8_8_8_GAMMA.
exp_bias *= 0.5f;
float4_xe msaa_resolve_pixel_0, msaa_resolve_pixel_1;
XeResolveLoad2RGBAUnswappedPixelSamplesFromRaw(
pass_uint_vector_buffer_xe(xe_resolve_edram)
pass_next_after_uint_vector_buffer_xe
address_ints + tile_row_stride_ints, pixel_stride_ints,
pass_byte_buffer_xe(xe_resolve_edram) pass_next_after_byte_buffer_xe
address_bytes + tile_row_stride_bytes, pixel_stride_bytes,
resolve_info.edram_format_ints_log2, resolve_info.edram_format,
msaa_resolve_pixel_0, msaa_resolve_pixel_1);
pixel_0 += msaa_resolve_pixel_0;
pixel_1 += msaa_resolve_pixel_1;
dont_flatten_xe
if (resolve_info.sample_select >= kXenosCopySampleSelect_0123) {
uint sample_stride_ints = 1u << resolve_info.edram_format_ints_log2;
uint sample_stride_bytes = 4u << resolve_info.edram_format_ints_log2;
exp_bias *= 0.5f;
XeResolveLoad2RGBAUnswappedPixelSamplesFromRaw(
pass_uint_vector_buffer_xe(xe_resolve_edram)
pass_next_after_uint_vector_buffer_xe
address_ints + sample_stride_ints, pixel_stride_ints,
pass_byte_buffer_xe(xe_resolve_edram)
pass_next_after_byte_buffer_xe
address_bytes + sample_stride_bytes, pixel_stride_bytes,
resolve_info.edram_format_ints_log2, resolve_info.edram_format,
msaa_resolve_pixel_0, msaa_resolve_pixel_1);
pixel_0 += msaa_resolve_pixel_0;
pixel_1 += msaa_resolve_pixel_1;
XeResolveLoad2RGBAUnswappedPixelSamplesFromRaw(
pass_uint_vector_buffer_xe(xe_resolve_edram)
pass_next_after_uint_vector_buffer_xe
address_ints + tile_row_stride_ints + sample_stride_ints,
pixel_stride_ints, resolve_info.edram_format_ints_log2,
pass_byte_buffer_xe(xe_resolve_edram)
pass_next_after_byte_buffer_xe
address_bytes + tile_row_stride_bytes + sample_stride_bytes,
pixel_stride_bytes, resolve_info.edram_format_ints_log2,
resolve_info.edram_format, msaa_resolve_pixel_0,
msaa_resolve_pixel_1);
pixel_0 += msaa_resolve_pixel_0;
@@ -650,21 +650,20 @@ uint XeResolveEdramPixelStrideInts(XeResolveInfo resolve_info) {
}
void XeResolveLoad4RGBAColors(
param_uint_vector_buffer_xe(xe_resolve_edram)
param_next_after_uint_vector_buffer_xe
XeResolveInfo resolve_info, uint address_ints,
param_byte_buffer_xe(xe_resolve_edram) param_next_after_byte_buffer_xe
XeResolveInfo resolve_info, uint address_bytes,
out_param_xe(float4_xe, pixel_0), out_param_xe(float4_xe, pixel_1),
out_param_xe(float4_xe, pixel_2), out_param_xe(float4_xe, pixel_3)) {
uint pixel_stride_ints = XeResolveEdramPixelStrideInts(resolve_info);
uint pixel_stride_bytes = XeResolveEdramPixelStrideBytes(resolve_info);
XeResolveLoad4RGBAUnswappedPixelSamplesFromRaw(
pass_uint_vector_buffer_xe(xe_resolve_edram)
pass_next_after_uint_vector_buffer_xe
address_ints, pixel_stride_ints, resolve_info.edram_format_ints_log2,
resolve_info.edram_format, pixel_0, pixel_1, pixel_2, pixel_3);
pass_byte_buffer_xe(xe_resolve_edram) pass_next_after_byte_buffer_xe
address_bytes, pixel_stride_bytes,
resolve_info.edram_format_ints_log2, resolve_info.edram_format,
pixel_0, pixel_1, pixel_2, pixel_3);
float exp_bias = resolve_info.dest_exp_bias_factor;
dont_flatten_xe
if (resolve_info.sample_select >= kXenosCopySampleSelect_01) {
uint tile_row_stride_ints = 80u * resolve_info.resolution_scale.x;
uint tile_row_stride_bytes = 4u * 80u * resolve_info.resolution_scale.x;
// TODO(Triang3l): Gamma-correct resolve for 8_8_8_8_GAMMA.
exp_bias *= 0.5f;
float4_xe msaa_resolve_pixel_0;
@@ -672,9 +671,8 @@ uint XeResolveEdramPixelStrideInts(XeResolveInfo resolve_info) {
float4_xe msaa_resolve_pixel_2;
float4_xe msaa_resolve_pixel_3;
XeResolveLoad4RGBAUnswappedPixelSamplesFromRaw(
pass_uint_vector_buffer_xe(xe_resolve_edram)
pass_next_after_uint_vector_buffer_xe
address_ints + tile_row_stride_ints, pixel_stride_ints,
pass_byte_buffer_xe(xe_resolve_edram) pass_next_after_byte_buffer_xe
address_bytes + tile_row_stride_bytes, pixel_stride_bytes,
resolve_info.edram_format_ints_log2, resolve_info.edram_format,
msaa_resolve_pixel_0, msaa_resolve_pixel_1, msaa_resolve_pixel_2,
msaa_resolve_pixel_3);
@@ -684,12 +682,12 @@ uint XeResolveEdramPixelStrideInts(XeResolveInfo resolve_info) {
pixel_3 += msaa_resolve_pixel_3;
dont_flatten_xe
if (resolve_info.sample_select >= kXenosCopySampleSelect_0123) {
uint sample_stride_ints = 1u << resolve_info.edram_format_ints_log2;
uint sample_stride_bytes = 4u << resolve_info.edram_format_ints_log2;
exp_bias *= 0.5f;
XeResolveLoad4RGBAUnswappedPixelSamplesFromRaw(
pass_uint_vector_buffer_xe(xe_resolve_edram)
pass_next_after_uint_vector_buffer_xe
address_ints + sample_stride_ints, pixel_stride_ints,
pass_byte_buffer_xe(xe_resolve_edram)
pass_next_after_byte_buffer_xe
address_bytes + sample_stride_bytes, pixel_stride_bytes,
resolve_info.edram_format_ints_log2, resolve_info.edram_format,
msaa_resolve_pixel_0, msaa_resolve_pixel_1, msaa_resolve_pixel_2,
msaa_resolve_pixel_3);
@@ -698,10 +696,10 @@ uint XeResolveEdramPixelStrideInts(XeResolveInfo resolve_info) {
pixel_2 += msaa_resolve_pixel_2;
pixel_3 += msaa_resolve_pixel_3;
XeResolveLoad4RGBAUnswappedPixelSamplesFromRaw(
pass_uint_vector_buffer_xe(xe_resolve_edram)
pass_next_after_uint_vector_buffer_xe
address_ints + tile_row_stride_ints + sample_stride_ints,
pixel_stride_ints, resolve_info.edram_format_ints_log2,
pass_byte_buffer_xe(xe_resolve_edram)
pass_next_after_byte_buffer_xe
address_bytes + tile_row_stride_bytes + sample_stride_bytes,
pixel_stride_bytes, resolve_info.edram_format_ints_log2,
resolve_info.edram_format, msaa_resolve_pixel_0,
msaa_resolve_pixel_1, msaa_resolve_pixel_2, msaa_resolve_pixel_3);
pixel_0 += msaa_resolve_pixel_0;
@@ -739,33 +737,30 @@ uint XeResolveEdramPixelStrideInts(XeResolveInfo resolve_info) {
}
void XeResolveLoad8RedColors(
param_uint_vector_buffer_xe(xe_resolve_edram)
param_next_after_uint_vector_buffer_xe
XeResolveInfo resolve_info, uint address_ints,
param_byte_buffer_xe(xe_resolve_edram) param_next_after_byte_buffer_xe
XeResolveInfo resolve_info, uint address_bytes,
out_param_xe(float4_xe, pixels_0123),
out_param_xe(float4_xe, pixels_4567)) {
uint pixel_stride_ints = XeResolveEdramPixelStrideInts(resolve_info);
if (resolve_info.dest_swap) {
uint pixel_stride_bytes = XeResolveEdramPixelStrideBytes(resolve_info);
if (resolve_info.dest_swap && resolve_info.edram_format_ints_log2 != 0u) {
// Likely want to load the blue part from the right half for 64bpp.
address_ints += resolve_info.edram_format_ints_log2;
address_bytes += 4u;
}
XeResolveLoad8RedPixelSamplesFromRaw(
pass_uint_vector_buffer_xe(xe_resolve_edram)
pass_next_after_uint_vector_buffer_xe
address_ints, pixel_stride_ints, resolve_info.edram_format_ints_log2,
resolve_info.edram_format, resolve_info.dest_swap, pixels_0123,
pixels_4567);
pass_byte_buffer_xe(xe_resolve_edram) pass_next_after_byte_buffer_xe
address_bytes, pixel_stride_bytes,
resolve_info.edram_format_ints_log2, resolve_info.edram_format,
resolve_info.dest_swap, pixels_0123, pixels_4567);
float exp_bias = resolve_info.dest_exp_bias_factor;
dont_flatten_xe
if (resolve_info.sample_select >= kXenosCopySampleSelect_01) {
uint tile_row_stride_ints = 80u * resolve_info.resolution_scale.x;
uint tile_row_stride_bytes = 4u * 80u * resolve_info.resolution_scale.x;
// TODO(Triang3l): Gamma-correct resolve for 8_8_8_8_GAMMA.
exp_bias *= 0.5f;
float4_xe msaa_resolve_pixels_0123, msaa_resolve_pixels_4567;
XeResolveLoad8RedPixelSamplesFromRaw(
pass_uint_vector_buffer_xe(xe_resolve_edram)
pass_next_after_uint_vector_buffer_xe
address_ints + tile_row_stride_ints, pixel_stride_ints,
pass_byte_buffer_xe(xe_resolve_edram) pass_next_after_byte_buffer_xe
address_bytes + tile_row_stride_bytes, pixel_stride_bytes,
resolve_info.edram_format_ints_log2, resolve_info.edram_format,
resolve_info.dest_swap, msaa_resolve_pixels_0123,
msaa_resolve_pixels_4567);
@@ -773,22 +768,22 @@ uint XeResolveEdramPixelStrideInts(XeResolveInfo resolve_info) {
pixels_4567 += msaa_resolve_pixels_4567;
dont_flatten_xe
if (resolve_info.sample_select >= kXenosCopySampleSelect_0123) {
uint sample_stride_ints = 1u << resolve_info.edram_format_ints_log2;
uint sample_stride_bytes = 4u << resolve_info.edram_format_ints_log2;
exp_bias *= 0.5f;
XeResolveLoad8RedPixelSamplesFromRaw(
pass_uint_vector_buffer_xe(xe_resolve_edram)
pass_next_after_uint_vector_buffer_xe
address_ints + sample_stride_ints, pixel_stride_ints,
pass_byte_buffer_xe(xe_resolve_edram)
pass_next_after_byte_buffer_xe
address_bytes + sample_stride_bytes, pixel_stride_bytes,
resolve_info.edram_format_ints_log2, resolve_info.edram_format,
resolve_info.dest_swap, msaa_resolve_pixels_0123,
msaa_resolve_pixels_4567);
pixels_0123 += msaa_resolve_pixels_0123;
pixels_4567 += msaa_resolve_pixels_4567;
XeResolveLoad8RedPixelSamplesFromRaw(
pass_uint_vector_buffer_xe(xe_resolve_edram)
pass_next_after_uint_vector_buffer_xe
address_ints + tile_row_stride_ints + sample_stride_ints,
pixel_stride_ints, resolve_info.edram_format_ints_log2,
pass_byte_buffer_xe(xe_resolve_edram)
pass_next_after_byte_buffer_xe
address_bytes + tile_row_stride_bytes + sample_stride_bytes,
pixel_stride_bytes, resolve_info.edram_format_ints_log2,
resolve_info.edram_format, resolve_info.dest_swap,
msaa_resolve_pixels_0123, msaa_resolve_pixels_4567);
pixels_0123 += msaa_resolve_pixels_0123;
@@ -798,7 +793,7 @@ uint XeResolveEdramPixelStrideInts(XeResolveInfo resolve_info) {
pixels_0123 *= exp_bias;
pixels_4567 *= exp_bias;
}
#endif // XE_RESOLVE_COPY_EDRAM_IS_UINT_VECTOR_BUFFER
#endif // XE_RESOLVE_COPY_EDRAM_BYTE_BUFFER_ALIGNMENT == 4
uint4_xe XeResolveSwapRedBlue_8_8_8_8(uint4_xe pixels) {
return (pixels & ~0xFF00FFu) | ((pixels & 0xFFu) << 16u) |
src/xenia/gpu/shaders/resolve_clear_32bpp.xesli
+13 -15
View File
@@ -10,15 +10,15 @@
#define XE_RESOLVE_CLEAR
#include "resolve.xesli"
array_buffer_wo_declare_xe(uint4_xe, xe_resolve_edram, set=0, binding=0, u0,
space0)
byte_buffer_align16_wo_declare_xe(xe_resolve_edram, set=0, binding=0, u0,
space0)
#define LOCAL_SIZE_X_XE 8
#define LOCAL_SIZE_Y_XE 8
#define LOCAL_SIZE_Z_XE 1
entry_bindings_begin_compute_xe
XE_RESOLVE_PUSH_CONST_BINDING
entry_binding_next_xe
array_buffer_wo_binding_xe(uint4_xe, xe_resolve_edram, buffer(1))
byte_buffer_wo_binding_xe(xe_resolve_edram, buffer(1))
entry_bindings_end_inputs_begin_compute_xe
entry_in_global_thread_id_xe
entry_inputs_end_code_begin_compute_xe
@@ -34,17 +34,15 @@ entry_inputs_end_code_begin_compute_xe
resolve_info.width_div_8_scaled << extent_scale.x) {
return;
}
uint address_int4s =
XeEdramOffsetInts(
(in_global_thread_id_xe.xy << uint2_xe(3u, 0u)) +
(resolve_info.edram_offset_scaled << extent_scale),
resolve_info.edram_base_tiles, true, resolve_info.edram_pitch_tiles,
kXenosMsaaSamples_1X, resolve_info.edram_is_depth, 0u, 0u,
resolve_info.resolution_scale)
>> 2u;
array_buffer_store_xe(xe_resolve_edram, address_int4s,
resolve_info.clear_value.xxxx);
array_buffer_store_xe(xe_resolve_edram, address_int4s + 1u,
resolve_info.clear_value.xxxx);
uint address = XeEdramOffsetBytes(
(in_global_thread_id_xe.xy << uint2_xe(3u, 0u)) +
(resolve_info.edram_offset_scaled << extent_scale),
resolve_info.edram_base_tiles, true, resolve_info.edram_pitch_tiles,
kXenosMsaaSamples_1X, resolve_info.edram_is_depth, 0u, 0u,
resolve_info.resolution_scale);
byte_buffer_align16_store16_xe(xe_resolve_edram, address,
resolve_info.clear_value.xxxx);
byte_buffer_align16_store16_xe(xe_resolve_edram, address + 16u,
resolve_info.clear_value.xxxx);
}
entry_code_end_compute_xe
src/xenia/gpu/shaders/resolve_clear_64bpp.xesli
+10 -12
View File
@@ -10,15 +10,15 @@
#define XE_RESOLVE_CLEAR
#include "resolve.xesli"
array_buffer_wo_declare_xe(uint4_xe, xe_resolve_edram, set=0, binding=0, u0,
space0)
byte_buffer_align16_wo_declare_xe(xe_resolve_edram, set=0, binding=0, u0,
space0)
#define LOCAL_SIZE_X_XE 8
#define LOCAL_SIZE_Y_XE 8
#define LOCAL_SIZE_Z_XE 1
entry_bindings_begin_compute_xe
XE_RESOLVE_PUSH_CONST_BINDING
entry_binding_next_xe
array_buffer_wo_binding_xe(uint4_xe, xe_resolve_edram, buffer(1))
byte_buffer_wo_binding_xe(xe_resolve_edram, buffer(1))
entry_bindings_end_inputs_begin_compute_xe
entry_in_global_thread_id_xe
entry_inputs_end_code_begin_compute_xe
@@ -34,17 +34,15 @@ entry_inputs_end_code_begin_compute_xe
resolve_info.width_div_8_scaled << extent_scale.x) {
return;
}
uint address_int4s =
XeEdramOffsetInts(
(in_global_thread_id_xe.xy << uint2_xe(3u, 0u)) +
(resolve_info.edram_offset_scaled << extent_scale),
resolve_info.edram_base_tiles, true, resolve_info.edram_pitch_tiles,
kXenosMsaaSamples_1X, false, 1u, 0u, resolve_info.resolution_scale)
>> 2u;
uint address = XeEdramOffsetBytes(
(in_global_thread_id_xe.xy << uint2_xe(3u, 0u)) +
(resolve_info.edram_offset_scaled << extent_scale),
resolve_info.edram_base_tiles, true, resolve_info.edram_pitch_tiles,
kXenosMsaaSamples_1X, false, 1u, 0u, resolve_info.resolution_scale);
uint i;
unroll_xe for (i = 0u; i < 4u; ++i) {
array_buffer_store_xe(xe_resolve_edram, address_int4s + i,
resolve_info.clear_value.xyxy);
byte_buffer_align16_store16_xe(xe_resolve_edram, address + (i << 4),
resolve_info.clear_value.xyxy);
}
}
entry_code_end_compute_xe

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