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https://github.com/izzy2lost/xenia-edge.git
synced 2026-07-06 00:20:26 -07:00
[A64/Vector] Handle constant converts and shamt types
- Load constant vectors before convert ops - Use size_t comparisons for lvsl/lvsr tables
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@@ -32,10 +32,14 @@ struct VECTOR_CONVERT_I2F
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: Sequence<VECTOR_CONVERT_I2F,
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I<OPCODE_VECTOR_CONVERT_I2F, V128Op, V128Op>> {
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static void Emit(A64Emitter& e, const EmitArgType& i) {
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const QReg src = i.src1.is_constant ? Q0 : i.src1;
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if (i.src1.is_constant) {
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e.LoadConstantV(src, i.src1.constant());
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}
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if (i.instr->flags & ARITHMETIC_UNSIGNED) {
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e.UCVTF(i.dest.reg().S4(), i.src1.reg().S4());
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e.UCVTF(i.dest.reg().S4(), src.S4());
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} else {
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e.SCVTF(i.dest.reg().S4(), i.src1.reg().S4());
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e.SCVTF(i.dest.reg().S4(), src.S4());
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}
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}
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};
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@@ -48,10 +52,14 @@ struct VECTOR_CONVERT_F2I
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: Sequence<VECTOR_CONVERT_F2I,
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I<OPCODE_VECTOR_CONVERT_F2I, V128Op, V128Op>> {
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static void Emit(A64Emitter& e, const EmitArgType& i) {
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const QReg src = i.src1.is_constant ? Q0 : i.src1;
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if (i.src1.is_constant) {
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e.LoadConstantV(src, i.src1.constant());
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}
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if (i.instr->flags & ARITHMETIC_UNSIGNED) {
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e.FCVTZU(i.dest.reg().S4(), i.src1.reg().S4());
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e.FCVTZU(i.dest.reg().S4(), src.S4());
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} else {
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e.FCVTZS(i.dest.reg().S4(), i.src1.reg().S4());
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e.FCVTZS(i.dest.reg().S4(), src.S4());
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}
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}
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};
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@@ -83,7 +91,7 @@ struct LOAD_VECTOR_SHL_I8
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static void Emit(A64Emitter& e, const EmitArgType& i) {
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if (i.src1.is_constant) {
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auto sh = i.src1.constant();
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assert_true(sh < xe::countof(lvsl_table));
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assert_true(static_cast<size_t>(sh) < xe::countof(lvsl_table));
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e.MOV(X0, reinterpret_cast<uintptr_t>(&lvsl_table[sh]));
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e.LDR(i.dest, X0);
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} else {
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@@ -121,7 +129,7 @@ struct LOAD_VECTOR_SHR_I8
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static void Emit(A64Emitter& e, const EmitArgType& i) {
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if (i.src1.is_constant) {
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auto sh = i.src1.constant();
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assert_true(sh < xe::countof(lvsr_table));
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assert_true(static_cast<size_t>(sh) < xe::countof(lvsr_table));
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e.MOV(X0, reinterpret_cast<uintptr_t>(&lvsr_table[sh]));
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e.LDR(i.dest, X0);
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} else {
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