[GPU] Simplify local X offsetting with resolution scaling

Switch between even and odd 16-byte element sequences along X by simply
flipping a bit rather than going to a different resolution-scaled group of
pixels, by increasing the size of the group within the constraints imposed
by tiling.
This commit is contained in:
Triang3l
2026-01-13 23:14:15 +03:00
parent 76c531bff2
commit 0f23f05683
169 changed files with 61380 additions and 64785 deletions
+2 -7
View File
@@ -1906,13 +1906,8 @@ bool D3D12TextureCache::LoadTextureDataFromResidentMemoryImpl(Texture& texture,
}
const texture_util::TextureGuestLayout::Level& level_guest_layout =
is_base ? guest_layout.base : guest_layout.mips[level];
uint32_t level_guest_pitch = level_guest_layout.row_pitch_bytes;
if (texture_key.tiled) {
// Shaders expect pitch in blocks for tiled textures.
level_guest_pitch /= bytes_per_block;
assert_zero(level_guest_pitch & (xenos::kTextureTileWidthHeight - 1));
}
load_constants.guest_pitch_aligned = level_guest_pitch;
load_constants.guest_pitch_aligned =
level_guest_layout.row_pitch_bytes / bytes_per_block;
load_constants.guest_z_stride_block_rows_aligned =
level_guest_layout.z_slice_stride_block_rows;
assert_true(dimension != xenos::DataDimension::k3D ||
@@ -178,7 +178,7 @@ if_nz r0.z
bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r1.xyzw
endif
store_uav_typed U0[0].xyzw, r0.xxxx, r5.xyzw
iadd r0.x, r0.x, l(2)
xor r0.x, r0.x, l(2)
if_nz r0.y
ishl r1.xyzw, r6.xyzw, l(8, 8, 8, 8)
and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00)
@@ -197,10 +197,10 @@ ret
const BYTE resolve_fast_32bpp_1x2xmsaa_cs[] =
{
68, 88, 66, 67, 188, 44,
61, 210, 116, 48, 173, 251,
2, 141, 146, 110, 153, 13,
14, 111, 1, 0, 0, 0,
68, 88, 66, 67, 76, 81,
6, 210, 127, 11, 121, 14,
72, 0, 88, 214, 164, 189,
19, 242, 1, 0, 0, 0,
96, 22, 0, 0, 5, 0,
0, 0, 52, 0, 0, 0,
208, 2, 0, 0, 224, 2,
@@ -1060,7 +1060,7 @@ const BYTE resolve_fast_32bpp_1x2xmsaa_cs[] =
0, 0, 0, 0, 6, 0,
16, 0, 0, 0, 0, 0,
70, 14, 16, 0, 5, 0,
0, 0, 30, 0, 0, 7,
0, 0, 87, 0, 0, 7,
18, 0, 16, 0, 0, 0,
0, 0, 10, 0, 16, 0,
0, 0, 0, 0, 1, 64,
@@ -1130,8 +1130,8 @@ const BYTE resolve_fast_32bpp_1x2xmsaa_cs[] =
146, 0, 0, 0, 9, 0,
0, 0, 0, 0, 0, 0,
1, 0, 0, 0, 0, 0,
0, 0, 37, 0, 0, 0,
30, 0, 0, 0, 7, 0,
0, 0, 36, 0, 0, 0,
31, 0, 0, 0, 7, 0,
0, 0, 11, 0, 0, 0,
0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0,
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@@ -191,7 +191,7 @@ if_nz r0.z
bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r1.xyzw
endif
store_uav_typed U0[0].xyzw, r0.xxxx, r5.xyzw
iadd r0.x, r0.x, l(2)
xor r0.x, r0.x, l(2)
if_nz r0.y
ishl r1.xyzw, r6.xyzw, l(8, 8, 8, 8)
and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00)
@@ -210,10 +210,10 @@ ret
const BYTE resolve_fast_32bpp_4xmsaa_cs[] =
{
68, 88, 66, 67, 43, 2,
242, 123, 12, 3, 198, 28,
199, 75, 190, 87, 252, 165,
36, 150, 1, 0, 0, 0,
68, 88, 66, 67, 105, 223,
164, 73, 249, 32, 219, 132,
168, 214, 106, 172, 186, 75,
112, 213, 1, 0, 0, 0,
184, 23, 0, 0, 5, 0,
0, 0, 52, 0, 0, 0,
208, 2, 0, 0, 224, 2,
@@ -1130,7 +1130,7 @@ const BYTE resolve_fast_32bpp_4xmsaa_cs[] =
0, 0, 0, 0, 0, 0,
6, 0, 16, 0, 0, 0,
0, 0, 70, 14, 16, 0,
5, 0, 0, 0, 30, 0,
5, 0, 0, 0, 87, 0,
0, 7, 18, 0, 16, 0,
0, 0, 0, 0, 10, 0,
16, 0, 0, 0, 0, 0,
@@ -1200,8 +1200,8 @@ const BYTE resolve_fast_32bpp_4xmsaa_cs[] =
0, 0, 159, 0, 0, 0,
9, 0, 0, 0, 0, 0,
0, 0, 1, 0, 0, 0,
0, 0, 0, 0, 40, 0,
0, 0, 28, 0, 0, 0,
0, 0, 0, 0, 39, 0,
0, 0, 29, 0, 0, 0,
9, 0, 0, 0, 12, 0,
0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0,
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