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9363ee31ab53fc0fd39fbe5936d9c00a2f4e54a4
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70 Commits
Author SHA1 Message Date
Alexander GrafandKevin Wolf f675d5c889 config: add ahci for pci capable machines 
This patch enables AHCI for all machines supporting PCI.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
 2010-12-17 16:11:02 +01:00
Alexander GrafandKevin Wolf 461d13d31c config: move ide core and pci to pci.mak 
Every device that can do PCI should also be able to do IDE. So let's move
the IDE definitions over to pci.mak.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
 2010-12-17 16:11:02 +01:00
Paul Brook a4c75a21f3 Split out common pcnet code 
The core pcnet emulation code is used by both the PCI "pcnet" device
and the SPARC "lance" device.  Split the common code frm the PCI code so
that that can be configures independantly.

Signed-off-by: Paul Brook <paul@codesourcery.com>
 2010-11-27 11:23:34 +00:00
Paul Brook 129cac5b5a Remove PCI from sparc32 target 
None of the (current) sparc32 machines have a PCI bus, so remove the PCI
code from these configs.

Signed-off-by: Paul Brook <paul@codesourcery.com>
 2010-11-27 10:33:55 +00:00
Paul Brook 050e27c8c9 Fix previous commit 
Fix breakage from previous commit (missing pci.mak, and incorrect
include in default-configs/s390x-softmmu.mak).

Signed-off-by: Paul Brook <paul@codesourcery.com>
 2010-11-27 00:34:15 +00:00
Paul Brook 01af7daf55 VirtIO config option 
Make virtio devices optional.  Selecting individual devices is not useful
as the host bindings are all in one file.

Signed-off-by: Paul Brook <paul@codesourcery.com>
 2010-11-27 00:06:13 +00:00
Paul Brook f8f5cfbaa4 PCI config include 
Split PCI config options into a separate file

Signed-off-by: Paul Brook <paul@codesourcery.com>
 2010-11-27 00:06:13 +00:00
Edgar E. Iglesias 2c50e26efd powerpc: Add a virtex5 ml507 refdesign board 
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
 2010-09-30 18:53:30 +02:00
Blue Swirl 08af49da7e piix4: compile only once 
Compile piix4 in hwlib. Two compilations less for the full build.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2010-07-03 06:49:47 +00:00
Huacai ChenandAurelien Jarno 016512f3d4 MIPS: Initial support of VIA IDE controller used by fulong mini pc 
Signed-off-by: Huacai Chen <zltjiangshi@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 2010-06-29 23:07:52 +02:00
Huacai ChenandAurelien Jarno d0f7453d13 MIPS: Initial support of bonito north bridge used by fulong mini pc 
Signed-off-by: Huacai Chen <zltjiangshi@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 2010-06-29 23:07:51 +02:00
Blue Swirl 4556bd8b25 Compile dma only once 
Use a qemu_irq to request CPU exit.

7 compilations less for the full build.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2010-05-22 08:00:52 +00:00
Blue Swirl 956a3e6bb7 Compile pckbd only once 
Use a qemu_irq to indicate A20 line changes. Move I/O port 92
to pckbd.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2010-05-22 07:59:01 +00:00
Blue Swirl c69ea0dff2 Compile acpi_piix4, apm and pm_smbus only once 
12 compilations less for the full build.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2010-05-17 19:32:37 +00:00
Artyom TarasenkoandBlue Swirl 676d9b9b88 sparc32 use empty_slot for missing RAM v1 
use empty_slot device for the RAM which is not installed

Models without ECC don't trap when missing ram is accessed.

v0->v1 compile only once and fix indentation

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2010-04-18 08:55:20 +00:00
Aurelien Jarno 5ba9e9522c sh_pci: fix memory and I/O access 
Since commit 8da3ff1809 ("MMIO callback
interface changes"), the addresses passed to the I/O functions are an
offset to the start of the area. As a consequence, there is no need to
correct the address using the value of IOBR. This make possible the use
of the default MMIO functions. Moreover the addresses are now remaped
when the value if IOBR change.

The memory area corresponds to the devices behing the PCI bus, it should
not be mapped by the PCI controller. Remove the corresponding code.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 2010-04-13 20:17:24 +02:00
Aurelien Jarno 56839a19e8 hw/r2d: add flash memory 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 2010-04-11 03:58:19 +02:00
Paul Brook 61d3cf93e2 OHCI qdev conversion 
Convert remaining OHCI devices to QDEV interface.

Signed-off-by: Paul Brook <paul@codesourcery.com>
 2010-04-05 19:57:40 +01:00
Blue Swirl 2b5eb37123 Compile most PPC devices only once 
Make byte swapping unconditional since PPC is big endian.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2010-03-30 17:36:23 +00:00
Blue Swirl add85a76bb Compile prep_pci only once 
Make byte swapping unconditional since PPC is big endian.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2010-03-29 19:24:04 +00:00
Blue Swirl 5c4532ee78 Compile openpic only once 
Replace TARGET_PAGE_SIZE with 4096. Make byte swapping unconditional
since PPC is big endian.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2010-03-29 19:23:59 +00:00
Blue Swirl 02c7c992f0 Compile ide/macio only once 
Replace TARGET_PAGE_SIZE with 4096. Make byte swapping unconditional
since PPC is big endian.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2010-03-29 19:23:57 +00:00
Blue Swirl 3d08ff698b Compile pflash_cfi01 only once 
Push TARGET_WORDS_BIGENDIAN dependency to board level.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2010-03-29 19:23:56 +00:00
Blue Swirl 5f9fc5ad7e Compile pflash_cfi02 only once 
Push TARGET_WORDS_BIGENDIAN dependency to board level.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2010-03-29 19:23:55 +00:00
Blue Swirl 53b67b3052 Compile acpi only once 
Use qemu_irqs to trigger CMOS S3 and SMI events.

Avoid using kvm.h, which uses CPUState.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2010-03-29 19:23:52 +00:00