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Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-signed' into staging

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qemu-sparc update

# gpg: Signature made Thu 21 Sep 2017 08:42:30 BST
# gpg:                using RSA key 0x5BC2C56FAE0F321F
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>"
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C  C9C4 5BC2 C56F AE0F 321F

* remotes/mcayland/tags/qemu-sparc-signed:
  sun4u: use sunhme as default on-board NIC
  net: add Sun HME (Happy Meal Ethernet) on-board NIC

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
2017-09-21 10:56:09 +01:00
parent 211ad3b412 8d9329719c
commit ff5667ed53
7 changed files with 1035 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files
default-configs/sparc64-softmmu.mak
+1
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@@ -12,6 +12,7 @@ CONFIG_FDC=y
CONFIG_IDE_ISA=y
CONFIG_IDE_CMD646=y
CONFIG_PCI_APB=y
CONFIG_SUNHME=y
CONFIG_MC146818RTC=y
CONFIG_ISA_TESTDEV=y
CONFIG_EMPTY_SLOT=y
hw/net/Makefile.objs
+1
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@@ -26,6 +26,7 @@ common-obj-$(CONFIG_IMX_FEC) += imx_fec.o
common-obj-$(CONFIG_CADENCE) += cadence_gem.o
common-obj-$(CONFIG_STELLARIS_ENET) += stellaris_enet.o
common-obj-$(CONFIG_LANCE) += lance.o
common-obj-$(CONFIG_SUNHME) += sunhme.o
common-obj-$(CONFIG_FTGMAC100) += ftgmac100.o
common-obj-$(CONFIG_SUNGEM) += sungem.o
hw/net/sunhme.c
+978
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File diff suppressed because it is too large Load Diff
hw/net/trace-events
+29
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@@ -322,3 +322,32 @@ sungem_mmio_mif_write(uint64_t addr, uint64_t val) "MMIO mif write to 0x%"PRIx64
sungem_mmio_mif_read(uint64_t addr, uint64_t val) "MMIO mif read from 0x%"PRIx64" val=0x%"PRIx64
sungem_mmio_pcs_write(uint64_t addr, uint64_t val) "MMIO pcs write to 0x%"PRIx64" val=0x%"PRIx64
sungem_mmio_pcs_read(uint64_t addr, uint64_t val) "MMIO pcs read from 0x%"PRIx64" val=0x%"PRIx64
# hw/net/sunhme.c
sunhme_seb_write(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64
sunhme_seb_read(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64
sunhme_etx_write(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64
sunhme_etx_read(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64
sunhme_erx_write(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64
sunhme_erx_read(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64
sunhme_mac_write(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64
sunhme_mac_read(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64
sunhme_mii_write(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64
sunhme_mii_read(uint8_t addr, uint16_t value) "addr 0x%x value 0x%x"
sunhme_mif_write(uint8_t addr, uint16_t value) "addr 0x%x value 0x%x"
sunhme_mif_read(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64
sunhme_tx_desc(uint64_t buffer, uint32_t status, int cr, int nr) "addr 0x%"PRIx64" status 0x%"PRIx32 " (ring %d/%d)"
sunhme_tx_xsum_add(int offset, int len) "adding xsum at offset %d, len %d"
sunhme_tx_xsum_stuff(uint16_t xsum, int offset) "stuffing xsum 0x%x at offset %d"
sunhme_tx_done(int len) "successfully transmitted frame with len %d"
sunhme_rx_incoming(size_t len) "received incoming frame with len %zu"
sunhme_rx_filter_destmac(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "received frame for MAC: %02x:%02x:%02x:%02x:%02x:%02x"
sunhme_rx_filter_local_match(void) "incoming frame matches local MAC address"
sunhme_rx_filter_bcast_match(void) "incoming frame matches broadcast MAC address"
sunhme_rx_filter_hash_nomatch(void) "incoming MAC address not in hash table"
sunhme_rx_filter_hash_match(void) "incoming MAC address found in hash table"
sunhme_rx_filter_promisc_match(void) "incoming frame accepted due to promiscuous mode"
sunhme_rx_filter_reject(void) "rejecting incoming frame"
sunhme_rx_filter_accept(void) "accepting incoming frame"
sunhme_rx_desc(uint32_t addr, int offset, uint32_t status, int len, int cr, int nr) "addr 0x%"PRIx32"(+0x%x) status 0x%"PRIx32 " len %d (ring %d/%d)"
sunhme_rx_xsum_calc(uint16_t xsum) "calculated incoming xsum as 0x%x"
hw/sparc64/sun4u.c
+21 -4
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@@ -427,7 +427,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
unsigned int i;
uint64_t initrd_addr, initrd_size, kernel_addr, kernel_size, kernel_entry;
PCIBus *pci_bus, *pci_busA, *pci_busB;
PCIDevice *ebus;
PCIDevice *ebus, *pci_dev;
ISABus *isa_bus;
SysBusDevice *s;
qemu_irq *ivec_irqs, *pbm_irqs;
@@ -435,6 +435,8 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
DriveInfo *fd[MAX_FD];
DeviceState *dev;
FWCfgState *fw_cfg;
NICInfo *nd;
int onboard_nic_idx;
/* init CPUs */
cpu = sparc64_cpu_devinit(machine->cpu_model, hwdef->default_cpu_model,
@@ -464,8 +466,23 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
serial_hds_isa_init(isa_bus, i, MAX_SERIAL_PORTS);
parallel_hds_isa_init(isa_bus, MAX_PARALLEL_PORTS);
for(i = 0; i < nb_nics; i++)
pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL);
onboard_nic_idx = -1;
for (i = 0; i < nb_nics; i++) {
nd = &nd_table[i];
if (onboard_nic_idx == -1 &&
(!nd->model || strcmp(nd->model, "sunhme") == 0)) {
pci_dev = pci_create(pci_bus, -1, "sunhme");
dev = &pci_dev->qdev;
qdev_set_nic_properties(dev, nd);
qdev_init_nofail(dev);
onboard_nic_idx = i;
} else {
pci_nic_init_nofail(nd, pci_bus, "ne2k_pci", NULL);
}
}
onboard_nic_idx = MAX(onboard_nic_idx, 0);
ide_drive_get(hd, ARRAY_SIZE(hd));
@@ -510,7 +527,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
/* XXX: need an option to load a NVRAM image */
0,
graphic_width, graphic_height, graphic_depth,
(uint8_t *)&nd_table[0].macaddr);
(uint8_t *)&nd_table[onboard_nic_idx].macaddr);
dev = qdev_create(NULL, TYPE_FW_CFG_IO);
qdev_prop_set_bit(dev, "dma_enabled", false);
include/hw/net/mii.h
+4
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@@ -104,6 +104,10 @@
#define RTL8211E_PHYID1 0x001c
#define RTL8211E_PHYID2 0xc915
/* National Semiconductor DP83840 */
#define DP83840_PHYID1 0x2000
#define DP83840_PHYID2 0x5c01
/* National Semiconductor DP83848 */
#define DP83848_PHYID1 0x2000
#define DP83848_PHYID2 0x5c90
include/hw/pci/pci_ids.h
+1
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@@ -187,6 +187,7 @@
#define PCI_VENDOR_ID_SUN 0x108e
#define PCI_DEVICE_ID_SUN_EBUS 0x1000
#define PCI_DEVICE_ID_SUN_HME 0x1001
#define PCI_DEVICE_ID_SUN_SIMBA 0x5000
#define PCI_DEVICE_ID_SUN_SABRE 0xa000