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Merge tag 'pull-tcg-20250623' of https://gitlab.com/rth7680/qemu into staging

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linux-user: fix resource leaks in gen-vdso
tcg: Add ptr+ofs alternatives to some gvec functions

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# gpg: Signature made Mon 23 Jun 2025 21:17:39 EDT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20250623' of https://gitlab.com/rth7680/qemu:
  linux-user: fix resource leaks in gen-vdso
  linux-user/aarch64: Update hwcap bits from 6.14
  tcg: Split out tcg_gen_gvec_dup_imm_var
  tcg: Split out tcg_gen_gvec_{add,sub}_var
  tcg: Split out tcg_gen_gvec_mov_var
  tcg: Split out tcg_gen_gvec_3_var
  tcg: Split out tcg_gen_gvec_2_var
  tcg: Add base arguments to check_overlap_[234]
  tcg: Add dbase argument to expand_clr
  tcg: Add dbase argument to do_dup
  tcg: Add dbase argument to do_dup_store

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Hajnoczi
2025-06-24 10:38:38 -04:00
parent 24c00b7541 5171b794d4
commit f9a3def17b
4 changed files with 383 additions and 162 deletions
Download Patch File Download Diff File Expand all files Collapse all files
include/tcg/tcg-op-gvec-common.h
+58 -5
View File
@@ -227,25 +227,66 @@ typedef struct {
bool prefer_i64;
} GVecGen4i;
/* Expand (dbase+dofs) = op(abase+aofs), length @oprsz, clearing to @maxsz. */
void tcg_gen_gvec_2_var(TCGv_ptr dbase, uint32_t dofs,
TCGv_ptr abase, uint32_t aofs,
uint32_t oprsz, uint32_t maxsz, const GVecGen2 *op);
/* Similarly, expand (env+dofs) = op(env+aofs). */
void tcg_gen_gvec_2(uint32_t dofs, uint32_t aofs,
uint32_t oprsz, uint32_t maxsz, const GVecGen2 *);
uint32_t oprsz, uint32_t maxsz, const GVecGen2 *op);
/* Similarly, expand (env+dofs) = op(env+aofs, c). */
void tcg_gen_gvec_2i(uint32_t dofs, uint32_t aofs, uint32_t oprsz,
uint32_t maxsz, int64_t c, const GVecGen2i *);
uint32_t maxsz, int64_t c, const GVecGen2i *op);
/* Similarly, expand (env+dofs) = op(env+aofs, s). */
void tcg_gen_gvec_2s(uint32_t dofs, uint32_t aofs, uint32_t oprsz,
uint32_t maxsz, TCGv_i64 c, const GVecGen2s *);
uint32_t maxsz, TCGv_i64 c, const GVecGen2s *op);
/*
* Expand (dbase+dofs) = op(abase+aofs, bbase+bofs),
* length @oprsz, clearing to @maxsz.
*/
void tcg_gen_gvec_3_var(TCGv_ptr dbase, uint32_t dofs,
TCGv_ptr abase, uint32_t aofs,
TCGv_ptr bbase, uint32_t bofs,
uint32_t oprsz, uint32_t maxsz, const GVecGen3 *op);
/* Similarly, expand (env+dofs) = op(env+aofs, env+bofs). */
void tcg_gen_gvec_3(uint32_t dofs, uint32_t aofs, uint32_t bofs,
uint32_t oprsz, uint32_t maxsz, const GVecGen3 *);
uint32_t oprsz, uint32_t maxsz, const GVecGen3 *op);
/*
* Depending on op->load_dest and op->write_aofs, expand
* (env+dofs) = op(env+aofs, env+bofs, c)
* or
* (env+dofs) = op(env+dofs, env+aofs, env+bofs, c)
* or
* (env+dofs), (env+aofs) = op(env+aofs, env+bofs, c)
* or
* (env+dofs), (env+aofs) = op(env+dofs, env+aofs, env+bofs, c)
*/
void tcg_gen_gvec_3i(uint32_t dofs, uint32_t aofs, uint32_t bofs,
uint32_t oprsz, uint32_t maxsz, int64_t c,
const GVecGen3i *);
const GVecGen3i *op);
/*
* Depending on op->write_aofs, expand
* (env+dofs) = op(env+aofs, env+bofs, env+cofs)
* or
* (env+dofs), (env+aofs) = op(env+aofs, env+bofs, env+cofs)
*/
void tcg_gen_gvec_4(uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t cofs,
uint32_t oprsz, uint32_t maxsz, const GVecGen4 *);
/* Expand (env+dofs) = op(env+aofs, env+bofs, env+cofs, c). */
void tcg_gen_gvec_4i(uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t cofs,
uint32_t oprsz, uint32_t maxsz, int64_t c,
const GVecGen4i *);
/* Expand a specific vector operation. */
void tcg_gen_gvec_mov_var(unsigned vece, TCGv_ptr dbase, uint32_t dofs,
TCGv_ptr abase, uint32_t aofs,
uint32_t oprsz, uint32_t maxsz);
void tcg_gen_gvec_mov(unsigned vece, uint32_t dofs, uint32_t aofs,
uint32_t oprsz, uint32_t maxsz);
void tcg_gen_gvec_not(unsigned vece, uint32_t dofs, uint32_t aofs,
@@ -255,6 +296,15 @@ void tcg_gen_gvec_neg(unsigned vece, uint32_t dofs, uint32_t aofs,
void tcg_gen_gvec_abs(unsigned vece, uint32_t dofs, uint32_t aofs,
uint32_t oprsz, uint32_t maxsz);
void tcg_gen_gvec_add_var(unsigned vece, TCGv_ptr dbase, uint32_t dofs,
TCGv_ptr abase, uint32_t aofs,
TCGv_ptr bbase, uint32_t bofs,
uint32_t oprsz, uint32_t maxsz);
void tcg_gen_gvec_sub_var(unsigned vece, TCGv_ptr dbase, uint32_t dofs,
TCGv_ptr abase, uint32_t aofs,
TCGv_ptr bbase, uint32_t bofs,
uint32_t oprsz, uint32_t maxsz);
void tcg_gen_gvec_add(unsigned vece, uint32_t dofs, uint32_t aofs,
uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
void tcg_gen_gvec_sub(unsigned vece, uint32_t dofs, uint32_t aofs,
@@ -336,6 +386,9 @@ void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,
void tcg_gen_gvec_dup_i64(unsigned vece, uint32_t dofs, uint32_t s,
uint32_t m, TCGv_i64);
void tcg_gen_gvec_dup_imm_var(unsigned vece, TCGv_ptr dbase, uint32_t dofs,
uint32_t oprsz, uint32_t maxsz, uint64_t imm);
void tcg_gen_gvec_shli(unsigned vece, uint32_t dofs, uint32_t aofs,
int64_t shift, uint32_t oprsz, uint32_t maxsz);
void tcg_gen_gvec_shri(unsigned vece, uint32_t dofs, uint32_t aofs,
linux-user/elfload.c
+72 -3
View File
@@ -751,7 +751,23 @@ enum {
ARM_HWCAP_A64_SSBS = 1 << 28,
ARM_HWCAP_A64_SB = 1 << 29,
ARM_HWCAP_A64_PACA = 1 << 30,
ARM_HWCAP_A64_PACG = 1UL << 31,
ARM_HWCAP_A64_PACG = 1ULL << 31,
ARM_HWCAP_A64_GCS = 1ULL << 32,
ARM_HWCAP_A64_CMPBR = 1ULL << 33,
ARM_HWCAP_A64_FPRCVT = 1ULL << 34,
ARM_HWCAP_A64_F8MM8 = 1ULL << 35,
ARM_HWCAP_A64_F8MM4 = 1ULL << 36,
ARM_HWCAP_A64_SVE_F16MM = 1ULL << 37,
ARM_HWCAP_A64_SVE_ELTPERM = 1ULL << 38,
ARM_HWCAP_A64_SVE_AES2 = 1ULL << 39,
ARM_HWCAP_A64_SVE_BFSCALE = 1ULL << 40,
ARM_HWCAP_A64_SVE2P2 = 1ULL << 41,
ARM_HWCAP_A64_SME2P2 = 1ULL << 42,
ARM_HWCAP_A64_SME_SBITPERM = 1ULL << 43,
ARM_HWCAP_A64_SME_AES = 1ULL << 44,
ARM_HWCAP_A64_SME_SFEXPA = 1ULL << 45,
ARM_HWCAP_A64_SME_STMOP = 1ULL << 46,
ARM_HWCAP_A64_SME_SMOP4 = 1ULL << 47,
ARM_HWCAP2_A64_DCPODP = 1 << 0,
ARM_HWCAP2_A64_SVE2 = 1 << 1,
@@ -798,6 +814,25 @@ enum {
ARM_HWCAP2_A64_SME_F16F16 = 1ULL << 42,
ARM_HWCAP2_A64_MOPS = 1ULL << 43,
ARM_HWCAP2_A64_HBC = 1ULL << 44,
ARM_HWCAP2_A64_SVE_B16B16 = 1ULL << 45,
ARM_HWCAP2_A64_LRCPC3 = 1ULL << 46,
ARM_HWCAP2_A64_LSE128 = 1ULL << 47,
ARM_HWCAP2_A64_FPMR = 1ULL << 48,
ARM_HWCAP2_A64_LUT = 1ULL << 49,
ARM_HWCAP2_A64_FAMINMAX = 1ULL << 50,
ARM_HWCAP2_A64_F8CVT = 1ULL << 51,
ARM_HWCAP2_A64_F8FMA = 1ULL << 52,
ARM_HWCAP2_A64_F8DP4 = 1ULL << 53,
ARM_HWCAP2_A64_F8DP2 = 1ULL << 54,
ARM_HWCAP2_A64_F8E4M3 = 1ULL << 55,
ARM_HWCAP2_A64_F8E5M2 = 1ULL << 56,
ARM_HWCAP2_A64_SME_LUTV2 = 1ULL << 57,
ARM_HWCAP2_A64_SME_F8F16 = 1ULL << 58,
ARM_HWCAP2_A64_SME_F8F32 = 1ULL << 59,
ARM_HWCAP2_A64_SME_SF8FMA = 1ULL << 60,
ARM_HWCAP2_A64_SME_SF8DP4 = 1ULL << 61,
ARM_HWCAP2_A64_SME_SF8DP2 = 1ULL << 62,
ARM_HWCAP2_A64_POE = 1ULL << 63,
};
#define ELF_HWCAP get_elf_hwcap()
@@ -886,7 +921,7 @@ uint64_t get_elf_hwcap2(void)
const char *elf_hwcap_str(uint32_t bit)
{
static const char *hwcap_str[] = {
static const char * const hwcap_str[] = {
[__builtin_ctz(ARM_HWCAP_A64_FP )] = "fp",
[__builtin_ctz(ARM_HWCAP_A64_ASIMD )] = "asimd",
[__builtin_ctz(ARM_HWCAP_A64_EVTSTRM )] = "evtstrm",
@@ -919,6 +954,22 @@ const char *elf_hwcap_str(uint32_t bit)
[__builtin_ctz(ARM_HWCAP_A64_SB )] = "sb",
[__builtin_ctz(ARM_HWCAP_A64_PACA )] = "paca",
[__builtin_ctz(ARM_HWCAP_A64_PACG )] = "pacg",
[__builtin_ctzll(ARM_HWCAP_A64_GCS )] = "gcs",
[__builtin_ctzll(ARM_HWCAP_A64_CMPBR )] = "cmpbr",
[__builtin_ctzll(ARM_HWCAP_A64_FPRCVT)] = "fprcvt",
[__builtin_ctzll(ARM_HWCAP_A64_F8MM8 )] = "f8mm8",
[__builtin_ctzll(ARM_HWCAP_A64_F8MM4 )] = "f8mm4",
[__builtin_ctzll(ARM_HWCAP_A64_SVE_F16MM)] = "svef16mm",
[__builtin_ctzll(ARM_HWCAP_A64_SVE_ELTPERM)] = "sveeltperm",
[__builtin_ctzll(ARM_HWCAP_A64_SVE_AES2)] = "sveaes2",
[__builtin_ctzll(ARM_HWCAP_A64_SVE_BFSCALE)] = "svebfscale",
[__builtin_ctzll(ARM_HWCAP_A64_SVE2P2)] = "sve2p2",
[__builtin_ctzll(ARM_HWCAP_A64_SME2P2)] = "sme2p2",
[__builtin_ctzll(ARM_HWCAP_A64_SME_SBITPERM)] = "smesbitperm",
[__builtin_ctzll(ARM_HWCAP_A64_SME_AES)] = "smeaes",
[__builtin_ctzll(ARM_HWCAP_A64_SME_SFEXPA)] = "smesfexpa",
[__builtin_ctzll(ARM_HWCAP_A64_SME_STMOP)] = "smestmop",
[__builtin_ctzll(ARM_HWCAP_A64_SME_SMOP4)] = "smesmop4",
};
return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
@@ -926,7 +977,7 @@ const char *elf_hwcap_str(uint32_t bit)
const char *elf_hwcap2_str(uint32_t bit)
{
static const char *hwcap_str[] = {
static const char * const hwcap_str[] = {
[__builtin_ctz(ARM_HWCAP2_A64_DCPODP )] = "dcpodp",
[__builtin_ctz(ARM_HWCAP2_A64_SVE2 )] = "sve2",
[__builtin_ctz(ARM_HWCAP2_A64_SVEAES )] = "sveaes",
@@ -972,6 +1023,24 @@ const char *elf_hwcap2_str(uint32_t bit)
[__builtin_ctzll(ARM_HWCAP2_A64_SME_F16F16 )] = "smef16f16",
[__builtin_ctzll(ARM_HWCAP2_A64_MOPS )] = "mops",
[__builtin_ctzll(ARM_HWCAP2_A64_HBC )] = "hbc",
[__builtin_ctzll(ARM_HWCAP2_A64_SVE_B16B16 )] = "sveb16b16",
[__builtin_ctzll(ARM_HWCAP2_A64_LRCPC3 )] = "lrcpc3",
[__builtin_ctzll(ARM_HWCAP2_A64_LSE128 )] = "lse128",
[__builtin_ctzll(ARM_HWCAP2_A64_FPMR )] = "fpmr",
[__builtin_ctzll(ARM_HWCAP2_A64_LUT )] = "lut",
[__builtin_ctzll(ARM_HWCAP2_A64_FAMINMAX )] = "faminmax",
[__builtin_ctzll(ARM_HWCAP2_A64_F8CVT )] = "f8cvt",
[__builtin_ctzll(ARM_HWCAP2_A64_F8FMA )] = "f8fma",
[__builtin_ctzll(ARM_HWCAP2_A64_F8DP4 )] = "f8dp4",
[__builtin_ctzll(ARM_HWCAP2_A64_F8DP2 )] = "f8dp2",
[__builtin_ctzll(ARM_HWCAP2_A64_F8E4M3 )] = "f8e4m3",
[__builtin_ctzll(ARM_HWCAP2_A64_F8E5M2 )] = "f8e5m2",
[__builtin_ctzll(ARM_HWCAP2_A64_SME_LUTV2 )] = "smelutv2",
[__builtin_ctzll(ARM_HWCAP2_A64_SME_F8F16 )] = "smef8f16",
[__builtin_ctzll(ARM_HWCAP2_A64_SME_F8F32 )] = "smef8f32",
[__builtin_ctzll(ARM_HWCAP2_A64_SME_SF8DP4 )] = "smesf8dp4",
[__builtin_ctzll(ARM_HWCAP2_A64_SME_SF8DP2 )] = "smesf8dp2",
[__builtin_ctzll(ARM_HWCAP2_A64_POE )] = "poe",
};
return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
linux-user/gen-vdso.c
+16 -11
View File
@@ -56,13 +56,14 @@ static unsigned rt_sigreturn_addr;
int main(int argc, char **argv)
{
FILE *inf, *outf;
FILE *inf = NULL, *outf = NULL;
long total_len;
const char *prefix = "vdso";
const char *inf_name;
const char *outf_name = NULL;
unsigned char *buf;
unsigned char *buf = NULL;
bool need_bswap;
int ret = EXIT_FAILURE;
while (1) {
int opt = getopt(argc, argv, "o:p:r:s:");
@@ -129,7 +130,6 @@ int main(int argc, char **argv)
fprintf(stderr, "%s: incomplete read\n", inf_name);
return EXIT_FAILURE;
}
fclose(inf);
/*
* Identify which elf flavor we're processing.
@@ -205,19 +205,24 @@ int main(int argc, char **argv)
fprintf(outf, " .rt_sigreturn_ofs = 0x%x,\n", rt_sigreturn_addr);
fprintf(outf, "};\n");
/*
* Everything should have gone well.
*/
if (fclose(outf)) {
goto perror_outf;
ret = EXIT_SUCCESS;
cleanup:
free(buf);
if (outf && fclose(outf) != 0) {
ret = EXIT_FAILURE;
}
return EXIT_SUCCESS;
if (inf && fclose(inf) != 0) {
ret = EXIT_FAILURE;
}
return ret;
perror_inf:
perror(inf_name);
return EXIT_FAILURE;
goto cleanup;
perror_outf:
perror(outf_name);
return EXIT_FAILURE;
goto cleanup;
}
tcg/tcg-op-gvec.c
+237 -143
View File
File diff suppressed because it is too large Load Diff