mirror of
https://github.com/izzy2lost/xemu.git
synced 2026-07-06 00:20:22 -07:00
Merge remote-tracking branch 'sweil/w32' into staging
# By Stefan Weil (10) and others # Via Aurelien Jarno (1) and Stefan Weil (1) * sweil/w32: (27 commits) w32, w64: Add build rule for installer target-mips: fix mipsdsp_mul_q31_q31 mips_malta: fix copy of the 0x1fc00000 region linux-user: correct argument number for sys_mremap and sys_splice target-mips: Remove assignment to a variable which is never used target-mips: fix mipsdsp_trunc16_sat16_round hw/mips: align initrd to 64KB to avoid kernel error pflash_cfi01: duplicate status byte from bits 23:16 for 32bit reads mips_malta: generate SMBUS EEPROM data mips_malta: cap BIOS endian swap length at 0x3e0000 bytes mips_malta: generate SPD EEPROM data at runtime mips_malta: correct reading MIPS revision at 0x1fc00010 mips_malta: fix BIOS endianness swapping mips_malta: QOM cast cleanup target-mips: fix branch in likely delay slot tcg assert target-mips: fix multiplication in mipsdsp_rndq15_mul_q15_q15 target-mips: Remove assignment to a variable which is never used misc: Use g_assert_not_reached for code which is expected to be unreachable qemu-options: mention C-a h in the -nographic doc misc: Fix new typos in comments and strings ... Message-id: 1374989579-24933-1-git-send-email-sw@weilnetz.de Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
@@ -437,6 +437,61 @@ qemu-doc.dvi qemu-doc.html qemu-doc.info qemu-doc.pdf: \
|
||||
qemu-img.texi qemu-nbd.texi qemu-options.texi \
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||||
qemu-monitor.texi qemu-img-cmds.texi
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||||
|
||||
ifdef CONFIG_WIN32
|
||||
|
||||
INSTALLER = qemu-setup-$(VERSION)$(EXESUF)
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||||
|
||||
nsisflags = -V2 -NOCD
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||||
|
||||
ifneq ($(wildcard $(SRC_PATH)/dll),)
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||||
ifeq ($(ARCH),x86_64)
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||||
# 64 bit executables
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||||
DLL_PATH = $(SRC_PATH)/dll/w64
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nsisflags += -DW64
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||||
else
|
||||
# 32 bit executables
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DLL_PATH = $(SRC_PATH)/dll/w32
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endif
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endif
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||||
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||||
.PHONY: installer
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installer: $(INSTALLER)
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||||
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INSTDIR=/tmp/qemu-nsis
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$(INSTALLER): $(SRC_PATH)/qemu.nsi
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make install prefix=${INSTDIR}
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ifdef SIGNCODE
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(cd ${INSTDIR}; \
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||||
for i in *.exe; do \
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$(SIGNCODE) $${i}; \
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done \
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||||
)
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||||
endif # SIGNCODE
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||||
(cd ${INSTDIR}; \
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||||
for i in qemu-system-*.exe; do \
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arch=$${i%.exe}; \
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arch=$${arch#qemu-system-}; \
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echo Section \"$$arch\" Section_$$arch; \
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echo SetOutPath \"\$$INSTDIR\"; \
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echo File \"\$${BINDIR}\\$$i\"; \
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echo SectionEnd; \
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done \
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) >${INSTDIR}/system-emulations.nsh
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makensis $(nsisflags) \
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$(if $(BUILD_DOCS),-DCONFIG_DOCUMENTATION="y") \
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$(if $(CONFIG_GTK),-DCONFIG_GTK="y") \
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-DBINDIR="${INSTDIR}" \
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$(if $(DLL_PATH),-DDLLDIR="$(DLL_PATH)") \
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-DSRCDIR="$(SRC_PATH)" \
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-DOUTFILE="$(INSTALLER)" \
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$(SRC_PATH)/qemu.nsi
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rm -r ${INSTDIR}
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ifdef SIGNCODE
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$(SIGNCODE) $(INSTALLER)
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endif # SIGNCODE
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endif # CONFIG_WIN
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||||
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||||
# Add a dependency on the generated files, so that they are always
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||||
# rebuilt before other object files
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||||
ifneq ($(filter-out %clean,$(MAKECMDGOALS)),$(if $(MAKECMDGOALS),,fail))
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||||
|
||||
+1
-1
@@ -168,7 +168,7 @@ typedef struct QEMU_PACKED VHDXLogEntryHeader {
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||||
vhdx_header. If not found in
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||||
vhdx_header, it is invalid */
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||||
uint64_t flushed_file_offset; /* see spec for full details - this
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||||
sould be vhdx file size in bytes */
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||||
should be vhdx file size in bytes */
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||||
uint64_t last_file_offset; /* size in bytes that all allocated
|
||||
file structures fit into */
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||||
} VHDXLogEntryHeader;
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||||
|
||||
+1
-1
@@ -1029,7 +1029,7 @@ static void abort_prepare(BlkTransactionState *common, Error **errp)
|
||||
|
||||
static void abort_commit(BlkTransactionState *common)
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||||
{
|
||||
assert(false); /* this action never succeeds */
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||||
g_assert_not_reached(); /* this action never succeeds */
|
||||
}
|
||||
|
||||
static const BdrvActionOps actions[] = {
|
||||
|
||||
@@ -112,7 +112,7 @@ typedef struct TimersState {
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||||
int64_t dummy;
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||||
} TimersState;
|
||||
|
||||
TimersState timers_state;
|
||||
static TimersState timers_state;
|
||||
|
||||
/* Return the virtual CPU time, based on the instruction counter. */
|
||||
int64_t cpu_get_icount(void)
|
||||
|
||||
+1
-1
@@ -199,7 +199,7 @@ Version #1 requires that all server implementations of the protocol must
|
||||
check this field and register all requests found in the array of commands located
|
||||
in the data portion and return an equal number of results in the response.
|
||||
The maximum number of repeats is hard-coded to 4096. This is a conservative
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||||
limit based on the maximum size of a SEND message along with emperical
|
||||
limit based on the maximum size of a SEND message along with empirical
|
||||
observations on the maximum future benefit of simultaneous page registrations.
|
||||
|
||||
The 'type' field has 12 different command values:
|
||||
|
||||
@@ -1153,10 +1153,12 @@ static int proxy_init(FsContext *ctx)
|
||||
sock_id = atoi(ctx->fs_root);
|
||||
if (sock_id < 0) {
|
||||
fprintf(stderr, "socket descriptor not initialized\n");
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||||
g_free(proxy);
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
g_free(ctx->fs_root);
|
||||
ctx->fs_root = NULL;
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||||
|
||||
proxy->in_iovec.iov_base = g_malloc(PROXY_MAX_IO_SZ + PROXY_HDR_SZ);
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||||
proxy->in_iovec.iov_len = PROXY_MAX_IO_SZ + PROXY_HDR_SZ;
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||||
|
||||
@@ -192,6 +192,9 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
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||||
case 0xe8: /* Write block */
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||||
/* Status register read */
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||||
ret = pfl->status;
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||||
if (width > 2) {
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||||
ret |= pfl->status << 16;
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||||
}
|
||||
DPRINTF("%s: status %x\n", __func__, ret);
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||||
break;
|
||||
case 0x90:
|
||||
|
||||
+5
-4
@@ -131,7 +131,7 @@ static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
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||||
int sector_num = (s->lba << 2) + (s->io_buffer_index >> 9);
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||||
int nsector = io->len >> 9;
|
||||
|
||||
MACIO_DPRINTF("precopying unaligned %d bytes to %#lx\n",
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||||
MACIO_DPRINTF("precopying unaligned %d bytes to %#" HWADDR_PRIx "\n",
|
||||
unaligned, io->addr + io->len - unaligned);
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||||
|
||||
bdrv_read(s->bs, sector_num + nsector, io->remainder, 1);
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||||
@@ -212,14 +212,15 @@ static void pmac_ide_transfer_cb(void *opaque, int ret)
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||||
s->nsector -= n;
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||||
}
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||||
|
||||
MACIO_DPRINTF("remainder: %d io->len: %d nsector: %d sector_num: %ld\n",
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||||
MACIO_DPRINTF("remainder: %d io->len: %d nsector: %d "
|
||||
"sector_num: %" PRId64 "\n",
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||||
io->remainder_len, io->len, s->nsector, sector_num);
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||||
if (io->remainder_len && io->len) {
|
||||
/* guest wants the rest of its previous transfer */
|
||||
int remainder_len = MIN(io->remainder_len, io->len);
|
||||
uint8_t *p = &io->remainder[0x200 - remainder_len];
|
||||
|
||||
MACIO_DPRINTF("copying remainder %d bytes at %#lx\n",
|
||||
MACIO_DPRINTF("copying remainder %d bytes at %#" HWADDR_PRIx "\n",
|
||||
remainder_len, io->addr);
|
||||
|
||||
switch (s->dma_cmd) {
|
||||
@@ -261,7 +262,7 @@ static void pmac_ide_transfer_cb(void *opaque, int ret)
|
||||
if (unaligned) {
|
||||
int nsector = io->len >> 9;
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||||
|
||||
MACIO_DPRINTF("precopying unaligned %d bytes to %#lx\n",
|
||||
MACIO_DPRINTF("precopying unaligned %d bytes to %#" HWADDR_PRIx "\n",
|
||||
unaligned, io->addr + io->len - unaligned);
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||||
|
||||
switch (s->dma_cmd) {
|
||||
|
||||
@@ -126,7 +126,7 @@ static int64_t load_kernel (CPUMIPSState *env)
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||||
if (loaderparams.initrd_filename) {
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||||
initrd_size = get_image_size (loaderparams.initrd_filename);
|
||||
if (initrd_size > 0) {
|
||||
initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
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||||
initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
|
||||
if (initrd_offset + initrd_size > ram_size) {
|
||||
fprintf(stderr,
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||||
"qemu: memory too small for initial ram disk '%s'\n",
|
||||
|
||||
+173
-62
@@ -47,6 +47,7 @@
|
||||
#include "sysemu/blockdev.h"
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||||
#include "exec/address-spaces.h"
|
||||
#include "hw/sysbus.h" /* SysBusDevice */
|
||||
#include "qemu/host-utils.h"
|
||||
|
||||
//#define DEBUG_BOARD_INIT
|
||||
|
||||
@@ -79,8 +80,12 @@ typedef struct {
|
||||
SerialState *uart;
|
||||
} MaltaFPGAState;
|
||||
|
||||
#define TYPE_MIPS_MALTA "mips-malta"
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||||
#define MIPS_MALTA(obj) OBJECT_CHECK(MaltaState, (obj), TYPE_MIPS_MALTA)
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||||
|
||||
typedef struct {
|
||||
SysBusDevice busdev;
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||||
SysBusDevice parent_obj;
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||||
|
||||
qemu_irq *i8259;
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||||
} MaltaState;
|
||||
|
||||
@@ -144,12 +149,12 @@ struct _eeprom24c0x_t {
|
||||
|
||||
typedef struct _eeprom24c0x_t eeprom24c0x_t;
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||||
|
||||
static eeprom24c0x_t eeprom = {
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||||
static eeprom24c0x_t spd_eeprom = {
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||||
.contents = {
|
||||
/* 00000000: */ 0x80,0x08,0x04,0x0D,0x0A,0x01,0x40,0x00,
|
||||
/* 00000000: */ 0x80,0x08,0xFF,0x0D,0x0A,0xFF,0x40,0x00,
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||||
/* 00000008: */ 0x01,0x75,0x54,0x00,0x82,0x08,0x00,0x01,
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||||
/* 00000010: */ 0x8F,0x04,0x02,0x01,0x01,0x00,0x0E,0x00,
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||||
/* 00000018: */ 0x00,0x00,0x00,0x14,0x0F,0x14,0x2D,0x40,
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||||
/* 00000010: */ 0x8F,0x04,0x02,0x01,0x01,0x00,0x00,0x00,
|
||||
/* 00000018: */ 0x00,0x00,0x00,0x14,0x0F,0x14,0x2D,0xFF,
|
||||
/* 00000020: */ 0x15,0x08,0x15,0x08,0x00,0x00,0x00,0x00,
|
||||
/* 00000028: */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
/* 00000030: */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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||||
@@ -165,69 +170,157 @@ static eeprom24c0x_t eeprom = {
|
||||
},
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||||
};
|
||||
|
||||
static uint8_t eeprom24c0x_read(void)
|
||||
static void generate_eeprom_spd(uint8_t *eeprom, ram_addr_t ram_size)
|
||||
{
|
||||
logout("%u: scl = %u, sda = %u, data = 0x%02x\n",
|
||||
eeprom.tick, eeprom.scl, eeprom.sda, eeprom.data);
|
||||
return eeprom.sda;
|
||||
enum { SDR = 0x4, DDR2 = 0x8 } type;
|
||||
uint8_t *spd = spd_eeprom.contents;
|
||||
uint8_t nbanks = 0;
|
||||
uint16_t density = 0;
|
||||
int i;
|
||||
|
||||
/* work in terms of MB */
|
||||
ram_size >>= 20;
|
||||
|
||||
while ((ram_size >= 4) && (nbanks <= 2)) {
|
||||
int sz_log2 = MIN(31 - clz32(ram_size), 14);
|
||||
nbanks++;
|
||||
density |= 1 << (sz_log2 - 2);
|
||||
ram_size -= 1 << sz_log2;
|
||||
}
|
||||
|
||||
/* split to 2 banks if possible */
|
||||
if ((nbanks == 1) && (density > 1)) {
|
||||
nbanks++;
|
||||
density >>= 1;
|
||||
}
|
||||
|
||||
if (density & 0xff00) {
|
||||
density = (density & 0xe0) | ((density >> 8) & 0x1f);
|
||||
type = DDR2;
|
||||
} else if (!(density & 0x1f)) {
|
||||
type = DDR2;
|
||||
} else {
|
||||
type = SDR;
|
||||
}
|
||||
|
||||
if (ram_size) {
|
||||
fprintf(stderr, "Warning: SPD cannot represent final %dMB"
|
||||
" of SDRAM\n", (int)ram_size);
|
||||
}
|
||||
|
||||
/* fill in SPD memory information */
|
||||
spd[2] = type;
|
||||
spd[5] = nbanks;
|
||||
spd[31] = density;
|
||||
|
||||
/* checksum */
|
||||
spd[63] = 0;
|
||||
for (i = 0; i < 63; i++) {
|
||||
spd[63] += spd[i];
|
||||
}
|
||||
|
||||
/* copy for SMBUS */
|
||||
memcpy(eeprom, spd, sizeof(spd_eeprom.contents));
|
||||
}
|
||||
|
||||
static void eeprom24c0x_write(int scl, int sda)
|
||||
static void generate_eeprom_serial(uint8_t *eeprom)
|
||||
{
|
||||
if (eeprom.scl && scl && (eeprom.sda != sda)) {
|
||||
int i, pos = 0;
|
||||
uint8_t mac[6] = { 0x00 };
|
||||
uint8_t sn[5] = { 0x01, 0x23, 0x45, 0x67, 0x89 };
|
||||
|
||||
/* version */
|
||||
eeprom[pos++] = 0x01;
|
||||
|
||||
/* count */
|
||||
eeprom[pos++] = 0x02;
|
||||
|
||||
/* MAC address */
|
||||
eeprom[pos++] = 0x01; /* MAC */
|
||||
eeprom[pos++] = 0x06; /* length */
|
||||
memcpy(&eeprom[pos], mac, sizeof(mac));
|
||||
pos += sizeof(mac);
|
||||
|
||||
/* serial number */
|
||||
eeprom[pos++] = 0x02; /* serial */
|
||||
eeprom[pos++] = 0x05; /* length */
|
||||
memcpy(&eeprom[pos], sn, sizeof(sn));
|
||||
pos += sizeof(sn);
|
||||
|
||||
/* checksum */
|
||||
eeprom[pos] = 0;
|
||||
for (i = 0; i < pos; i++) {
|
||||
eeprom[pos] += eeprom[i];
|
||||
}
|
||||
}
|
||||
|
||||
static uint8_t eeprom24c0x_read(eeprom24c0x_t *eeprom)
|
||||
{
|
||||
logout("%u: scl = %u, sda = %u, data = 0x%02x\n",
|
||||
eeprom->tick, eeprom->scl, eeprom->sda, eeprom->data);
|
||||
return eeprom->sda;
|
||||
}
|
||||
|
||||
static void eeprom24c0x_write(eeprom24c0x_t *eeprom, int scl, int sda)
|
||||
{
|
||||
if (eeprom->scl && scl && (eeprom->sda != sda)) {
|
||||
logout("%u: scl = %u->%u, sda = %u->%u i2c %s\n",
|
||||
eeprom.tick, eeprom.scl, scl, eeprom.sda, sda, sda ? "stop" : "start");
|
||||
eeprom->tick, eeprom->scl, scl, eeprom->sda, sda,
|
||||
sda ? "stop" : "start");
|
||||
if (!sda) {
|
||||
eeprom.tick = 1;
|
||||
eeprom.command = 0;
|
||||
eeprom->tick = 1;
|
||||
eeprom->command = 0;
|
||||
}
|
||||
} else if (eeprom.tick == 0 && !eeprom.ack) {
|
||||
} else if (eeprom->tick == 0 && !eeprom->ack) {
|
||||
/* Waiting for start. */
|
||||
logout("%u: scl = %u->%u, sda = %u->%u wait for i2c start\n",
|
||||
eeprom.tick, eeprom.scl, scl, eeprom.sda, sda);
|
||||
} else if (!eeprom.scl && scl) {
|
||||
eeprom->tick, eeprom->scl, scl, eeprom->sda, sda);
|
||||
} else if (!eeprom->scl && scl) {
|
||||
logout("%u: scl = %u->%u, sda = %u->%u trigger bit\n",
|
||||
eeprom.tick, eeprom.scl, scl, eeprom.sda, sda);
|
||||
if (eeprom.ack) {
|
||||
eeprom->tick, eeprom->scl, scl, eeprom->sda, sda);
|
||||
if (eeprom->ack) {
|
||||
logout("\ti2c ack bit = 0\n");
|
||||
sda = 0;
|
||||
eeprom.ack = 0;
|
||||
} else if (eeprom.sda == sda) {
|
||||
eeprom->ack = 0;
|
||||
} else if (eeprom->sda == sda) {
|
||||
uint8_t bit = (sda != 0);
|
||||
logout("\ti2c bit = %d\n", bit);
|
||||
if (eeprom.tick < 9) {
|
||||
eeprom.command <<= 1;
|
||||
eeprom.command += bit;
|
||||
eeprom.tick++;
|
||||
if (eeprom.tick == 9) {
|
||||
logout("\tcommand 0x%04x, %s\n", eeprom.command, bit ? "read" : "write");
|
||||
eeprom.ack = 1;
|
||||
if (eeprom->tick < 9) {
|
||||
eeprom->command <<= 1;
|
||||
eeprom->command += bit;
|
||||
eeprom->tick++;
|
||||
if (eeprom->tick == 9) {
|
||||
logout("\tcommand 0x%04x, %s\n", eeprom->command,
|
||||
bit ? "read" : "write");
|
||||
eeprom->ack = 1;
|
||||
}
|
||||
} else if (eeprom.tick < 17) {
|
||||
if (eeprom.command & 1) {
|
||||
sda = ((eeprom.data & 0x80) != 0);
|
||||
} else if (eeprom->tick < 17) {
|
||||
if (eeprom->command & 1) {
|
||||
sda = ((eeprom->data & 0x80) != 0);
|
||||
}
|
||||
eeprom.address <<= 1;
|
||||
eeprom.address += bit;
|
||||
eeprom.tick++;
|
||||
eeprom.data <<= 1;
|
||||
if (eeprom.tick == 17) {
|
||||
eeprom.data = eeprom.contents[eeprom.address];
|
||||
logout("\taddress 0x%04x, data 0x%02x\n", eeprom.address, eeprom.data);
|
||||
eeprom.ack = 1;
|
||||
eeprom.tick = 0;
|
||||
eeprom->address <<= 1;
|
||||
eeprom->address += bit;
|
||||
eeprom->tick++;
|
||||
eeprom->data <<= 1;
|
||||
if (eeprom->tick == 17) {
|
||||
eeprom->data = eeprom->contents[eeprom->address];
|
||||
logout("\taddress 0x%04x, data 0x%02x\n",
|
||||
eeprom->address, eeprom->data);
|
||||
eeprom->ack = 1;
|
||||
eeprom->tick = 0;
|
||||
}
|
||||
} else if (eeprom.tick >= 17) {
|
||||
} else if (eeprom->tick >= 17) {
|
||||
sda = 0;
|
||||
}
|
||||
} else {
|
||||
logout("\tsda changed with raising scl\n");
|
||||
}
|
||||
} else {
|
||||
logout("%u: scl = %u->%u, sda = %u->%u\n", eeprom.tick, eeprom.scl, scl, eeprom.sda, sda);
|
||||
logout("%u: scl = %u->%u, sda = %u->%u\n", eeprom->tick, eeprom->scl,
|
||||
scl, eeprom->sda, sda);
|
||||
}
|
||||
eeprom.scl = scl;
|
||||
eeprom.sda = sda;
|
||||
eeprom->scl = scl;
|
||||
eeprom->sda = sda;
|
||||
}
|
||||
|
||||
static uint64_t malta_fpga_read(void *opaque, hwaddr addr,
|
||||
@@ -290,7 +383,7 @@ static uint64_t malta_fpga_read(void *opaque, hwaddr addr,
|
||||
|
||||
/* I2CINP Register */
|
||||
case 0x00b00:
|
||||
val = ((s->i2cin & ~1) | eeprom24c0x_read());
|
||||
val = ((s->i2cin & ~1) | eeprom24c0x_read(&spd_eeprom));
|
||||
break;
|
||||
|
||||
/* I2COE Register */
|
||||
@@ -386,7 +479,7 @@ static void malta_fpga_write(void *opaque, hwaddr addr,
|
||||
|
||||
/* I2COUT Register */
|
||||
case 0x00b10:
|
||||
eeprom24c0x_write(val & 0x02, val & 0x01);
|
||||
eeprom24c0x_write(&spd_eeprom, val & 0x02, val & 0x01);
|
||||
s->i2cout = val;
|
||||
break;
|
||||
|
||||
@@ -699,7 +792,7 @@ static int64_t load_kernel (void)
|
||||
if (loaderparams.initrd_filename) {
|
||||
initrd_size = get_image_size (loaderparams.initrd_filename);
|
||||
if (initrd_size > 0) {
|
||||
initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
|
||||
initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
|
||||
if (initrd_offset + initrd_size > ram_size) {
|
||||
fprintf(stderr,
|
||||
"qemu: memory too small for initial ram disk '%s'\n",
|
||||
@@ -789,8 +882,10 @@ void mips_malta_init(QEMUMachineInitArgs *args)
|
||||
pflash_t *fl;
|
||||
MemoryRegion *system_memory = get_system_memory();
|
||||
MemoryRegion *ram = g_new(MemoryRegion, 1);
|
||||
MemoryRegion *bios, *bios_alias = g_new(MemoryRegion, 1);
|
||||
MemoryRegion *bios, *bios_copy = g_new(MemoryRegion, 1);
|
||||
target_long bios_size = FLASH_SIZE;
|
||||
const size_t smbus_eeprom_size = 8 * 256;
|
||||
uint8_t *smbus_eeprom_buf = g_malloc0(smbus_eeprom_size);
|
||||
int64_t kernel_entry;
|
||||
PCIBus *pci_bus;
|
||||
ISABus *isa_bus;
|
||||
@@ -808,8 +903,8 @@ void mips_malta_init(QEMUMachineInitArgs *args)
|
||||
int fl_sectors = bios_size >> 16;
|
||||
int be;
|
||||
|
||||
DeviceState *dev = qdev_create(NULL, "mips-malta");
|
||||
MaltaState *s = DO_UPCAST(MaltaState, busdev.qdev, dev);
|
||||
DeviceState *dev = qdev_create(NULL, TYPE_MIPS_MALTA);
|
||||
MaltaState *s = MIPS_MALTA(dev);
|
||||
|
||||
qdev_init_nofail(dev);
|
||||
|
||||
@@ -858,6 +953,10 @@ void mips_malta_init(QEMUMachineInitArgs *args)
|
||||
vmstate_register_ram_global(ram);
|
||||
memory_region_add_subregion(system_memory, 0, ram);
|
||||
|
||||
/* generate SPD EEPROM data */
|
||||
generate_eeprom_spd(&smbus_eeprom_buf[0 * 256], ram_size);
|
||||
generate_eeprom_serial(&smbus_eeprom_buf[6 * 256]);
|
||||
|
||||
#ifdef TARGET_WORDS_BIGENDIAN
|
||||
be = 1;
|
||||
#else
|
||||
@@ -916,8 +1015,11 @@ void mips_malta_init(QEMUMachineInitArgs *args)
|
||||
a neat trick which allows bi-endian firmware. */
|
||||
#ifndef TARGET_WORDS_BIGENDIAN
|
||||
{
|
||||
uint32_t *addr = memory_region_get_ram_ptr(bios);
|
||||
uint32_t *end = addr + bios_size;
|
||||
uint32_t *end, *addr = rom_ptr(FLASH_ADDRESS);
|
||||
if (!addr) {
|
||||
addr = memory_region_get_ram_ptr(bios);
|
||||
}
|
||||
end = (void *)addr + MIN(bios_size, 0x3e0000);
|
||||
while (addr < end) {
|
||||
bswap32s(addr);
|
||||
addr++;
|
||||
@@ -926,14 +1028,23 @@ void mips_malta_init(QEMUMachineInitArgs *args)
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Map the BIOS at a 2nd physical location, as on the real board. */
|
||||
memory_region_init_alias(bios_alias, NULL, "bios.1fc", bios, 0, BIOS_SIZE);
|
||||
memory_region_add_subregion(system_memory, RESET_ADDRESS, bios_alias);
|
||||
/*
|
||||
* Map the BIOS at a 2nd physical location, as on the real board.
|
||||
* Copy it so that we can patch in the MIPS revision, which cannot be
|
||||
* handled by an overlapping region as the resulting ROM code subpage
|
||||
* regions are not executable.
|
||||
*/
|
||||
memory_region_init_ram(bios_copy, NULL, "bios.1fc", BIOS_SIZE);
|
||||
if (!rom_copy(memory_region_get_ram_ptr(bios_copy),
|
||||
FLASH_ADDRESS, BIOS_SIZE)) {
|
||||
memcpy(memory_region_get_ram_ptr(bios_copy),
|
||||
memory_region_get_ram_ptr(bios), BIOS_SIZE);
|
||||
}
|
||||
memory_region_set_readonly(bios_copy, true);
|
||||
memory_region_add_subregion(system_memory, RESET_ADDRESS, bios_copy);
|
||||
|
||||
/* Board ID = 0x420 (Malta Board with CoreLV)
|
||||
XXX: theoretically 0x1e000010 should map to flash and 0x1fc00010 should
|
||||
map to the board ID. */
|
||||
stl_p(memory_region_get_ram_ptr(bios) + 0x10, 0x00000420);
|
||||
/* Board ID = 0x420 (Malta Board with CoreLV) */
|
||||
stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420);
|
||||
|
||||
/* Init internal devices */
|
||||
cpu_mips_irq_init_cpu(env);
|
||||
@@ -965,8 +1076,8 @@ void mips_malta_init(QEMUMachineInitArgs *args)
|
||||
pci_create_simple(pci_bus, piix4_devfn + 2, "piix4-usb-uhci");
|
||||
smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100,
|
||||
isa_get_irq(NULL, 9), NULL, 0, NULL);
|
||||
/* TODO: Populate SPD eeprom data. */
|
||||
smbus_eeprom_init(smbus, 8, NULL, 0);
|
||||
smbus_eeprom_init(smbus, 8, smbus_eeprom_buf, smbus_eeprom_size);
|
||||
g_free(smbus_eeprom_buf);
|
||||
pit = pit_init(isa_bus, 0x40, 0, NULL);
|
||||
cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
|
||||
DMA_init(0, cpu_exit_irq);
|
||||
@@ -1004,7 +1115,7 @@ static void mips_malta_class_init(ObjectClass *klass, void *data)
|
||||
}
|
||||
|
||||
static const TypeInfo mips_malta_device = {
|
||||
.name = "mips-malta",
|
||||
.name = TYPE_MIPS_MALTA,
|
||||
.parent = TYPE_SYS_BUS_DEVICE,
|
||||
.instance_size = sizeof(MaltaState),
|
||||
.class_init = mips_malta_class_init,
|
||||
|
||||
@@ -83,7 +83,7 @@ static int64_t load_kernel(void)
|
||||
if (loaderparams.initrd_filename) {
|
||||
initrd_size = get_image_size (loaderparams.initrd_filename);
|
||||
if (initrd_size > 0) {
|
||||
initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
|
||||
initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
|
||||
if (initrd_offset + initrd_size > loaderparams.ram_size) {
|
||||
fprintf(stderr,
|
||||
"qemu: memory too small for initial ram disk '%s'\n",
|
||||
|
||||
+1
-1
@@ -102,7 +102,7 @@ static int64_t load_kernel(void)
|
||||
if (loaderparams.initrd_filename) {
|
||||
initrd_size = get_image_size (loaderparams.initrd_filename);
|
||||
if (initrd_size > 0) {
|
||||
initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
|
||||
initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
|
||||
if (initrd_offset + initrd_size > ram_size) {
|
||||
fprintf(stderr,
|
||||
"qemu: memory too small for initial ram disk '%s'\n",
|
||||
|
||||
+8
-8
@@ -528,7 +528,7 @@ vmxnet3_setup_tx_offloads(VMXNET3State *s)
|
||||
break;
|
||||
|
||||
default:
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
return false;
|
||||
}
|
||||
|
||||
@@ -575,7 +575,7 @@ vmxnet3_on_tx_done_update_stats(VMXNET3State *s, int qidx,
|
||||
stats->ucastBytesTxOK += tot_len;
|
||||
break;
|
||||
default:
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
if (s->offload_mode == VMXNET3_OM_TSO) {
|
||||
@@ -599,7 +599,7 @@ vmxnet3_on_tx_done_update_stats(VMXNET3State *s, int qidx,
|
||||
break;
|
||||
|
||||
default:
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
|
||||
@@ -634,7 +634,7 @@ vmxnet3_on_rx_done_update_stats(VMXNET3State *s,
|
||||
stats->ucastBytesRxOK += tot_len;
|
||||
break;
|
||||
default:
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
if (tot_len > s->mtu) {
|
||||
@@ -643,7 +643,7 @@ vmxnet3_on_rx_done_update_stats(VMXNET3State *s,
|
||||
}
|
||||
break;
|
||||
default:
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1106,7 +1106,7 @@ vmxnet3_io_bar0_read(void *opaque, hwaddr addr, unsigned size)
|
||||
{
|
||||
if (VMW_IS_MULTIREG_ADDR(addr, VMXNET3_REG_IMR,
|
||||
VMXNET3_MAX_INTRS, VMXNET3_REG_ALIGN)) {
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
VMW_CBPRN("BAR0 unknown read [%" PRIx64 "], size %d", addr, size);
|
||||
@@ -1651,7 +1651,7 @@ vmxnet3_io_bar1_write(void *opaque,
|
||||
case VMXNET3_REG_ICR:
|
||||
VMW_CBPRN("Write BAR1 [VMXNET3_REG_ICR] = %" PRIx64 ", size %d",
|
||||
val, size);
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
break;
|
||||
|
||||
/* Event Cause Register */
|
||||
@@ -1801,7 +1801,7 @@ vmxnet3_rx_filter_may_indicate(VMXNET3State *s, const void *data,
|
||||
break;
|
||||
|
||||
default:
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
return true;
|
||||
|
||||
@@ -287,7 +287,7 @@ void vmxnet_tx_pkt_build_vheader(struct VmxnetTxPkt *pkt, bool tso_enable,
|
||||
break;
|
||||
|
||||
default:
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
if (csum_enable) {
|
||||
|
||||
+4
-4
@@ -1357,7 +1357,7 @@ static void ehci_execute_complete(EHCIQueue *q)
|
||||
default:
|
||||
/* should not be triggerable */
|
||||
fprintf(stderr, "USB invalid response %d\n", p->packet.status);
|
||||
assert(0);
|
||||
g_assert_not_reached();
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -2142,7 +2142,7 @@ static void ehci_advance_state(EHCIState *ehci, int async)
|
||||
default:
|
||||
fprintf(stderr, "Bad state!\n");
|
||||
again = -1;
|
||||
assert(0);
|
||||
g_assert_not_reached();
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -2206,7 +2206,7 @@ static void ehci_advance_async_state(EHCIState *ehci)
|
||||
/* this should only be due to a developer mistake */
|
||||
fprintf(stderr, "ehci: Bad asynchronous state %d. "
|
||||
"Resetting to active\n", ehci->astate);
|
||||
assert(0);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
|
||||
@@ -2256,7 +2256,7 @@ static void ehci_advance_periodic_state(EHCIState *ehci)
|
||||
/* this should only be due to a developer mistake */
|
||||
fprintf(stderr, "ehci: Bad periodic state %d. "
|
||||
"Resetting to active\n", ehci->pstate);
|
||||
assert(0);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -53,8 +53,8 @@ static const char *balloon_stat_names[] = {
|
||||
/*
|
||||
* reset_stats - Mark all items in the stats array as unset
|
||||
*
|
||||
* This function needs to be called at device intialization and before
|
||||
* before updating to a set of newly-generated stats. This will ensure that no
|
||||
* This function needs to be called at device initialization and before
|
||||
* updating to a set of newly-generated stats. This will ensure that no
|
||||
* stale values stick around in case the guest reports a subset of the supported
|
||||
* statistics.
|
||||
*/
|
||||
|
||||
@@ -128,7 +128,6 @@ void watchdog_perform_action(void)
|
||||
case WDT_POWEROFF: /* same as 'quit' command in monitor */
|
||||
watchdog_mon_event("poweroff");
|
||||
exit(0);
|
||||
break;
|
||||
|
||||
case WDT_PAUSE: /* same as 'stop' command in monitor */
|
||||
watchdog_mon_event("pause");
|
||||
|
||||
+2
-1
@@ -756,7 +756,8 @@ static int xen_pt_initfn(PCIDevice *d)
|
||||
out:
|
||||
memory_listener_register(&s->memory_listener, &address_space_memory);
|
||||
memory_listener_register(&s->io_listener, &address_space_io);
|
||||
XEN_PT_LOG(d, "Real physical device %02x:%02x.%d registered successfuly!\n",
|
||||
XEN_PT_LOG(d,
|
||||
"Real physical device %02x:%02x.%d registered successfully!\n",
|
||||
s->hostaddr.bus, s->hostaddr.slot, s->hostaddr.function);
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -36,7 +36,6 @@
|
||||
#pragma GCC poison TARGET_PAGE_ALIGN
|
||||
|
||||
#pragma GCC poison CPUArchState
|
||||
#pragma GCC poison env
|
||||
|
||||
#pragma GCC poison lduw_phys
|
||||
#pragma GCC poison ldl_phys
|
||||
|
||||
@@ -2,6 +2,9 @@
|
||||
#define HW_MIPS_H
|
||||
/* Definitions for mips board emulation. */
|
||||
|
||||
/* Kernels can be configured with 64KB pages */
|
||||
#define INITRD_PAGE_MASK (~((1 << 16) - 1))
|
||||
|
||||
#include "exec/memory.h"
|
||||
|
||||
/* gt64xxx.c */
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user