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Merge tag 'pull-request-2024-12-11' of https://gitlab.com/thuth/qemu into staging

Browse Source 
* Add compat machines for QEMU 10.0
* Add s390x CPU model for the gen17 mainframe
* Convert some more avocado tests to the new functional framework
* Some minor clean-ups for functional tests

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# gpg: Signature made Wed 11 Dec 2024 03:53:01 EST
# gpg:                using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg:                issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* tag 'pull-request-2024-12-11' of https://gitlab.com/thuth/qemu: (26 commits)
  tests/functional: remove pointless with statement
  tests/functional: remove unused system imports
  tests/functional: Convert the cubieboard avocado tests
  tests/functional: Convert the smdkc210 avocado test
  tests/functional: Convert the emcraft_sf2 avocado test
  tests/functional: Convert the xlnx_versal_virt avocado test
  MAINTAINERS: Cover the tests/functional/test_sh4eb_r2d.py file
  tests/functional: Bump the timeout of the sh4_tuxrun test
  s390x/cpumodel: gen17 model
  s390x/cpumodel: Add PLO-extension facility
  s390x/cpumodel: correct PLO feature wording
  s390x/cpumodel: Add Sequential-Instruction-Fetching facility
  s390x/cpumodel: add Ineffective-nonconstrained-transaction facility
  s390x/cpumodel: add Vector-Packed-Decimal-Enhancement facility 3
  s390x/cpumodel: add Miscellaneous-Instruction-Extensions Facility 4
  s390x/cpumodel: add Vector Enhancements facility 3
  s390x/cpumodel: add Concurrent-functions facility support
  linux-headers: Update to Linux 6.13-rc1
  s390x/cpumodel: Add ptff Query Time-Stamp Event (QTSE) support
  s390x/cpumodel: add msa13 subfunctions
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Hajnoczi
2024-12-12 18:39:19 -05:00
parent a5ba0a7e4e f29c96d0f5
commit ed2db97e60
68 changed files with 1251 additions and 340 deletions
Download Patch File Download Diff File Expand all files Collapse all files
MAINTAINERS
+5 -1
View File
@@ -633,6 +633,7 @@ F: include/hw/*/allwinner*
F: hw/arm/cubieboard.c
F: docs/system/arm/cubieboard.rst
F: hw/misc/axp209.c
F: tests/functional/test_arm_cubieboard.py
Allwinner-h3
M: Niek Linnenbank <nieklinnenbank@gmail.com>
@@ -720,6 +721,7 @@ S: Odd Fixes
F: hw/*/exynos*
F: include/hw/*/exynos*
F: docs/system/arm/exynos.rst
F: tests/functional/test_arm_smdkc210.py
Calxeda Highbank
M: Rob Herring <robh@kernel.org>
@@ -1025,6 +1027,7 @@ F: hw/display/dpcd.c
F: include/hw/display/dpcd.h
F: docs/system/arm/xlnx-versal-virt.rst
F: docs/system/arm/xlnx-zcu102.rst
F: tests/functional/test_aarch64_xlnx_versal.py
Xilinx Versal OSPI
M: Francisco Iglesias <francisco.iglesias@amd.com>
@@ -1115,6 +1118,7 @@ L: qemu-arm@nongnu.org
S: Maintained
F: hw/arm/msf2-som.c
F: docs/system/arm/emcraft-sf2.rst
F: tests/functional/test_arm_emcraft_sf2.py
ASPEED BMCs
M: Cédric Le Goater <clg@kaod.org>
@@ -1643,7 +1647,7 @@ F: hw/pci-host/sh_pci.c
F: hw/timer/sh_timer.c
F: include/hw/sh4/sh_intc.h
F: include/hw/timer/tmu012.h
F: tests/functional/test_sh4_r2d.py
F: tests/functional/test_sh4*_r2d.py
F: tests/functional/test_sh4_tuxrun.py
SPARC Machines
docs/conf.py
+1 -1
View File
@@ -186,7 +186,7 @@ html_js_files = [
]
html_context = {
"display_gitlab": True,
"source_url_prefix": "https://gitlab.com/qemu-project/qemu/-/blob/master/docs/",
"gitlab_user": "qemu-project",
"gitlab_repo": "qemu",
"gitlab_version": "master",
hw/arm/virt.c
+9 -2
View File
@@ -3353,10 +3353,17 @@ static void machvirt_machine_init(void)
}
type_init(machvirt_machine_init);
static void virt_machine_9_2_options(MachineClass *mc)
static void virt_machine_10_0_options(MachineClass *mc)
{
}
DEFINE_VIRT_MACHINE_AS_LATEST(9, 2)
DEFINE_VIRT_MACHINE_AS_LATEST(10, 0)
static void virt_machine_9_2_options(MachineClass *mc)
{
virt_machine_10_0_options(mc);
compat_props_add(mc->compat_props, hw_compat_9_2, hw_compat_9_2_len);
}
DEFINE_VIRT_MACHINE(9, 2)
static void virt_machine_9_1_options(MachineClass *mc)
{
hw/core/machine.c
+3
View File
@@ -36,6 +36,9 @@
#include "hw/virtio/virtio-iommu.h"
#include "audio/audio.h"
GlobalProperty hw_compat_9_2[] = {};
const size_t hw_compat_9_2_len = G_N_ELEMENTS(hw_compat_9_2);
GlobalProperty hw_compat_9_1[] = {
{ TYPE_PCI_DEVICE, "x-pcie-ext-tag", "false" },
};
hw/i386/pc.c
+3
View File
@@ -79,6 +79,9 @@
{ "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
{ "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },
GlobalProperty pc_compat_9_2[] = {};
const size_t pc_compat_9_2_len = G_N_ELEMENTS(pc_compat_9_2);
GlobalProperty pc_compat_9_1[] = {
{ "ICH9-LPC", "x-smi-swsmi-timer", "off" },
{ "ICH9-LPC", "x-smi-periodic-timer", "off" },
hw/i386/pc_piix.c
+14 -6
View File
@@ -446,7 +446,10 @@ static void pc_i440fx_init(MachineState *machine)
}
#define DEFINE_I440FX_MACHINE(major, minor) \
DEFINE_PC_VER_MACHINE(pc_i440fx, "pc-i440fx", pc_i440fx_init, major, minor);
DEFINE_PC_VER_MACHINE(pc_i440fx, "pc-i440fx", pc_i440fx_init, false, NULL, major, minor);
#define DEFINE_I440FX_MACHINE_AS_LATEST(major, minor) \
DEFINE_PC_VER_MACHINE(pc_i440fx, "pc-i440fx", pc_i440fx_init, true, "pc", major, minor);
static void pc_i440fx_machine_options(MachineClass *m)
{
@@ -474,11 +477,18 @@ static void pc_i440fx_machine_options(MachineClass *m)
"Use a different south bridge than PIIX3");
}
static void pc_i440fx_machine_9_2_options(MachineClass *m)
static void pc_i440fx_machine_10_0_options(MachineClass *m)
{
pc_i440fx_machine_options(m);
m->alias = "pc";
m->is_default = true;
}
DEFINE_I440FX_MACHINE_AS_LATEST(10, 0);
static void pc_i440fx_machine_9_2_options(MachineClass *m)
{
pc_i440fx_machine_10_0_options(m);
compat_props_add(m->compat_props, hw_compat_9_2, hw_compat_9_2_len);
compat_props_add(m->compat_props, pc_compat_9_2, pc_compat_9_2_len);
}
DEFINE_I440FX_MACHINE(9, 2);
@@ -486,8 +496,6 @@ DEFINE_I440FX_MACHINE(9, 2);
static void pc_i440fx_machine_9_1_options(MachineClass *m)
{
pc_i440fx_machine_9_2_options(m);
m->alias = NULL;
m->is_default = false;
compat_props_add(m->compat_props, hw_compat_9_1, hw_compat_9_1_len);
compat_props_add(m->compat_props, pc_compat_9_1, pc_compat_9_1_len);
}
hw/i386/pc_q35.c
+15 -5
View File
@@ -327,10 +327,13 @@ static void pc_q35_init(MachineState *machine)
}
#define DEFINE_Q35_MACHINE(major, minor) \
DEFINE_PC_VER_MACHINE(pc_q35, "pc-q35", pc_q35_init, major, minor);
DEFINE_PC_VER_MACHINE(pc_q35, "pc-q35", pc_q35_init, false, NULL, major, minor);
#define DEFINE_Q35_MACHINE_AS_LATEST(major, minor) \
DEFINE_PC_VER_MACHINE(pc_q35, "pc-q35", pc_q35_init, false, "q35", major, minor);
#define DEFINE_Q35_MACHINE_BUGFIX(major, minor, micro) \
DEFINE_PC_VER_MACHINE(pc_q35, "pc-q35", pc_q35_init, major, minor, micro);
DEFINE_PC_VER_MACHINE(pc_q35, "pc-q35", pc_q35_init, false, NULL, major, minor, micro);
static void pc_q35_machine_options(MachineClass *m)
{
@@ -356,10 +359,18 @@ static void pc_q35_machine_options(MachineClass *m)
pc_q35_compat_defaults, pc_q35_compat_defaults_len);
}
static void pc_q35_machine_9_2_options(MachineClass *m)
static void pc_q35_machine_10_0_options(MachineClass *m)
{
pc_q35_machine_options(m);
m->alias = "q35";
}
DEFINE_Q35_MACHINE_AS_LATEST(10, 0);
static void pc_q35_machine_9_2_options(MachineClass *m)
{
pc_q35_machine_10_0_options(m);
compat_props_add(m->compat_props, hw_compat_9_2, hw_compat_9_2_len);
compat_props_add(m->compat_props, pc_compat_9_2, pc_compat_9_2_len);
}
DEFINE_Q35_MACHINE(9, 2);
@@ -367,7 +378,6 @@ DEFINE_Q35_MACHINE(9, 2);
static void pc_q35_machine_9_1_options(MachineClass *m)
{
pc_q35_machine_9_2_options(m);
m->alias = NULL;
compat_props_add(m->compat_props, hw_compat_9_1, hw_compat_9_1_len);
compat_props_add(m->compat_props, pc_compat_9_1, pc_compat_9_1_len);
}
hw/m68k/virt.c
+9 -2
View File
@@ -366,10 +366,17 @@ type_init(virt_machine_register_types)
#define DEFINE_VIRT_MACHINE(major, minor) \
DEFINE_VIRT_MACHINE_IMPL(false, major, minor)
static void virt_machine_9_2_options(MachineClass *mc)
static void virt_machine_10_0_options(MachineClass *mc)
{
}
DEFINE_VIRT_MACHINE_AS_LATEST(9, 2)
DEFINE_VIRT_MACHINE_AS_LATEST(10, 0)
static void virt_machine_9_2_options(MachineClass *mc)
{
virt_machine_10_0_options(mc);
compat_props_add(mc->compat_props, hw_compat_9_2, hw_compat_9_2_len);
}
DEFINE_VIRT_MACHINE(9, 2)
static void virt_machine_9_1_options(MachineClass *mc)
{
hw/ppc/spapr.c
+14 -3
View File
@@ -4733,14 +4733,25 @@ static void spapr_machine_latest_class_options(MachineClass *mc)
DEFINE_SPAPR_MACHINE_IMPL(false, major, minor)
/*
* pseries-9.2
* pseries-10.0
*/
static void spapr_machine_9_2_class_options(MachineClass *mc)
static void spapr_machine_10_0_class_options(MachineClass *mc)
{
/* Defaults for the latest behaviour inherited from the base class */
}
DEFINE_SPAPR_MACHINE_AS_LATEST(9, 2);
DEFINE_SPAPR_MACHINE_AS_LATEST(10, 0);
/*
* pseries-9.2
*/
static void spapr_machine_9_2_class_options(MachineClass *mc)
{
spapr_machine_10_0_class_options(mc);
compat_props_add(mc->compat_props, hw_compat_9_2, hw_compat_9_2_len);
}
DEFINE_SPAPR_MACHINE(9, 2);
/*
* pseries-9.1
hw/s390x/s390-virtio-ccw.c
+13 -1
View File
@@ -849,14 +849,26 @@ static const TypeInfo ccw_machine_info = {
DEFINE_CCW_MACHINE_IMPL(false, major, minor)
static void ccw_machine_10_0_instance_options(MachineState *machine)
{
}
static void ccw_machine_10_0_class_options(MachineClass *mc)
{
}
DEFINE_CCW_MACHINE_AS_LATEST(10, 0);
static void ccw_machine_9_2_instance_options(MachineState *machine)
{
ccw_machine_10_0_instance_options(machine);
}
static void ccw_machine_9_2_class_options(MachineClass *mc)
{
ccw_machine_10_0_class_options(mc);
compat_props_add(mc->compat_props, hw_compat_9_2, hw_compat_9_2_len);
}
DEFINE_CCW_MACHINE_AS_LATEST(9, 2);
DEFINE_CCW_MACHINE(9, 2);
static void ccw_machine_9_1_instance_options(MachineState *machine)
{
include/hw/boards.h
+3
View File
@@ -756,6 +756,9 @@ struct MachineState {
} \
type_init(machine_initfn##_register_types)
extern GlobalProperty hw_compat_9_2[];
extern const size_t hw_compat_9_2_len;
extern GlobalProperty hw_compat_9_1[];
extern const size_t hw_compat_9_1_len;
include/hw/i386/pc.h
+6 -1
View File
@@ -215,6 +215,9 @@ void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size);
/* sgx.c */
void pc_machine_init_sgx_epc(PCMachineState *pcms);
extern GlobalProperty pc_compat_9_2[];
extern const size_t pc_compat_9_2_len;
extern GlobalProperty pc_compat_9_1[];
extern const size_t pc_compat_9_1_len;
@@ -320,7 +323,7 @@ extern const size_t pc_compat_2_3_len;
} \
type_init(pc_machine_init_##suffix)
#define DEFINE_PC_VER_MACHINE(namesym, namestr, initfn, ...) \
#define DEFINE_PC_VER_MACHINE(namesym, namestr, initfn, isdefault, malias, ...) \
static void MACHINE_VER_SYM(init, namesym, __VA_ARGS__)( \
MachineState *machine) \
{ \
@@ -334,6 +337,8 @@ extern const size_t pc_compat_2_3_len;
MACHINE_VER_SYM(options, namesym, __VA_ARGS__)(mc); \
mc->init = MACHINE_VER_SYM(init, namesym, __VA_ARGS__); \
MACHINE_VER_DEPRECATION(__VA_ARGS__); \
mc->is_default = isdefault; \
mc->alias = malias; \
} \
static const TypeInfo MACHINE_VER_SYM(info, namesym, __VA_ARGS__) = \
{ \
include/standard-headers/drm/drm_fourcc.h
+1
View File
@@ -1515,6 +1515,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier)
* 64K_D_2D on GFX12 is identical to 64K_D on GFX11.
*/
#define AMD_FMT_MOD_TILE_GFX9_64K_D 10
#define AMD_FMT_MOD_TILE_GFX9_4K_D_X 22
#define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25
#define AMD_FMT_MOD_TILE_GFX9_64K_D_X 26
#define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27
include/standard-headers/linux/ethtool.h
+5
View File
@@ -2526,6 +2526,11 @@ struct ethtool_link_settings {
uint8_t master_slave_state;
uint8_t rate_matching;
uint32_t reserved[7];
/* Linux builds with -Wflex-array-member-not-at-end but does
* not use the "link_mode_masks" member. Leave it defined for
* userspace for now, and when userspace wants to start using
* -Wfamnae, we'll need a new solution.
*/
uint32_t link_mode_masks[];
/* layout of link_mode_masks fields:
* uint32_t map_supported[link_mode_masks_nwords];
include/standard-headers/linux/pci_regs.h
+30 -8
View File
@@ -340,7 +340,8 @@
#define PCI_MSIX_ENTRY_UPPER_ADDR 0x4 /* Message Upper Address */
#define PCI_MSIX_ENTRY_DATA 0x8 /* Message Data */
#define PCI_MSIX_ENTRY_VECTOR_CTRL 0xc /* Vector Control */
#define PCI_MSIX_ENTRY_CTRL_MASKBIT 0x00000001
#define PCI_MSIX_ENTRY_CTRL_MASKBIT 0x00000001 /* Mask Bit */
#define PCI_MSIX_ENTRY_CTRL_ST 0xffff0000 /* Steering Tag */
/* CompactPCI Hotswap Register */
@@ -659,6 +660,7 @@
#define PCI_EXP_DEVCAP2_ATOMIC_COMP64 0x00000100 /* 64b AtomicOp completion */
#define PCI_EXP_DEVCAP2_ATOMIC_COMP128 0x00000200 /* 128b AtomicOp completion */
#define PCI_EXP_DEVCAP2_LTR 0x00000800 /* Latency tolerance reporting */
#define PCI_EXP_DEVCAP2_TPH_COMP_MASK 0x00003000 /* TPH completer support */
#define PCI_EXP_DEVCAP2_OBFF_MASK 0x000c0000 /* OBFF support mechanism */
#define PCI_EXP_DEVCAP2_OBFF_MSG 0x00040000 /* New message signaling */
#define PCI_EXP_DEVCAP2_OBFF_WAKE 0x00080000 /* Re-use WAKE# for OBFF */
@@ -678,6 +680,7 @@
#define PCI_EXP_DEVSTA2 0x2a /* Device Status 2 */
#define PCI_CAP_EXP_RC_ENDPOINT_SIZEOF_V2 0x2c /* end of v2 EPs w/o link */
#define PCI_EXP_LNKCAP2 0x2c /* Link Capabilities 2 */
#define PCI_EXP_LNKCAP2_SLS 0x000000fe /* Supported Link Speeds Vector */
#define PCI_EXP_LNKCAP2_SLS_2_5GB 0x00000002 /* Supported Speed 2.5GT/s */
#define PCI_EXP_LNKCAP2_SLS_5_0GB 0x00000004 /* Supported Speed 5GT/s */
#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x00000008 /* Supported Speed 8GT/s */
@@ -1023,15 +1026,34 @@
#define PCI_DPA_CAP_SUBSTATE_MASK 0x1F /* # substates - 1 */
#define PCI_DPA_BASE_SIZEOF 16 /* size with 0 substates */
/* TPH Completer Support */
#define PCI_EXP_DEVCAP2_TPH_COMP_NONE 0x0 /* None */
#define PCI_EXP_DEVCAP2_TPH_COMP_TPH_ONLY 0x1 /* TPH only */
#define PCI_EXP_DEVCAP2_TPH_COMP_EXT_TPH 0x3 /* TPH and Extended TPH */
/* TPH Requester */
#define PCI_TPH_CAP 4 /* capability register */
#define PCI_TPH_CAP_LOC_MASK 0x600 /* location mask */
#define PCI_TPH_LOC_NONE 0x000 /* no location */
#define PCI_TPH_LOC_CAP 0x200 /* in capability */
#define PCI_TPH_LOC_MSIX 0x400 /* in MSI-X */
#define PCI_TPH_CAP_ST_MASK 0x07FF0000 /* ST table mask */
#define PCI_TPH_CAP_ST_SHIFT 16 /* ST table shift */
#define PCI_TPH_BASE_SIZEOF 0xc /* size with no ST table */
#define PCI_TPH_CAP_ST_NS 0x00000001 /* No ST Mode Supported */
#define PCI_TPH_CAP_ST_IV 0x00000002 /* Interrupt Vector Mode Supported */
#define PCI_TPH_CAP_ST_DS 0x00000004 /* Device Specific Mode Supported */
#define PCI_TPH_CAP_EXT_TPH 0x00000100 /* Ext TPH Requester Supported */
#define PCI_TPH_CAP_LOC_MASK 0x00000600 /* ST Table Location */
#define PCI_TPH_LOC_NONE 0x00000000 /* Not present */
#define PCI_TPH_LOC_CAP 0x00000200 /* In capability */
#define PCI_TPH_LOC_MSIX 0x00000400 /* In MSI-X */
#define PCI_TPH_CAP_ST_MASK 0x07FF0000 /* ST Table Size */
#define PCI_TPH_CAP_ST_SHIFT 16 /* ST Table Size shift */
#define PCI_TPH_BASE_SIZEOF 0xc /* Size with no ST table */
#define PCI_TPH_CTRL 8 /* control register */
#define PCI_TPH_CTRL_MODE_SEL_MASK 0x00000007 /* ST Mode Select */
#define PCI_TPH_ST_NS_MODE 0x0 /* No ST Mode */
#define PCI_TPH_ST_IV_MODE 0x1 /* Interrupt Vector Mode */
#define PCI_TPH_ST_DS_MODE 0x2 /* Device Specific Mode */
#define PCI_TPH_CTRL_REQ_EN_MASK 0x00000300 /* TPH Requester Enable */
#define PCI_TPH_REQ_DISABLE 0x0 /* No TPH requests allowed */
#define PCI_TPH_REQ_TPH_ONLY 0x1 /* TPH only requests allowed */
#define PCI_TPH_REQ_EXT_TPH 0x3 /* Extended TPH requests allowed */
/* Downstream Port Containment */
#define PCI_EXP_DPC_CAP 0x04 /* DPC Capability */
include/standard-headers/linux/virtio_crypto.h
+1
View File
@@ -329,6 +329,7 @@ struct virtio_crypto_op_header {
VIRTIO_CRYPTO_OPCODE(VIRTIO_CRYPTO_SERVICE_AKCIPHER, 0x00)
#define VIRTIO_CRYPTO_AKCIPHER_DECRYPT \
VIRTIO_CRYPTO_OPCODE(VIRTIO_CRYPTO_SERVICE_AKCIPHER, 0x01)
/* akcipher sign/verify opcodes are deprecated */
#define VIRTIO_CRYPTO_AKCIPHER_SIGN \
VIRTIO_CRYPTO_OPCODE(VIRTIO_CRYPTO_SERVICE_AKCIPHER, 0x02)
#define VIRTIO_CRYPTO_AKCIPHER_VERIFY \
include/standard-headers/linux/virtio_pci.h
+131
View File
@@ -40,6 +40,7 @@
#define _LINUX_VIRTIO_PCI_H
#include "standard-headers/linux/types.h"
#include "standard-headers/linux/kernel.h"
#ifndef VIRTIO_PCI_NO_LEGACY
@@ -240,6 +241,17 @@ struct virtio_pci_cfg_cap {
#define VIRTIO_ADMIN_CMD_LEGACY_DEV_CFG_READ 0x5
#define VIRTIO_ADMIN_CMD_LEGACY_NOTIFY_INFO 0x6
/* Device parts access commands. */
#define VIRTIO_ADMIN_CMD_CAP_ID_LIST_QUERY 0x7
#define VIRTIO_ADMIN_CMD_DEVICE_CAP_GET 0x8
#define VIRTIO_ADMIN_CMD_DRIVER_CAP_SET 0x9
#define VIRTIO_ADMIN_CMD_RESOURCE_OBJ_CREATE 0xa
#define VIRTIO_ADMIN_CMD_RESOURCE_OBJ_DESTROY 0xd
#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_GET 0xe
#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET 0xf
#define VIRTIO_ADMIN_CMD_DEV_PARTS_SET 0x10
#define VIRTIO_ADMIN_CMD_DEV_MODE_SET 0x11
struct virtio_admin_cmd_hdr {
uint16_t opcode;
/*
@@ -286,4 +298,123 @@ struct virtio_admin_cmd_notify_info_result {
struct virtio_admin_cmd_notify_info_data entries[VIRTIO_ADMIN_CMD_MAX_NOTIFY_INFO];
};
#define VIRTIO_DEV_PARTS_CAP 0x0000
struct virtio_dev_parts_cap {
uint8_t get_parts_resource_objects_limit;
uint8_t set_parts_resource_objects_limit;
};
#define MAX_CAP_ID __KERNEL_DIV_ROUND_UP(VIRTIO_DEV_PARTS_CAP + 1, 64)
struct virtio_admin_cmd_query_cap_id_result {
uint64_t supported_caps[MAX_CAP_ID];
};
struct virtio_admin_cmd_cap_get_data {
uint16_t id;
uint8_t reserved[6];
};
struct virtio_admin_cmd_cap_set_data {
uint16_t id;
uint8_t reserved[6];
uint8_t cap_specific_data[];
};
struct virtio_admin_cmd_resource_obj_cmd_hdr {
uint16_t type;
uint8_t reserved[2];
uint32_t id; /* Indicates unique resource object id per resource object type */
};
struct virtio_admin_cmd_resource_obj_create_data {
struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
uint64_t flags;
uint8_t resource_obj_specific_data[];
};
#define VIRTIO_RESOURCE_OBJ_DEV_PARTS 0
#define VIRTIO_RESOURCE_OBJ_DEV_PARTS_TYPE_GET 0
#define VIRTIO_RESOURCE_OBJ_DEV_PARTS_TYPE_SET 1
struct virtio_resource_obj_dev_parts {
uint8_t type;
uint8_t reserved[7];
};
#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_SIZE 0
#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_COUNT 1
#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_LIST 2
struct virtio_admin_cmd_dev_parts_metadata_data {
struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
uint8_t type;
uint8_t reserved[7];
};
#define VIRTIO_DEV_PART_F_OPTIONAL 0
struct virtio_dev_part_hdr {
uint16_t part_type;
uint8_t flags;
uint8_t reserved;
union {
struct {
uint32_t offset;
uint32_t reserved;
} pci_common_cfg;
struct {
uint16_t index;
uint8_t reserved[6];
} vq_index;
} selector;
uint32_t length;
};
struct virtio_dev_part {
struct virtio_dev_part_hdr hdr;
uint8_t value[];
};
struct virtio_admin_cmd_dev_parts_metadata_result {
union {
struct {
uint32_t size;
uint32_t reserved;
} parts_size;
struct {
uint32_t count;
uint32_t reserved;
} hdr_list_count;
struct {
uint32_t count;
uint32_t reserved;
struct virtio_dev_part_hdr hdrs[];
} hdr_list;
};
};
#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET_TYPE_SELECTED 0
#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET_TYPE_ALL 1
struct virtio_admin_cmd_dev_parts_get_data {
struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
uint8_t type;
uint8_t reserved[7];
struct virtio_dev_part_hdr hdr_list[];
};
struct virtio_admin_cmd_dev_parts_set_data {
struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
struct virtio_dev_part parts[];
};
#define VIRTIO_ADMIN_CMD_DEV_MODE_F_STOPPED 0
struct virtio_admin_cmd_dev_mode_set_data {
uint8_t flags;
};
#endif
linux-headers/asm-arm64/kvm.h
+6
View File
@@ -473,6 +473,12 @@ enum {
*/
#define KVM_SYSTEM_EVENT_RESET_FLAG_PSCI_RESET2 (1ULL << 0)
/*
* Shutdown caused by a PSCI v1.3 SYSTEM_OFF2 call.
* Valid only when the system event has a type of KVM_SYSTEM_EVENT_SHUTDOWN.
*/
#define KVM_SYSTEM_EVENT_SHUTDOWN_FLAG_PSCI_OFF2 (1ULL << 0)
/* run->fail_entry.hardware_entry_failure_reason codes. */
#define KVM_EXIT_FAIL_ENTRY_CPU_UNSUPPORTED (1ULL << 0)
linux-headers/asm-arm64/unistd_64.h
+4
View File
@@ -319,6 +319,10 @@
#define __NR_lsm_set_self_attr 460
#define __NR_lsm_list_modules 461
#define __NR_mseal 462
#define __NR_setxattrat 463
#define __NR_getxattrat 464
#define __NR_listxattrat 465
#define __NR_removexattrat 466
#endif /* _ASM_UNISTD_64_H */
linux-headers/asm-generic/mman-common.h
+3
View File
@@ -79,6 +79,9 @@
#define MADV_COLLAPSE 25 /* Synchronous hugepage collapse */
#define MADV_GUARD_INSTALL 102 /* fatal signal on access to range */
#define MADV_GUARD_REMOVE 103 /* unguard range */
/* compatibility flags */
#define MAP_FILE 0

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