mirror of
https://github.com/izzy2lost/xemu.git
synced 2026-07-06 00:20:22 -07:00
Merge tag 'hw-misc-20240913' of https://github.com/philmd/qemu into staging
Misc HW & UI patches - Remove deprecated SH4 SHIX machine TC58128 NAND EEPROM (Phil) - Remove deprecated CRIS target (Phil) - Remove deprecated RISC-V 'any' CPU type (Phil) - Add fifo8_peek_buf() to correctly handle FIFO wraparound (Mark) - Minor cleanups in Designware PCIe, PL011 and loongson IPI models (Phil) - Fixes in TI TMP105 temperature (Guenter) - Convert Sun ESCC and ADB mouses to QemuInputHandler (Mark) - Prevent heap overflow in VIRTIO sound device (Volker) - Cleanups around g_assert_not_reached() call (Pierrick) - Add Clément as VT-d reviewer (Clément) - Prevent stuck modifier keys and unexpected text input on Windows (Volker) - Explicitly set SDL2 swap interval when OpenGL is enabled (Gert) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmbkoOUACgkQ4+MsLN6t # wN56SBAA1nYl5YTI0BwvToKysoNIJ5aTgDEbT87XYTatKYyWYlN5W1yrAeMcuwFO # Rw8edtn2YY89ZMG/LPcY1h6+nI2qVMpuOzNP3ve4D+eM6AMUMX0bzeqXndUind7c # 1kTcV7Wctfk34zzs5B9GIU0WswSSbL3FeETS47ySNg6J7GbVWIu41dh52oeg8XWa # Zfw0FZDt7hSAbsUckBIC9/Nbh0hucxBnQevQLkVb6u8O0yX3wV2OZRIC7+NkvHkH # ZLPT8lg197PitH0NouUJI5oMv5Ty3PXGHtrIAKvts+fGBpWL+XzEtQmT8RzqgxTl # 9Z6C/PvfMHNtA7BE66D4iLOKBPpV0RCUDOAGsfcWy5GuklzeUy03DxZ/2xO8XERm # TP0EP0nt2YddnELX7H65b78gJkPvnhME/MtA6Y6R7uxAA8gawZVWZQ1oDGUBNGDI # zJ62Cu4nYPwpGiewwb+ZTkjeiaYddJsPNsE8f8d4XZCpTwpIM/oYzJapxedBwjrg # a4eAWiy7xIvvGPxWN7IQPosGYcyO6zhbI+iAbxp1xmWsX0TPgLUcJtK9+pklqWS7 # 9ucrvkq5XRZSJMaGF0LZuZH7Qx6us7m0rik5wG96d8qrIXRpi8kXfWxI17SWQkGa # cG91u+FrKmfBr+yD7Q1gVbaYzkD+X1hPkQmSVmnlNS+5axrnSYQ= # =sPwb # -----END PGP SIGNATURE----- # gpg: Signature made Fri 13 Sep 2024 21:30:29 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20240913' of https://github.com/philmd/qemu: (60 commits) ui: remove break after g_assert_not_reached() ui/sdl2: set swap interval explicitly when OpenGL is enabled ui/sdl2: ignore GUI keys in SDL_TEXTINPUT handler ui/sdl2: release all modifiers system: replace assert(0) with g_assert_not_reached() hw/pci-host: remove break after g_assert_not_reached() hw/misc: remove break after g_assert_not_reached() hw/gpio: remove break after g_assert_not_reached() hw/watchdog: replace assert(0) with g_assert_not_reached() hw/core: replace assert(0) with g_assert_not_reached() hw/char: replace assert(0) with g_assert_not_reached() hw/input/adb-mouse: convert to use QemuInputHandler hw/char/escc: convert Sun mouse to use QemuInputHandler hw/sensor/tmp105: Lower 4 bit of limit registers are always 0 hw/sensor/tmp105: OS (one-shot) bit in config register always returns 0 hw/sensor/tmp105: Pass 'oneshot' argument to tmp105_alarm_update() hw/sensor/tmp105: Use registerfields API hw/sensor/tmp105: Coding style fixes tests/unit: Comment FIFO8 tests tests/unit: Expand test_fifo8_peek_buf_wrap() coverage ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
@@ -675,7 +675,7 @@ build-without-defaults:
|
||||
--disable-pie
|
||||
--disable-qom-cast-debug
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--disable-strip
|
||||
TARGETS: alpha-softmmu avr-softmmu cris-softmmu hppa-softmmu m68k-softmmu
|
||||
TARGETS: alpha-softmmu avr-softmmu hppa-softmmu m68k-softmmu
|
||||
mips-softmmu mips64-softmmu mipsel-softmmu mips64el-softmmu
|
||||
ppc-softmmu s390x-softmmu sh4-softmmu sh4eb-softmmu sparc-softmmu
|
||||
sparc64-softmmu tricore-softmmu xtensa-softmmu xtensaeb-softmmu
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|
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@@ -90,11 +90,6 @@ xtensa-debian-cross-container:
|
||||
variables:
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||||
NAME: debian-xtensa-cross
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||||
|
||||
cris-fedora-cross-container:
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extends: .container_job_template
|
||||
variables:
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||||
NAME: fedora-cris-cross
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||||
|
||||
win64-fedora-cross-container:
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extends: .container_job_template
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||||
variables:
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||||
|
||||
@@ -20,7 +20,7 @@
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- ccache --zero-stats
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- ../configure --enable-werror --disable-docs --enable-fdt=system
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||||
--disable-user $QEMU_CONFIGURE_OPTS $EXTRA_CONFIGURE_OPTS
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||||
--target-list-exclude="arm-softmmu cris-softmmu
|
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--target-list-exclude="arm-softmmu
|
||||
i386-softmmu microblaze-softmmu mips-softmmu mipsel-softmmu
|
||||
mips64-softmmu ppc-softmmu riscv32-softmmu sh4-softmmu
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||||
sparc-softmmu xtensa-softmmu $CROSS_SKIP_TARGETS"
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@@ -73,7 +73,7 @@
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- cd build
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- ../configure --enable-werror --disable-docs $QEMU_CONFIGURE_OPTS
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--disable-system --target-list-exclude="aarch64_be-linux-user
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alpha-linux-user cris-linux-user m68k-linux-user microblazeel-linux-user
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alpha-linux-user m68k-linux-user microblazeel-linux-user
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or1k-linux-user ppc-linux-user sparc-linux-user
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xtensa-linux-user $CROSS_SKIP_TARGETS"
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- make -j$(expr $(nproc) + 1) all check-build $MAKE_CHECK_ARGS
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|
||||
+1
-23
@@ -227,10 +227,6 @@ F: tests/functional/test_avr_mega2560.py
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||||
CRIS TCG CPUs
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||||
M: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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S: Maintained
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F: target/cris/
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F: hw/cris/
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F: include/hw/cris/
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F: tests/tcg/cris/
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F: disas/cris.c
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|
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Hexagon TCG CPUs
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@@ -1215,14 +1211,6 @@ M: Philippe Mathieu-Daudé <philmd@linaro.org>
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||||
S: Maintained
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F: hw/avr/arduino.c
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||||
|
||||
CRIS Machines
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||||
-------------
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Axis Dev88
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M: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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S: Maintained
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F: hw/cris/axis_dev88.c
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F: hw/*/etraxfs_*.c
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||||
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HP-PARISC Machines
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------------------
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HP B160L, HP C3700
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@@ -1688,17 +1676,6 @@ F: hw/timer/sh_timer.c
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F: include/hw/sh4/sh_intc.h
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F: include/hw/timer/tmu012.h
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Shix
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R: Yoshinori Sato <ysato@users.sourceforge.jp>
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R: Magnus Damm <magnus.damm@gmail.com>
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S: Odd Fixes
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F: hw/block/tc58128.c
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F: hw/char/sh_serial.c
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F: hw/sh4/shix.c
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F: hw/intc/sh_intc.c
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F: hw/timer/sh_timer.c
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F: include/hw/sh4/sh_intc.h
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||||
|
||||
SPARC Machines
|
||||
--------------
|
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Sun4m
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@@ -3690,6 +3667,7 @@ VT-d Emulation
|
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M: Michael S. Tsirkin <mst@redhat.com>
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R: Jason Wang <jasowang@redhat.com>
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R: Yi Liu <yi.l.liu@intel.com>
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R: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
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||||
S: Supported
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||||
F: hw/i386/intel_iommu.c
|
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F: hw/i386/intel_iommu_internal.h
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||||
|
||||
@@ -1,4 +0,0 @@
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||||
# Default configuration for cris-softmmu
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||||
|
||||
# Boards are selected by default, uncomment to keep out of the build.
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||||
# CONFIG_AXIS=n
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||||
@@ -7,4 +7,3 @@
|
||||
|
||||
# Boards are selected by default, uncomment to keep out of the build.
|
||||
# CONFIG_R2D=n
|
||||
# CONFIG_SHIX=n
|
||||
|
||||
@@ -1 +0,0 @@
|
||||
TARGET_ARCH=cris
|
||||
@@ -1 +0,0 @@
|
||||
TARGET_ARCH=cris
|
||||
@@ -1250,7 +1250,6 @@ probe_target_compiler() {
|
||||
aarch64) container_hosts="x86_64 aarch64" ;;
|
||||
alpha) container_hosts=x86_64 ;;
|
||||
arm) container_hosts="x86_64 aarch64" ;;
|
||||
cris) container_hosts=x86_64 ;;
|
||||
hexagon) container_hosts=x86_64 ;;
|
||||
hppa) container_hosts=x86_64 ;;
|
||||
i386) container_hosts=x86_64 ;;
|
||||
@@ -1309,9 +1308,6 @@ probe_target_compiler() {
|
||||
container_image=debian-armhf-cross
|
||||
container_cross_prefix=arm-linux-gnueabihf-
|
||||
;;
|
||||
cris)
|
||||
container_image=fedora-cris-cross
|
||||
;;
|
||||
hexagon)
|
||||
container_cross_prefix=hexagon-unknown-linux-musl-
|
||||
container_cross_cc=${container_cross_prefix}clang
|
||||
|
||||
@@ -206,14 +206,6 @@ in the QEMU object model anymore. ``Sun-UltraSparc-IIIi+`` and
|
||||
but for consistency these will get removed in a future release, too.
|
||||
Use ``Sun-UltraSparc-IIIi-plus`` and ``Sun-UltraSparc-IV-plus`` instead.
|
||||
|
||||
CRIS CPU architecture (since 9.0)
|
||||
'''''''''''''''''''''''''''''''''
|
||||
|
||||
The CRIS architecture was pulled from Linux in 4.17 and the compiler
|
||||
is no longer packaged in any distro making it harder to run the
|
||||
``check-tcg`` tests. Unless we can improve the testing situation there
|
||||
is a chance the code will bitrot without anyone noticing.
|
||||
|
||||
System emulator machines
|
||||
------------------------
|
||||
|
||||
@@ -232,12 +224,6 @@ These old machine types are quite neglected nowadays and thus might have
|
||||
various pitfalls with regards to live migration. Use a newer machine type
|
||||
instead.
|
||||
|
||||
``shix`` (since 9.0)
|
||||
''''''''''''''''''''
|
||||
|
||||
The machine is no longer in existence and has been long unmaintained
|
||||
in QEMU. This also holds for the TC51828 16MiB flash that it uses.
|
||||
|
||||
``pseries-2.1`` up to ``pseries-2.12`` (since 9.0)
|
||||
''''''''''''''''''''''''''''''''''''''''''''''''''
|
||||
|
||||
@@ -347,19 +333,6 @@ QEMU's ``vhost`` feature, which would eliminate the high latency costs under
|
||||
which the 9p ``proxy`` backend currently suffers. However as of to date nobody
|
||||
has indicated plans for such kind of reimplementation unfortunately.
|
||||
|
||||
RISC-V 'any' CPU type ``-cpu any`` (since 8.2)
|
||||
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
The 'any' CPU type was introduced back in 2018 and has been around since the
|
||||
initial RISC-V QEMU port. Its usage has always been unclear: users don't know
|
||||
what to expect from a CPU called 'any', and in fact the CPU does not do anything
|
||||
special that isn't already done by the default CPUs rv32/rv64.
|
||||
|
||||
After the introduction of the 'max' CPU type, RISC-V now has a good coverage
|
||||
of generic CPUs: rv32 and rv64 as default CPUs and 'max' as a feature complete
|
||||
CPU for both 32 and 64 bit builds. Users are then discouraged to use the 'any'
|
||||
CPU type starting in 8.2.
|
||||
|
||||
RISC-V CPU properties which start with capital 'Z' (since 8.2)
|
||||
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
|
||||
@@ -26,10 +26,6 @@ depending on the guest architecture.
|
||||
- :ref:`Yes<AVR-System-emulator>`
|
||||
- No
|
||||
- 8 bit micro controller, often used in maker projects
|
||||
* - Cris
|
||||
- Yes
|
||||
- Yes
|
||||
- Embedded RISC chip developed by AXIS
|
||||
* - Hexagon
|
||||
- No
|
||||
- Yes
|
||||
|
||||
@@ -850,6 +850,14 @@ The RISC-V no MMU cpus have been removed. The two CPUs: ``rv32imacu-nommu`` and
|
||||
``rv64imacu-nommu`` can no longer be used. Instead the MMU status can be specified
|
||||
via the CPU ``mmu`` option when using the ``rv32`` or ``rv64`` CPUs.
|
||||
|
||||
RISC-V 'any' CPU type ``-cpu any`` (removed in 9.2)
|
||||
'''''''''''''''''''''''''''''''''''''''''''''''''''
|
||||
|
||||
The 'any' CPU type was introduced back in 2018 and was around since the
|
||||
initial RISC-V QEMU port. Its usage was always been unclear: users don't know
|
||||
what to expect from a CPU called 'any', and in fact the CPU does not do anything
|
||||
special that isn't already done by the default CPUs rv32/rv64.
|
||||
|
||||
``compat`` property of server class POWER CPUs (removed in 6.0)
|
||||
'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
|
||||
|
||||
@@ -889,6 +897,13 @@ Nios II CPU (removed in 9.1)
|
||||
QEMU Nios II architecture was orphan; Intel has EOL'ed the Nios II
|
||||
processor IP (see `Intel discontinuance notification`_).
|
||||
|
||||
CRIS CPU architecture (removed in 9.2)
|
||||
''''''''''''''''''''''''''''''''''''''
|
||||
|
||||
The CRIS architecture was pulled from Linux in 4.17 and the compiler
|
||||
was no longer packaged in any distro making it harder to run the
|
||||
``check-tcg`` tests.
|
||||
|
||||
System accelerators
|
||||
-------------------
|
||||
|
||||
@@ -978,6 +993,11 @@ Nios II ``10m50-ghrd`` and ``nios2-generic-nommu`` machines (removed in 9.1)
|
||||
|
||||
The Nios II architecture was orphan.
|
||||
|
||||
``shix`` (removed in 9.2)
|
||||
'''''''''''''''''''''''''
|
||||
|
||||
The machine was unmaintained.
|
||||
|
||||
linux-user mode CPUs
|
||||
--------------------
|
||||
|
||||
|
||||
@@ -130,10 +130,6 @@ Other binaries
|
||||
|
||||
The binary format is detected automatically.
|
||||
|
||||
- user mode (Cris)
|
||||
|
||||
* ``qemu-cris`` TODO.
|
||||
|
||||
- user mode (i386)
|
||||
|
||||
* ``qemu-i386`` TODO.
|
||||
|
||||
@@ -151,8 +151,8 @@ static void parts64_default_nan(FloatParts64 *p, float_status *status)
|
||||
#else
|
||||
/*
|
||||
* This case is true for Alpha, ARM, MIPS, OpenRISC, PPC, RISC-V,
|
||||
* S390, SH4, TriCore, and Xtensa. Our other supported targets,
|
||||
* such CRIS, do not have floating-point.
|
||||
* S390, SH4, TriCore, and Xtensa. Our other supported targets
|
||||
* do not have floating-point.
|
||||
*/
|
||||
if (snan_bit_is_one(status)) {
|
||||
/* set all bits other than msb */
|
||||
|
||||
@@ -50,7 +50,6 @@ source arm/Kconfig
|
||||
source cpu/Kconfig
|
||||
source alpha/Kconfig
|
||||
source avr/Kconfig
|
||||
source cris/Kconfig
|
||||
source hppa/Kconfig
|
||||
source i386/Kconfig
|
||||
source loongarch/Kconfig
|
||||
|
||||
@@ -28,9 +28,6 @@ config ECC
|
||||
config ONENAND
|
||||
bool
|
||||
|
||||
config TC58128
|
||||
bool
|
||||
|
||||
config VIRTIO_BLK
|
||||
bool
|
||||
default y
|
||||
|
||||
@@ -15,7 +15,6 @@ system_ss.add(when: 'CONFIG_SSI_M25P80', if_true: files('m25p80.c'))
|
||||
system_ss.add(when: 'CONFIG_SSI_M25P80', if_true: files('m25p80_sfdp.c'))
|
||||
system_ss.add(when: 'CONFIG_SWIM', if_true: files('swim.c'))
|
||||
system_ss.add(when: 'CONFIG_XEN_BUS', if_true: files('xen-block.c'))
|
||||
system_ss.add(when: 'CONFIG_TC58128', if_true: files('tc58128.c'))
|
||||
|
||||
specific_ss.add(when: 'CONFIG_VIRTIO_BLK', if_true: files('virtio-blk.c', 'virtio-blk-common.c'))
|
||||
specific_ss.add(when: 'CONFIG_VHOST_USER_BLK', if_true: files('vhost-user-blk.c', 'virtio-blk-common.c'))
|
||||
|
||||
@@ -1,211 +0,0 @@
|
||||
/*
|
||||
* TC58128 NAND EEPROM emulation
|
||||
*
|
||||
* Copyright (c) 2005 Samuel Tardieu
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*/
|
||||
#include "qemu/osdep.h"
|
||||
#include "qemu/units.h"
|
||||
#include "hw/sh4/sh.h"
|
||||
#include "hw/loader.h"
|
||||
#include "sysemu/qtest.h"
|
||||
#include "qemu/error-report.h"
|
||||
|
||||
#define CE1 0x0100
|
||||
#define CE2 0x0200
|
||||
#define RE 0x0400
|
||||
#define WE 0x0800
|
||||
#define ALE 0x1000
|
||||
#define CLE 0x2000
|
||||
#define RDY1 0x4000
|
||||
#define RDY2 0x8000
|
||||
#define RDY(n) ((n) == 0 ? RDY1 : RDY2)
|
||||
|
||||
typedef enum { WAIT, READ1, READ2, READ3 } state_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t *flash_contents;
|
||||
state_t state;
|
||||
uint32_t address;
|
||||
uint8_t address_cycle;
|
||||
} tc58128_dev;
|
||||
|
||||
static tc58128_dev tc58128_devs[2];
|
||||
|
||||
#define FLASH_SIZE (16 * MiB)
|
||||
|
||||
static void init_dev(tc58128_dev * dev, const char *filename)
|
||||
{
|
||||
int ret, blocks;
|
||||
|
||||
dev->state = WAIT;
|
||||
dev->flash_contents = g_malloc(FLASH_SIZE);
|
||||
memset(dev->flash_contents, 0xff, FLASH_SIZE);
|
||||
if (filename) {
|
||||
/* Load flash image skipping the first block */
|
||||
ret = load_image_size(filename, dev->flash_contents + 528 * 32,
|
||||
FLASH_SIZE - 528 * 32);
|
||||
if (ret < 0) {
|
||||
if (!qtest_enabled()) {
|
||||
error_report("Could not load flash image %s", filename);
|
||||
exit(1);
|
||||
}
|
||||
} else {
|
||||
/* Build first block with number of blocks */
|
||||
blocks = DIV_ROUND_UP(ret, 528 * 32);
|
||||
dev->flash_contents[0] = blocks & 0xff;
|
||||
dev->flash_contents[1] = (blocks >> 8) & 0xff;
|
||||
dev->flash_contents[2] = (blocks >> 16) & 0xff;
|
||||
dev->flash_contents[3] = (blocks >> 24) & 0xff;
|
||||
fprintf(stderr, "loaded %d bytes for %s into flash\n", ret,
|
||||
filename);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void handle_command(tc58128_dev * dev, uint8_t command)
|
||||
{
|
||||
switch (command) {
|
||||
case 0xff:
|
||||
fprintf(stderr, "reset flash device\n");
|
||||
dev->state = WAIT;
|
||||
break;
|
||||
case 0x00:
|
||||
fprintf(stderr, "read mode 1\n");
|
||||
dev->state = READ1;
|
||||
dev->address_cycle = 0;
|
||||
break;
|
||||
case 0x01:
|
||||
fprintf(stderr, "read mode 2\n");
|
||||
dev->state = READ2;
|
||||
dev->address_cycle = 0;
|
||||
break;
|
||||
case 0x50:
|
||||
fprintf(stderr, "read mode 3\n");
|
||||
dev->state = READ3;
|
||||
dev->address_cycle = 0;
|
||||
break;
|
||||
default:
|
||||
fprintf(stderr, "unknown flash command 0x%02x\n", command);
|
||||
abort();
|
||||
}
|
||||
}
|
||||
|
||||
static void handle_address(tc58128_dev * dev, uint8_t data)
|
||||
{
|
||||
switch (dev->state) {
|
||||
case READ1:
|
||||
case READ2:
|
||||
case READ3:
|
||||
switch (dev->address_cycle) {
|
||||
case 0:
|
||||
dev->address = data;
|
||||
if (dev->state == READ2)
|
||||
dev->address |= 0x100;
|
||||
else if (dev->state == READ3)
|
||||
dev->address |= 0x200;
|
||||
break;
|
||||
case 1:
|
||||
dev->address += data * 528 * 0x100;
|
||||
break;
|
||||
case 2:
|
||||
dev->address += data * 528;
|
||||
fprintf(stderr, "address pointer in flash: 0x%08x\n",
|
||||
dev->address);
|
||||
break;
|
||||
default:
|
||||
/* Invalid data */
|
||||
abort();
|
||||
}
|
||||
dev->address_cycle++;
|
||||
break;
|
||||
default:
|
||||
abort();
|
||||
}
|
||||
}
|
||||
|
||||
static uint8_t handle_read(tc58128_dev * dev)
|
||||
{
|
||||
#if 0
|
||||
if (dev->address % 0x100000 == 0)
|
||||
fprintf(stderr, "reading flash at address 0x%08x\n", dev->address);
|
||||
#endif
|
||||
return dev->flash_contents[dev->address++];
|
||||
}
|
||||
|
||||
/* We never mark the device as busy, so interrupts cannot be triggered
|
||||
XXXXX */
|
||||
|
||||
static int tc58128_cb(uint16_t porta, uint16_t portb,
|
||||
uint16_t * periph_pdtra, uint16_t * periph_portadir,
|
||||
uint16_t * periph_pdtrb, uint16_t * periph_portbdir)
|
||||
{
|
||||
int dev;
|
||||
|
||||
if ((porta & CE1) == 0)
|
||||
dev = 0;
|
||||
else if ((porta & CE2) == 0)
|
||||
dev = 1;
|
||||
else
|
||||
return 0; /* No device selected */
|
||||
|
||||
if ((porta & RE) && (porta & WE)) {
|
||||
/* Nothing to do, assert ready and return to input state */
|
||||
*periph_portadir &= 0xff00;
|
||||
*periph_portadir |= RDY(dev);
|
||||
*periph_pdtra |= RDY(dev);
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (porta & CLE) {
|
||||
/* Command */
|
||||
assert((porta & WE) == 0);
|
||||
handle_command(&tc58128_devs[dev], porta & 0x00ff);
|
||||
} else if (porta & ALE) {
|
||||
assert((porta & WE) == 0);
|
||||
handle_address(&tc58128_devs[dev], porta & 0x00ff);
|
||||
} else if ((porta & RE) == 0) {
|
||||
*periph_portadir |= 0x00ff;
|
||||
*periph_pdtra &= 0xff00;
|
||||
*periph_pdtra |= handle_read(&tc58128_devs[dev]);
|
||||
} else {
|
||||
abort();
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
static sh7750_io_device tc58128 = {
|
||||
RE | WE, /* Port A triggers */
|
||||
0, /* Port B triggers */
|
||||
tc58128_cb /* Callback */
|
||||
};
|
||||
|
||||
int tc58128_init(struct SH7750State *s, const char *zone1, const char *zone2)
|
||||
{
|
||||
if (!qtest_enabled()) {
|
||||
warn_report_once("The TC58128 flash device is deprecated");
|
||||
}
|
||||
init_dev(&tc58128_devs[0], zone1);
|
||||
init_dev(&tc58128_devs[1], zone2);
|
||||
return sh7750_register_io_device(s, &tc58128);
|
||||
}
|
||||
+1
-1
@@ -86,7 +86,7 @@ static void update_char_mask(AVRUsartState *usart)
|
||||
usart->char_mask = 0b11111111;
|
||||
break;
|
||||
default:
|
||||
assert(0);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
+68
-24
@@ -287,6 +287,7 @@ static void escc_reset_chn(ESCCChannelState *s)
|
||||
s->rxint = s->txint = 0;
|
||||
s->rxint_under_svc = s->txint_under_svc = 0;
|
||||
s->e0_mode = s->led_mode = s->caps_lock_mode = s->num_lock_mode = 0;
|
||||
s->sunmouse_dx = s->sunmouse_dy = s->sunmouse_buttons = 0;
|
||||
clear_queue(s);
|
||||
}
|
||||
|
||||
@@ -952,53 +953,96 @@ static void handle_kbd_command(ESCCChannelState *s, int val)
|
||||
}
|
||||
}
|
||||
|
||||
static void sunmouse_event(void *opaque,
|
||||
int dx, int dy, int dz, int buttons_state)
|
||||
static void sunmouse_handle_event(DeviceState *dev, QemuConsole *src,
|
||||
InputEvent *evt)
|
||||
{
|
||||
ESCCChannelState *s = opaque;
|
||||
ESCCChannelState *s = (ESCCChannelState *)dev;
|
||||
InputMoveEvent *move;
|
||||
InputBtnEvent *btn;
|
||||
static const int bmap[INPUT_BUTTON__MAX] = {
|
||||
[INPUT_BUTTON_LEFT] = 0x4,
|
||||
[INPUT_BUTTON_MIDDLE] = 0x2,
|
||||
[INPUT_BUTTON_RIGHT] = 0x1,
|
||||
};
|
||||
|
||||
switch (evt->type) {
|
||||
case INPUT_EVENT_KIND_REL:
|
||||
move = evt->u.rel.data;
|
||||
if (move->axis == INPUT_AXIS_X) {
|
||||
s->sunmouse_dx += move->value;
|
||||
} else if (move->axis == INPUT_AXIS_Y) {
|
||||
s->sunmouse_dy -= move->value;
|
||||
}
|
||||
break;
|
||||
|
||||
case INPUT_EVENT_KIND_BTN:
|
||||
btn = evt->u.btn.data;
|
||||
if (bmap[btn->button]) {
|
||||
if (btn->down) {
|
||||
s->sunmouse_buttons |= bmap[btn->button];
|
||||
} else {
|
||||
s->sunmouse_buttons &= ~bmap[btn->button];
|
||||
}
|
||||
/* Indicate we have a supported button event */
|
||||
s->sunmouse_buttons |= 0x80;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
/* keep gcc happy */
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void sunmouse_sync(DeviceState *dev)
|
||||
{
|
||||
ESCCChannelState *s = (ESCCChannelState *)dev;
|
||||
int ch;
|
||||
|
||||
trace_escc_sunmouse_event(dx, dy, buttons_state);
|
||||
if (s->sunmouse_dx == 0 && s->sunmouse_dy == 0 &&
|
||||
(s->sunmouse_buttons & 0x80) == 0) {
|
||||
/* Nothing to do after button event filter */
|
||||
return;
|
||||
}
|
||||
|
||||
/* Clear our button event flag */
|
||||
s->sunmouse_buttons &= ~0x80;
|
||||
trace_escc_sunmouse_event(s->sunmouse_dx, s->sunmouse_dy,
|
||||
s->sunmouse_buttons);
|
||||
ch = 0x80 | 0x7; /* protocol start byte, no buttons pressed */
|
||||
|
||||
if (buttons_state & MOUSE_EVENT_LBUTTON) {
|
||||
ch ^= 0x4;
|
||||
}
|
||||
if (buttons_state & MOUSE_EVENT_MBUTTON) {
|
||||
ch ^= 0x2;
|
||||
}
|
||||
if (buttons_state & MOUSE_EVENT_RBUTTON) {
|
||||
ch ^= 0x1;
|
||||
}
|
||||
|
||||
ch ^= s->sunmouse_buttons;
|
||||
put_queue(s, ch);
|
||||
|
||||
ch = dx;
|
||||
|
||||
ch = s->sunmouse_dx;
|
||||
if (ch > 127) {
|
||||
ch = 127;
|
||||
} else if (ch < -127) {
|
||||
ch = -127;
|
||||
}
|
||||
|
||||
put_queue(s, ch & 0xff);
|
||||
s->sunmouse_dx -= ch;
|
||||
|
||||
ch = -dy;
|
||||
|
||||
ch = s->sunmouse_dy;
|
||||
if (ch > 127) {
|
||||
ch = 127;
|
||||
} else if (ch < -127) {
|
||||
ch = -127;
|
||||
}
|
||||
|
||||
put_queue(s, ch & 0xff);
|
||||
s->sunmouse_dy -= ch;
|
||||
|
||||
/* MSC protocol specifies two extra motion bytes */
|
||||
|
||||
put_queue(s, 0);
|
||||
put_queue(s, 0);
|
||||
}
|
||||
|
||||
static const QemuInputHandler sunmouse_handler = {
|
||||
.name = "QEMU Sun Mouse",
|
||||
.mask = INPUT_EVENT_MASK_BTN | INPUT_EVENT_MASK_REL,
|
||||
.event = sunmouse_handle_event,
|
||||
.sync = sunmouse_sync,
|
||||
};
|
||||
|
||||
static void escc_init1(Object *obj)
|
||||
{
|
||||
ESCCState *s = ESCC(obj);
|
||||
@@ -1036,8 +1080,8 @@ static void escc_realize(DeviceState *dev, Error **errp)
|
||||
}
|
||||
|
||||
if (s->chn[0].type == escc_mouse) {
|
||||
qemu_add_mouse_event_handler(sunmouse_event, &s->chn[0], 0,
|
||||
"QEMU Sun Mouse");
|
||||
s->chn[0].hs = qemu_input_handler_register((DeviceState *)(&s->chn[0]),
|
||||
&sunmouse_handler);
|
||||
}
|
||||
if (s->chn[1].type == escc_kbd) {
|
||||
s->chn[1].hs = qemu_input_handler_register((DeviceState *)(&s->chn[1]),
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user