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target/loongarch: Fix [X]VLDI raising exception incorrectly

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According to the specification, [X]VLDI should trigger an invalid instruction
exception only when Bit[12] is 1 and Bit[11:8] > 12. This patch fixes an issue
where an exception was incorrectly raised even when Bit[12] was 0.

Test case:

```
    .global main
main:
    vldi    $vr0, 3328
    ret
```

Reported-by: Zhou Qiankang <wszqkzqk@qq.com>
Signed-off-by: WANG Rui <wangrui@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-ID: <20250804132212.4816-1-wangrui@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
This commit is contained in:
WANG Rui
2025-08-08 09:18:44 +08:00
committed by Song Gao
parent cd21ee5b27
commit e66644c48e
1 changed files with 3 additions and 3 deletions
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target/loongarch/tcg/insn_trans/trans_vec.c.inc
+3 -3
View File
@@ -3585,7 +3585,9 @@ static bool gen_vldi(DisasContext *ctx, arg_vldi *a, uint32_t oprsz)
int sel, vece;
uint64_t value;
if (!check_valid_vldi_mode(a)) {
sel = (a->imm >> 12) & 0x1;
if (sel && !check_valid_vldi_mode(a)) {
generate_exception(ctx, EXCCODE_INE);
return true;
}
@@ -3594,8 +3596,6 @@ static bool gen_vldi(DisasContext *ctx, arg_vldi *a, uint32_t oprsz)
return true;
}
sel = (a->imm >> 12) & 0x1;
if (sel) {
value = vldi_get_value(ctx, a->imm);
vece = MO_64;