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hw/pci-host: Add Astro system bus adapter found on PA-RISC machines

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The 64-bit PA-RISC machines use a Astro system bus adapter (SBA)
with Elroy PCI host chips.
Later generation Astro chips were named Pluto, Ike and REO.

Signed-off-by: Helge Deller <deller@gmx.de>
This commit is contained in:
Helge Deller
2023-10-20 00:47:38 +02:00
parent a1e6a5c462
commit e029bb00a7
3 changed files with 988 additions and 0 deletions
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hw/pci-host/astro.c
+885
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File diff suppressed because it is too large Load Diff
hw/pci-host/trace-events
+11
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@@ -46,3 +46,14 @@ pnv_phb4_xive_notify_abt(uint64_t notif_port, uint64_t data) "notif=@0x%"PRIx64"
dino_chip_mem_valid(uint64_t addr, uint32_t val) "access to addr 0x%"PRIx64" is %d"
dino_chip_read(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x"
dino_chip_write(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x"
# astro.c
astro_chip_mem_valid(uint64_t addr, uint32_t val) "access to addr 0x%"PRIx64" is %d"
astro_chip_read(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64
astro_chip_write(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64
elroy_read(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64
elroy_write(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64
elroy_pci_config_data_read(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64
elroy_pci_config_data_write(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64
iosapic_reg_write(uint64_t reg_select, int size, uint64_t val) "reg_select 0x%"PRIx64" size %d val 0x%"PRIx64
iosapic_reg_read(uint64_t reg_select, int size, uint64_t val) "reg_select 0x%"PRIx64" size %d val 0x%"PRIx64
include/hw/pci-host/astro.h
+92
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@@ -0,0 +1,92 @@
/*
* HP-PARISC Astro Bus connector with Elroy PCI host bridges
*/
#ifndef ASTRO_H
#define ASTRO_H
#include "hw/pci/pci_host.h"
#define ASTRO_HPA 0xfed00000
#define ROPES_PER_IOC 8 /* per Ike half or Pluto/Astro */
#define TYPE_ASTRO_CHIP "astro-chip"
OBJECT_DECLARE_SIMPLE_TYPE(AstroState, ASTRO_CHIP)
#define TYPE_ELROY_PCI_HOST_BRIDGE "elroy-pcihost"
OBJECT_DECLARE_SIMPLE_TYPE(ElroyState, ELROY_PCI_HOST_BRIDGE)
#define ELROY_NUM 4 /* # of Elroys */
#define ELROY_IRQS 8 /* IOSAPIC IRQs */
/* ASTRO Memory and I/O regions */
#define LMMIO_DIST_BASE_ADDR 0xf4000000ULL
#define LMMIO_DIST_BASE_SIZE 0x4000000ULL
#define IOS_DIST_BASE_ADDR 0xfffee00000ULL
#define IOS_DIST_BASE_SIZE 0x10000ULL
struct AstroState;
struct ElroyState {
PCIHostState parent_obj;
/* parent Astro device */
struct AstroState *astro;
/* HPA of this Elroy */
hwaddr hpa;
/* PCI bus number (Elroy number) */
unsigned int pci_bus_num;
uint64_t config_address;
uint64_t config_reg_elroy;
uint64_t status_control;
uint64_t arb_mask;
uint64_t mmio_base[(0x0250 - 0x200) / 8];
uint64_t error_config;
uint32_t iosapic_reg_select;
uint64_t iosapic_reg[0x20];
uint32_t ilr;
MemoryRegion this_mem;
MemoryRegion pci_mmio;
MemoryRegion pci_mmio_alias;
MemoryRegion pci_hole;
MemoryRegion pci_io;
};
struct AstroState {
PCIHostState parent_obj;
uint64_t ioc_ctrl;
uint64_t ioc_status_ctrl;
uint64_t ioc_ranges[(0x03d8 - 0x300) / 8];
uint64_t ioc_rope_config;
uint64_t ioc_status_control;
uint64_t ioc_flush_control;
uint64_t ioc_rope_control[8];
uint64_t tlb_ibase;
uint64_t tlb_imask;
uint64_t tlb_pcom;
uint64_t tlb_tcnfg;
uint64_t tlb_pdir_base;
struct ElroyState *elroy[ELROY_NUM];
MemoryRegion this_mem;
MemoryRegion pci_mmio;
MemoryRegion pci_io;
IOMMUMemoryRegion iommu;
AddressSpace iommu_as;
};
#endif