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Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

Browse Source 
* Bugfixes all over the place
* get/set_uint cleanups (Felipe)
* Lock guard support (Stefan)
* MemoryRegion ownership cleanup (Philippe)
* AVX512 optimization for buffer_is_zero (Robert)

# gpg: Signature made Tue 17 Mar 2020 15:01:54 GMT
# gpg:                using RSA key BFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream: (62 commits)
  hw/arm: Let devices own the MemoryRegion they create
  hw/arm: Remove unnecessary memory_region_set_readonly() on ROM alias
  hw/ppc/ppc405: Use memory_region_init_rom() with read-only regions
  hw/arm/stm32: Use memory_region_init_rom() with read-only regions
  hw/char: Let devices own the MemoryRegion they create
  hw/riscv: Let devices own the MemoryRegion they create
  hw/dma: Let devices own the MemoryRegion they create
  hw/display: Let devices own the MemoryRegion they create
  hw/core: Let devices own the MemoryRegion they create
  scripts/cocci: Patch to let devices own their MemoryRegions
  scripts/cocci: Patch to remove unnecessary memory_region_set_readonly()
  scripts/cocci: Patch to detect potential use of memory_region_init_rom
  hw/sparc: Use memory_region_init_rom() with read-only regions
  hw/sh4: Use memory_region_init_rom() with read-only regions
  hw/riscv: Use memory_region_init_rom() with read-only regions
  hw/ppc: Use memory_region_init_rom() with read-only regions
  hw/pci-host: Use memory_region_init_rom() with read-only regions
  hw/net: Use memory_region_init_rom() with read-only regions
  hw/m68k: Use memory_region_init_rom() with read-only regions
  hw/display: Use memory_region_init_rom() with read-only regions
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
2020-03-17 18:33:05 +00:00
parent cc818a2148 32b9523ad5
commit d649689a8e
116 changed files with 1166 additions and 772 deletions
Download Patch File Download Diff File Expand all files Collapse all files
MAINTAINERS
+12
View File
@@ -437,6 +437,17 @@ F: include/hw/block/dataplane/xen*
F: include/hw/xen/
F: include/sysemu/xen-mapcache.h
Guest CPU Cores (HAXM)
---------------------
X86 HAXM CPUs
M: Wenchao Wang <wenchao.wang@intel.com>
M: Colin Xu <colin.xu@intel.com>
L: haxm-team@intel.com
W: https://github.com/intel/haxm/issues
S: Maintained
F: include/sysemu/hax.h
F: target/i386/hax-*
Hosts
-----
LINUX
@@ -2040,6 +2051,7 @@ F: include/exec/ramblock.h
F: memory.c
F: include/exec/memory-internal.h
F: exec.c
F: scripts/coccinelle/memory-region-housekeeping.cocci
SPICE
M: Gerd Hoffmann <kraxel@redhat.com>
Makefile
+28 -21
View File
@@ -1235,50 +1235,57 @@ endif
include $(SRC_PATH)/tests/docker/Makefile.include
include $(SRC_PATH)/tests/vm/Makefile.include
print-help-run = printf " %-30s - %s\\n" "$1" "$2"
print-help = $(quiet-@)$(call print-help-run,$1,$2)
.PHONY: help
help:
@echo 'Generic targets:'
@echo ' all - Build all'
$(call print-help,all,Build all)
ifdef CONFIG_MODULES
@echo ' modules - Build all modules'
$(call print-help,modules,Build all modules)
endif
@echo ' dir/file.o - Build specified target only'
@echo ' install - Install QEMU, documentation and tools'
@echo ' ctags/TAGS - Generate tags file for editors'
@echo ' cscope - Generate cscope index'
$(call print-help,dir/file.o,Build specified target only)
$(call print-help,install,Install QEMU, documentation and tools)
$(call print-help,ctags/TAGS,Generate tags file for editors)
$(call print-help,cscope,Generate cscope index)
@echo ''
@$(if $(TARGET_DIRS), \
echo 'Architecture specific targets:'; \
$(foreach t, $(TARGET_DIRS), \
printf " %-30s - Build for %s\\n" $(t)/all $(t);) \
$(call print-help-run,$(t)/all,Build for $(t));) \
echo '')
@$(if $(TOOLS), \
echo 'Tools targets:'; \
$(foreach t, $(TOOLS), \
$(call print-help-run,$(t),Build $(shell basename $(t)) tool);) \
echo '')
@echo 'Cleaning targets:'
@echo ' clean - Remove most generated files but keep the config'
$(call print-help,clean,Remove most generated files but keep the config)
ifdef CONFIG_GCOV
@echo ' clean-coverage - Remove coverage files'
$(call print-help,clean-coverage,Remove coverage files)
endif
@echo ' distclean - Remove all generated files'
@echo ' dist - Build a distributable tarball'
$(call print-help,distclean,Remove all generated files)
$(call print-help,dist,Build a distributable tarball)
@echo ''
@echo 'Test targets:'
@echo ' check - Run all tests (check-help for details)'
@echo ' docker - Help about targets running tests inside containers'
@echo ' vm-help - Help about targets running tests inside VM'
$(call print-help,check,Run all tests (check-help for details))
$(call print-help,docker,Help about targets running tests inside containers)
$(call print-help,vm-help,Help about targets running tests inside VM)
@echo ''
@echo 'Documentation targets:'
@echo ' html info pdf txt'
@echo ' - Build documentation in specified format'
$(call print-help,html info pdf txt,Build documentation in specified format)
ifdef CONFIG_GCOV
@echo ' coverage-report - Create code coverage report'
$(call print-help,coverage-report,Create code coverage report)
endif
@echo ''
ifdef CONFIG_WIN32
@echo 'Windows targets:'
@echo ' installer - Build NSIS-based installer for QEMU'
$(call print-help,installer,Build NSIS-based installer for QEMU)
ifdef QEMU_GA_MSI_ENABLED
@echo ' msi - Build MSI-based installer for qemu-ga'
$(call print-help,msi,Build MSI-based installer for qemu-ga)
endif
@echo ''
endif
@echo ' $(MAKE) [targets] (quiet build, default)'
@echo ' $(MAKE) V=1 [targets] (verbose build)'
$(call print-help,$(MAKE) [targets],(quiet build, default))
$(call print-help,$(MAKE) V=1 [targets],(verbose build))
Makefile.target
+1 -1
View File
@@ -12,7 +12,7 @@ endif
$(call set-vpath, $(SRC_PATH):$(BUILD_DIR))
ifdef CONFIG_LINUX
QEMU_CFLAGS += -I../linux-headers
QEMU_CFLAGS += -isystem ../linux-headers
endif
QEMU_CFLAGS += -iquote .. -iquote $(SRC_PATH)/target/$(TARGET_BASE_ARCH) -DNEED_CPU_H
block/linux-aio.c
+1 -1
View File
@@ -121,7 +121,7 @@ struct aio_ring {
unsigned incompat_features;
unsigned header_length; /* size of aio_ring */
struct io_event io_events[0];
struct io_event io_events[];
};
/**
block/vmdk.c
+1 -1
View File
@@ -187,7 +187,7 @@ typedef struct VmdkMetaData {
typedef struct VmdkGrainMarker {
uint64_t lba;
uint32_t size;
uint8_t data[0];
uint8_t data[];
} QEMU_PACKED VmdkGrainMarker;
enum {
bsd-user/qemu.h
+1 -1
View File
@@ -95,7 +95,7 @@ typedef struct TaskState {
struct sigqueue *first_free; /* first free siginfo queue entry */
int signal_pending; /* non zero if a signal may be pending */
uint8_t stack[0];
uint8_t stack[];
} __attribute__((aligned(16))) TaskState;
void init_task_state(TaskState *ts);
configure
Vendored
+60 -2
View File
@@ -405,6 +405,7 @@ EXESUF=""
DSOSUF=".so"
LDFLAGS_SHARED="-shared"
modules="no"
module_upgrades="no"
prefix="/usr/local"
mandir="\${prefix}/share/man"
datadir="\${prefix}/share"
@@ -899,7 +900,7 @@ Linux)
linux="yes"
linux_user="yes"
kvm="yes"
QEMU_INCLUDES="-I\$(SRC_PATH)/linux-headers -I$PWD/linux-headers $QEMU_INCLUDES"
QEMU_INCLUDES="-isystem \$(SRC_PATH)/linux-headers -isystem $PWD/linux-headers $QEMU_INCLUDES"
supported_os="yes"
libudev="yes"
;;
@@ -1032,6 +1033,10 @@ for opt do
--disable-modules)
modules="no"
;;
--disable-module-upgrades) module_upgrades="no"
;;
--enable-module-upgrades) module_upgrades="yes"
;;
--cpu=*)
;;
--target-list=*) target_list="$optarg"
@@ -1421,6 +1426,11 @@ for opt do
;;
--enable-avx2) avx2_opt="yes"
;;
--disable-avx512f) avx512f_opt="no"
;;
--enable-avx512f) avx512f_opt="yes"
;;
--enable-glusterfs) glusterfs="yes"
;;
--disable-virtio-blk-data-plane|--enable-virtio-blk-data-plane)
@@ -1786,6 +1796,7 @@ disabled with --disable-FEATURE, default is enabled if available:
guest-agent-msi build guest agent Windows MSI installation package
pie Position Independent Executables
modules modules support (non-Windows)
module-upgrades try to load modules from alternate paths for upgrades
debug-tcg TCG debugging (default is disabled)
debug-info debugging information
sparse sparse checker
@@ -1857,6 +1868,7 @@ disabled with --disable-FEATURE, default is enabled if available:
tcmalloc tcmalloc support
jemalloc jemalloc support
avx2 AVX2 optimization support
avx512f AVX512F optimization support
replication replication support
opengl opengl support
virglrenderer virgl rendering support
@@ -2049,6 +2061,11 @@ if test "$modules" = "yes" && test "$mingw32" = "yes" ; then
error_exit "Modules are not available for Windows"
fi
# module_upgrades is only reasonable if modules are enabled
if test "$modules" = "no" && test "$module_upgrades" = "yes" ; then
error_exit "Can't enable module-upgrades as Modules are not enabled"
fi
# Static linking is not possible with modules or PIE
if test "$static" = "yes" ; then
if test "$modules" = "yes" ; then
@@ -3350,7 +3367,9 @@ if test "$vnc" = "yes" && test "$vnc_sasl" != "no" ; then
int main(void) { sasl_server_init(NULL, "qemu"); return 0; }
EOF
# Assuming Cyrus-SASL installed in /usr prefix
vnc_sasl_cflags=""
# QEMU defines struct iovec in "qemu/osdep.h",
# we don't want libsasl to redefine it in <sasl/sasl.h>.
vnc_sasl_cflags="-DSTRUCT_IOVEC_DEFINED"
vnc_sasl_libs="-lsasl2"
if compile_prog "$vnc_sasl_cflags" "$vnc_sasl_libs" ; then
vnc_sasl=yes
@@ -5574,6 +5593,36 @@ EOF
fi
fi
##########################################
# avx512f optimization requirement check
#
# There is no point enabling this if cpuid.h is not usable,
# since we won't be able to select the new routines.
# by default, it is turned off.
# if user explicitly want to enable it, check environment
if test "$cpuid_h" = "yes" && test "$avx512f_opt" = "yes"; then
cat > $TMPC << EOF
#pragma GCC push_options
#pragma GCC target("avx512f")
#include <cpuid.h>
#include <immintrin.h>
static int bar(void *a) {
__m512i x = *(__m512i *)a;
return _mm512_test_epi64_mask(x, x);
}
int main(int argc, char *argv[])
{
return bar(argv[0]);
}
EOF
if ! compile_object "" ; then
avx512f_opt="no"
fi
else
avx512f_opt="no"
fi
########################################
# check if __[u]int128_t is usable.
@@ -6590,6 +6639,7 @@ if test "$slirp" != "no" ; then
echo "smbd $smbd"
fi
echo "module support $modules"
echo "alt path mod load $module_upgrades"
echo "host CPU $cpu"
echo "host big endian $bigendian"
echo "target list $target_list"
@@ -6717,6 +6767,7 @@ echo "libxml2 $libxml2"
echo "tcmalloc support $tcmalloc"
echo "jemalloc support $jemalloc"
echo "avx2 optimization $avx2_opt"
echo "avx512f optimization $avx512f_opt"
echo "replication support $replication"
echo "VxHS block device $vxhs"
echo "bochs support $bochs"
@@ -6943,6 +6994,9 @@ if test "$modules" = "yes"; then
echo "CONFIG_STAMP=_$( (echo $qemu_version; echo $pkgversion; cat $0) | $shacmd - | cut -f1 -d\ )" >> $config_host_mak
echo "CONFIG_MODULES=y" >> $config_host_mak
fi
if test "$module_upgrades" = "yes"; then
echo "CONFIG_MODULE_UPGRADES=y" >> $config_host_mak
fi
if test "$have_x11" = "yes" && test "$need_x11" = "yes"; then
echo "CONFIG_X11=y" >> $config_host_mak
echo "X11_CFLAGS=$x11_cflags" >> $config_host_mak
@@ -7268,6 +7322,10 @@ if test "$avx2_opt" = "yes" ; then
echo "CONFIG_AVX2_OPT=y" >> $config_host_mak
fi
if test "$avx512f_opt" = "yes" ; then
echo "CONFIG_AVX512F_OPT=y" >> $config_host_mak
fi
if test "$lzo" = "yes" ; then
echo "CONFIG_LZO=y" >> $config_host_mak
fi
contrib/libvhost-user/libvhost-user.h
+1 -1
View File
@@ -286,7 +286,7 @@ typedef struct VuVirtqInflight {
uint16_t used_idx;
/* Used to track the state of each descriptor in descriptor table */
VuDescStateSplit desc[0];
VuDescStateSplit desc[];
} VuVirtqInflight;
typedef struct VuVirtqInflightDesc {
contrib/vhost-user-gpu/Makefile.objs
+3 -3
View File
@@ -1,7 +1,7 @@
vhost-user-gpu-obj-y = main.o virgl.o vugbm.o
vhost-user-gpu-obj-y = vhost-user-gpu.o virgl.o vugbm.o
main.o-cflags := $(PIXMAN_CFLAGS) $(GBM_CFLAGS)
main.o-libs := $(PIXMAN_LIBS)
vhost-user-gpu.o-cflags := $(PIXMAN_CFLAGS) $(GBM_CFLAGS)
vhost-user-gpu.o-libs := $(PIXMAN_LIBS)
virgl.o-cflags := $(VIRGL_CFLAGS) $(GBM_CFLAGS)
virgl.o-libs := $(VIRGL_LIBS)
contrib/vhost-user-gpu/main.c → contrib/vhost-user-gpu/vhost-user-gpu.c
View File
cpus.c
+5 -1
View File
@@ -1026,9 +1026,9 @@ static int do_vm_stop(RunState state, bool send_stop)
int ret = 0;
if (runstate_is_running()) {
runstate_set(state);
cpu_disable_ticks();
pause_all_vcpus();
runstate_set(state);
vm_state_notify(0, state);
if (send_stop) {
qapi_event_send_stop();
@@ -1899,6 +1899,10 @@ void resume_all_vcpus(void)
{
CPUState *cpu;
if (!runstate_is_running()) {
return;
}
qemu_clock_enable(QEMU_CLOCK_VIRTUAL, true);
CPU_FOREACH(cpu) {
cpu_resume(cpu);
docs/interop/vhost-user.rst
+2 -2
View File
@@ -568,7 +568,7 @@ For split virtqueue, queue region can be implemented as:
uint16_t used_idx;
/* Used to track the state of each descriptor in descriptor table */
DescStateSplit desc[0];
DescStateSplit desc[];
} QueueRegionSplit;
To track inflight I/O, the queue region should be processed as follows:
@@ -690,7 +690,7 @@ For packed virtqueue, queue region can be implemented as:
uint8_t padding[7];
/* Used to track the state of each descriptor fetched from descriptor ring */
DescStatePacked desc[0];
DescStatePacked desc[];
} QueueRegionPacked;
To track inflight I/O, the queue region should be processed as follows:
docs/system/cpu-models-x86.rst.inc
+55 -2
View File
@@ -49,10 +49,15 @@ mixture of host CPU models between machines, if live migration
compatibility is required, use the newest CPU model that is compatible
across all desired hosts.
``Skylake-Server``, ``Skylake-Server-IBRS``
``Cascadelake-Server``, ``Cascadelake-Server-noTSX``
Intel Xeon Processor (Cascade Lake, 2019), with "stepping" levels 6
or 7 only. (The Cascade Lake Xeon processor with *stepping 5 is
vulnerable to MDS variants*.)
``Skylake-Server``, ``Skylake-Server-IBRS``, ``Skylake-Server-IBRS-noTSX``
Intel Xeon Processor (Skylake, 2016)
``Skylake-Client``, ``Skylake-Client-IBRS``
``Skylake-Client``, ``Skylake-Client-IBRS``, ``Skylake-Client-noTSX-IBRS}``
Intel Core Processor (Skylake, 2015)
``Broadwell``, ``Broadwell-IBRS``, ``Broadwell-noTSX``, ``Broadwell-noTSX-IBRS``
@@ -148,6 +153,54 @@ features are included if using "Host passthrough" or "Host model".
Requires the host CPU microcode to support this feature before it
can be used for guest CPUs.
``mds-no``
Recommended to inform the guest OS that the host is *not* vulnerable
to any of the MDS variants ([MFBDS] CVE-2018-12130, [MLPDS]
CVE-2018-12127, [MSBDS] CVE-2018-12126).
This is an MSR (Model-Specific Register) feature rather than a CPUID feature,
so it will not appear in the Linux ``/proc/cpuinfo`` in the host or
guest. Instead, the host kernel uses it to populate the MDS
vulnerability file in ``sysfs``.
So it should only be enabled for VMs if the host reports @code{Not
affected} in the ``/sys/devices/system/cpu/vulnerabilities/mds`` file.
``taa-no``
Recommended to inform that the guest that the host is ``not``
vulnerable to CVE-2019-11135, TSX Asynchronous Abort (TAA).
This too is an MSR feature, so it does not show up in the Linux
``/proc/cpuinfo`` in the host or guest.
It should only be enabled for VMs if the host reports ``Not affected``
in the ``/sys/devices/system/cpu/vulnerabilities/tsx_async_abort``
file.
``tsx-ctrl``
Recommended to inform the guest that it can disable the Intel TSX
(Transactional Synchronization Extensions) feature; or, if the
processor is vulnerable, use the Intel VERW instruction (a
processor-level instruction that performs checks on memory access) as
a mitigation for the TAA vulnerability. (For details, refer to
Intel's `deep dive into MDS
<https://software.intel.com/security-software-guidance/insights/deep-dive-intel-analysis-microarchitectural-data-sampling>`_.)
Expose this to the guest OS if and only if: (a) the host has TSX
enabled; *and* (b) the guest has ``rtm`` CPU flag enabled.
By disabling TSX, KVM-based guests can avoid paying the price of
mitigating TSX-based attacks.
Note that ``tsx-ctrl`` too is an MSR feature, so it does not show
up in the Linux ``/proc/cpuinfo`` in the host or guest.
To validate that Intel TSX is indeed disabled for the guest, there are
two ways: (a) check for the *absence* of ``rtm`` in the guest's
``/proc/cpuinfo``; or (b) the
``/sys/devices/system/cpu/vulnerabilities/tsx_async_abort`` file in
the guest should report ``Mitigation: TSX disabled``.
Preferred CPU models for AMD x86 hosts
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
exec.c
+5 -4
View File
@@ -1315,7 +1315,7 @@ bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start,
unsigned client)
{
DirtyMemoryBlocks *blocks;
unsigned long end, page;
unsigned long end, page, start_page;
bool dirty = false;
RAMBlock *ramblock;
uint64_t mr_offset, mr_size;
@@ -1325,7 +1325,8 @@ bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start,
}
end = TARGET_PAGE_ALIGN(start + length) >> TARGET_PAGE_BITS;
page = start >> TARGET_PAGE_BITS;
start_page = start >> TARGET_PAGE_BITS;
page = start_page;
WITH_RCU_READ_LOCK_GUARD() {
blocks = atomic_rcu_read(&ram_list.dirty_memory[client]);
@@ -1345,8 +1346,8 @@ bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start,
page += num;
}
mr_offset = (ram_addr_t)(page << TARGET_PAGE_BITS) - ramblock->offset;
mr_size = (end - page) << TARGET_PAGE_BITS;
mr_offset = (ram_addr_t)(start_page << TARGET_PAGE_BITS) - ramblock->offset;
mr_size = (end - start_page) << TARGET_PAGE_BITS;
memory_region_clear_dirty_bitmap(ramblock->mr, mr_offset, mr_size);
}
hw/acpi/ich9.c
+10 -89
View File
@@ -357,81 +357,6 @@ static void ich9_pm_set_cpu_hotplug_legacy(Object *obj, bool value,
s->pm.cpu_hotplug_legacy = value;
}
static void ich9_pm_get_disable_s3(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
ICH9LPCPMRegs *pm = opaque;
uint8_t value = pm->disable_s3;
visit_type_uint8(v, name, &value, errp);
}
static void ich9_pm_set_disable_s3(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
ICH9LPCPMRegs *pm = opaque;
Error *local_err = NULL;
uint8_t value;
visit_type_uint8(v, name, &value, &local_err);
if (local_err) {
goto out;
}
pm->disable_s3 = value;
out:
error_propagate(errp, local_err);
}
static void ich9_pm_get_disable_s4(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
ICH9LPCPMRegs *pm = opaque;
uint8_t value = pm->disable_s4;
visit_type_uint8(v, name, &value, errp);
}
static void ich9_pm_set_disable_s4(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
ICH9LPCPMRegs *pm = opaque;
Error *local_err = NULL;
uint8_t value;
visit_type_uint8(v, name, &value, &local_err);
if (local_err) {
goto out;
}
pm->disable_s4 = value;
out:
error_propagate(errp, local_err);
}
static void ich9_pm_get_s4_val(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
ICH9LPCPMRegs *pm = opaque;
uint8_t value = pm->s4_val;
visit_type_uint8(v, name, &value, errp);
}
static void ich9_pm_set_s4_val(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
ICH9LPCPMRegs *pm = opaque;
Error *local_err = NULL;
uint8_t value;
visit_type_uint8(v, name, &value, &local_err);
if (local_err) {
goto out;
}
pm->s4_val = value;
out:
error_propagate(errp, local_err);
}
static bool ich9_pm_get_enable_tco(Object *obj, Error **errp)
{
ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
@@ -454,12 +379,12 @@ void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp)
pm->s4_val = 2;
object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
&pm->pm_io_base, errp);
&pm->pm_io_base, OBJ_PROP_FLAG_READ, errp);
object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32",
ich9_pm_get_gpe0_blk,
NULL, NULL, pm, NULL);
object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN,
&gpe0_len, errp);
&gpe0_len, OBJ_PROP_FLAG_READ, errp);
object_property_add_bool(obj, "memory-hotplug-support",
ich9_pm_get_memory_hotplug_support,
ich9_pm_set_memory_hotplug_support,
@@ -468,18 +393,14 @@ void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp)
ich9_pm_get_cpu_hotplug_legacy,
ich9_pm_set_cpu_hotplug_legacy,
NULL);
object_property_add(obj, ACPI_PM_PROP_S3_DISABLED, "uint8",
ich9_pm_get_disable_s3,
ich9_pm_set_disable_s3,
NULL, pm, NULL);
object_property_add(obj, ACPI_PM_PROP_S4_DISABLED, "uint8",
ich9_pm_get_disable_s4,
ich9_pm_set_disable_s4,
NULL, pm, NULL);
object_property_add(obj, ACPI_PM_PROP_S4_VAL, "uint8",
ich9_pm_get_s4_val,
ich9_pm_set_s4_val,
NULL, pm, NULL);
object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S3_DISABLED,
&pm->disable_s3, OBJ_PROP_FLAG_READWRITE,
NULL);
object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_DISABLED,
&pm->disable_s4, OBJ_PROP_FLAG_READWRITE,
NULL);
object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_VAL,
&pm->s4_val, OBJ_PROP_FLAG_READWRITE, NULL);
object_property_add_bool(obj, ACPI_PM_PROP_TCO_ENABLED,
ich9_pm_get_enable_tco,
ich9_pm_set_enable_tco,
hw/acpi/nvdimm.c
+3 -3
View File
@@ -485,7 +485,7 @@ struct NvdimmFuncGetLabelDataOut {
/* the size of buffer filled by QEMU. */
uint32_t len;
uint32_t func_ret_status; /* return status code. */
uint8_t out_buf[0]; /* the data got via Get Namesapce Label function. */
uint8_t out_buf[]; /* the data got via Get Namesapce Label function. */
} QEMU_PACKED;
typedef struct NvdimmFuncGetLabelDataOut NvdimmFuncGetLabelDataOut;
QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncGetLabelDataOut) > NVDIMM_DSM_MEMORY_SIZE);
@@ -493,7 +493,7 @@ QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncGetLabelDataOut) > NVDIMM_DSM_MEMORY_SIZE);
struct NvdimmFuncSetLabelDataIn {
uint32_t offset; /* the offset in the namespace label data area. */
uint32_t length; /* the size of data is to be written via the function. */
uint8_t in_buf[0]; /* the data written to label data area. */
uint8_t in_buf[]; /* the data written to label data area. */
} QEMU_PACKED;
typedef struct NvdimmFuncSetLabelDataIn NvdimmFuncSetLabelDataIn;
QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncSetLabelDataIn) +
@@ -510,7 +510,7 @@ struct NvdimmFuncReadFITOut {
/* the size of buffer filled by QEMU. */
uint32_t len;
uint32_t func_ret_status; /* return status code. */
uint8_t fit[0]; /* the FIT data. */
uint8_t fit[]; /* the FIT data. */
} QEMU_PACKED;
typedef struct NvdimmFuncReadFITOut NvdimmFuncReadFITOut;
QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncReadFITOut) > NVDIMM_DSM_MEMORY_SIZE);
hw/acpi/pcihp.c
+4 -3
View File
@@ -80,7 +80,8 @@ static void *acpi_set_bsel(PCIBus *bus, void *opaque)
*bus_bsel = (*bsel_alloc)++;
object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
bus_bsel, &error_abort);
bus_bsel, OBJ_PROP_FLAG_READ,
&error_abort);
}
return bsel_alloc;
@@ -373,9 +374,9 @@ void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus,
memory_region_add_subregion(address_space_io, s->io_base, &s->io);
object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_BASE_PROP, &s->io_base,
&error_abort);
OBJ_PROP_FLAG_READ, &error_abort);
object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_LEN_PROP, &s->io_len,
&error_abort);
OBJ_PROP_FLAG_READ, &error_abort);
}
const VMStateDescription vmstate_acpi_pcihp_pci_status = {
hw/acpi/piix4.c
+6 -6
View File
@@ -444,17 +444,17 @@ static void piix4_pm_add_propeties(PIIX4PMState *s)
static const uint16_t sci_int = 9;
object_property_add_uint8_ptr(OBJECT(s), ACPI_PM_PROP_ACPI_ENABLE_CMD,
&acpi_enable_cmd, NULL);
&acpi_enable_cmd, OBJ_PROP_FLAG_READ, NULL);
object_property_add_uint8_ptr(OBJECT(s), ACPI_PM_PROP_ACPI_DISABLE_CMD,
&acpi_disable_cmd, NULL);
&acpi_disable_cmd, OBJ_PROP_FLAG_READ, NULL);
object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_GPE0_BLK,
&gpe0_blk, NULL);
&gpe0_blk, OBJ_PROP_FLAG_READ, NULL);
object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_GPE0_BLK_LEN,
&gpe0_blk_len, NULL);
&gpe0_blk_len, OBJ_PROP_FLAG_READ, NULL);
object_property_add_uint16_ptr(OBJECT(s), ACPI_PM_PROP_SCI_INT,
&sci_int, NULL);
&sci_int, OBJ_PROP_FLAG_READ, NULL);
object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_PM_IO_BASE,
&s->io_base, NULL);
&s->io_base, OBJ_PROP_FLAG_READ, NULL);
}
static void piix4_pm_realize(PCIDevice *dev, Error **errp)
hw/arm/exynos4210.c
+6 -8
View File
@@ -305,23 +305,21 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp)
/*** Memory ***/
/* Chip-ID and OMR */
memory_region_init_io(&s->chipid_mem, NULL, &exynos4210_chipid_and_omr_ops,
NULL, "exynos4210.chipid", sizeof(chipid_and_omr));
memory_region_init_io(&s->chipid_mem, OBJECT(socdev),
&exynos4210_chipid_and_omr_ops, NULL,
"exynos4210.chipid", sizeof(chipid_and_omr));
memory_region_add_subregion(system_mem, EXYNOS4210_CHIPID_ADDR,
&s->chipid_mem);
/* Internal ROM */
memory_region_init_ram(&s->irom_mem, NULL, "exynos4210.irom",
memory_region_init_rom(&s->irom_mem, OBJECT(socdev), "exynos4210.irom",
EXYNOS4210_IROM_SIZE, &error_fatal);
memory_region_set_readonly(&s->irom_mem, true);
memory_region_add_subregion(system_mem, EXYNOS4210_IROM_BASE_ADDR,
&s->irom_mem);
/* mirror of iROM */
memory_region_init_alias(&s->irom_alias_mem, NULL, "exynos4210.irom_alias",
&s->irom_mem,
0,
memory_region_init_alias(&s->irom_alias_mem, OBJECT(socdev),
"exynos4210.irom_alias", &s->irom_mem, 0,
EXYNOS4210_IROM_SIZE);
memory_region_set_readonly(&s->irom_alias_mem, true);
memory_region_add_subregion(system_mem, EXYNOS4210_IROM_MIRROR_BASE_ADDR,
&s->irom_alias_mem);
hw/arm/fsl-imx25.c
+5 -5
View File
@@ -303,16 +303,16 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
}
/* initialize 2 x 16 KB ROM */
memory_region_init_rom(&s->rom[0], NULL,
"imx25.rom0", FSL_IMX25_ROM0_SIZE, &err);
memory_region_init_rom(&s->rom[0], OBJECT(dev), "imx25.rom0",
FSL_IMX25_ROM0_SIZE, &err);
if (err) {
error_propagate(errp, err);
return;
}
memory_region_add_subregion(get_system_memory(), FSL_IMX25_ROM0_ADDR,
&s->rom[0]);
memory_region_init_rom(&s->rom[1], NULL,
"imx25.rom1", FSL_IMX25_ROM1_SIZE, &err);
memory_region_init_rom(&s->rom[1], OBJECT(dev), "imx25.rom1",
FSL_IMX25_ROM1_SIZE, &err);
if (err) {
error_propagate(errp, err);
return;
@@ -331,7 +331,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
&s->iram);
/* internal RAM (128 KB) is aliased over 128 MB - 128 KB */
memory_region_init_alias(&s->iram_alias, NULL, "imx25.iram_alias",
memory_region_init_alias(&s->iram_alias, OBJECT(dev), "imx25.iram_alias",
&s->iram, 0, FSL_IMX25_IRAM_ALIAS_SIZE);
memory_region_add_subregion(get_system_memory(), FSL_IMX25_IRAM_ALIAS_ADDR,
&s->iram_alias);

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