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hw/arm/xlnx-versal: ocm: refactor creation
Refactor the OCM creation using the VersalMap structure. Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-28-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
committed by
Peter Maydell
parent
805bdea08a
commit
cf8f12b6e7
+16
-4
@@ -73,6 +73,11 @@ typedef struct VersalSimplePeriphMap {
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int irq;
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} VersalSimplePeriphMap;
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typedef struct VersalMemMap {
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uint64_t addr;
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uint64_t size;
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} VersalMemMap;
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typedef struct VersalGicMap {
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int version;
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uint64_t dist;
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@@ -108,6 +113,8 @@ typedef struct VersalCpuClusterMap {
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} VersalCpuClusterMap;
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typedef struct VersalMap {
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VersalMemMap ocm;
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VersalCpuClusterMap apu;
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VersalCpuClusterMap rpu;
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@@ -207,6 +214,11 @@ typedef struct VersalMap {
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} VersalMap;
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static const VersalMap VERSAL_MAP = {
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.ocm = {
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.addr = 0xfffc0000,
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.size = 0x40000,
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},
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.apu = {
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.name = "apu",
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.cpu_model = ARM_CPU_TYPE_NAME("cortex-a72"),
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@@ -1608,6 +1620,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
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{
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Versal *s = XLNX_VERSAL_BASE(dev);
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DeviceState *slcr, *ospi;
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MemoryRegion *ocm;
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Object *container;
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const VersalMap *map = versal_get_map(s);
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size_t i;
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@@ -1683,10 +1696,9 @@ static void versal_realize(DeviceState *dev, Error **errp)
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versal_unimp(s);
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/* Create the On Chip Memory (OCM). */
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memory_region_init_ram(&s->lpd.mr_ocm, OBJECT(s), "ocm",
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MM_OCM_SIZE, &error_fatal);
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memory_region_add_subregion_overlap(&s->mr_ps, MM_OCM, &s->lpd.mr_ocm, 0);
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ocm = g_new(MemoryRegion, 1);
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memory_region_init_ram(ocm, OBJECT(s), "ocm", map->ocm.size, &error_fatal);
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memory_region_add_subregion_overlap(&s->mr_ps, map->ocm.addr, ocm, 0);
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}
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DeviceState *versal_get_boot_cpu(Versal *s)
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@@ -48,10 +48,6 @@ struct Versal {
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MemoryRegion mr_ddr_ranges[4];
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} noc;
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struct {
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MemoryRegion mr_ocm;
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} lpd;
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struct {
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uint32_t clk_25mhz;
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uint32_t clk_125mhz;
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