hw/arm/xlnx-versal: ocm: refactor creation

Refactor the OCM creation using the VersalMap structure.

Signed-off-by: Luc Michel <luc.michel@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250926070806.292065-28-luc.michel@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Luc Michel
2025-10-07 10:35:36 +01:00
committed by Peter Maydell
parent 805bdea08a
commit cf8f12b6e7
2 changed files with 16 additions and 8 deletions
+16 -4
View File
@@ -73,6 +73,11 @@ typedef struct VersalSimplePeriphMap {
int irq;
} VersalSimplePeriphMap;
typedef struct VersalMemMap {
uint64_t addr;
uint64_t size;
} VersalMemMap;
typedef struct VersalGicMap {
int version;
uint64_t dist;
@@ -108,6 +113,8 @@ typedef struct VersalCpuClusterMap {
} VersalCpuClusterMap;
typedef struct VersalMap {
VersalMemMap ocm;
VersalCpuClusterMap apu;
VersalCpuClusterMap rpu;
@@ -207,6 +214,11 @@ typedef struct VersalMap {
} VersalMap;
static const VersalMap VERSAL_MAP = {
.ocm = {
.addr = 0xfffc0000,
.size = 0x40000,
},
.apu = {
.name = "apu",
.cpu_model = ARM_CPU_TYPE_NAME("cortex-a72"),
@@ -1608,6 +1620,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
{
Versal *s = XLNX_VERSAL_BASE(dev);
DeviceState *slcr, *ospi;
MemoryRegion *ocm;
Object *container;
const VersalMap *map = versal_get_map(s);
size_t i;
@@ -1683,10 +1696,9 @@ static void versal_realize(DeviceState *dev, Error **errp)
versal_unimp(s);
/* Create the On Chip Memory (OCM). */
memory_region_init_ram(&s->lpd.mr_ocm, OBJECT(s), "ocm",
MM_OCM_SIZE, &error_fatal);
memory_region_add_subregion_overlap(&s->mr_ps, MM_OCM, &s->lpd.mr_ocm, 0);
ocm = g_new(MemoryRegion, 1);
memory_region_init_ram(ocm, OBJECT(s), "ocm", map->ocm.size, &error_fatal);
memory_region_add_subregion_overlap(&s->mr_ps, map->ocm.addr, ocm, 0);
}
DeviceState *versal_get_boot_cpu(Versal *s)
-4
View File
@@ -48,10 +48,6 @@ struct Versal {
MemoryRegion mr_ddr_ranges[4];
} noc;
struct {
MemoryRegion mr_ocm;
} lpd;
struct {
uint32_t clk_25mhz;
uint32_t clk_125mhz;