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hw/isa/piix4: Correct IRQRC[A:D] reset values

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IRQRC[A:D] registers reset value is 0x80. We were forcing
the MIPS Malta machine routing to be able to boot a Linux
kernel without any bootloader.
We now have these registers initialized in the Malta machine
write_bootloader(), so we can use the correct reset values.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20221027204720.33611-4-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé
2023-01-13 09:32:32 +01:00
parent 1953dfa80e
commit c12b1e67d5
1 changed files with 4 additions and 4 deletions
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hw/isa/piix4.c
+4 -4
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@@ -116,10 +116,10 @@ static void piix4_isa_reset(DeviceState *dev)
pci_conf[0x4c] = 0x4d;
pci_conf[0x4e] = 0x03;
pci_conf[0x4f] = 0x00;
pci_conf[0x60] = 0x0a; // PCI A -> IRQ 10
pci_conf[0x61] = 0x0a; // PCI B -> IRQ 10
pci_conf[0x62] = 0x0b; // PCI C -> IRQ 11
pci_conf[0x63] = 0x0b; // PCI D -> IRQ 11
pci_conf[0x60] = 0x80;
pci_conf[0x61] = 0x80;
pci_conf[0x62] = 0x80;
pci_conf[0x63] = 0x80;
pci_conf[0x69] = 0x02;
pci_conf[0x70] = 0x80;
pci_conf[0x76] = 0x0c;