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Merge remote-tracking branch 'remotes/xtensa/tags/20200407-xtensa' into staging

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target/xtensa fixes for 5.0:

- fix pasto in pfwait.r opcode name;
- fix memory leak with dynamically allocated xtensa_insnbufs in
  DisasContext.

# gpg: Signature made Wed 08 Apr 2020 00:58:05 BST
# gpg:                using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044
# gpg:                issuer "jcmvbkbc@gmail.com"
# gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown]
# gpg:                 aka "Max Filippov <max.filippov@cogentembedded.com>" [full]
# gpg:                 aka "Max Filippov <jcmvbkbc@gmail.com>" [full]
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB  17D8 51F9 CC91 F83F A044

* remotes/xtensa/tags/20200407-xtensa:
  target/xtensa: statically allocate xtensa_insnbufs in DisasContext
  target/xtensa: fix pasto in pfwait.r opcode name

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
2020-04-09 10:51:21 +01:00
parent f3bac27cc1 fde557ad25
commit bb2e2bfc07
3 changed files with 7 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files
target/xtensa/cpu.h
+3
View File
@@ -213,6 +213,9 @@ enum {
#define MEMCTL_IL0EN 0x1
#define MAX_INSN_LENGTH 64
#define MAX_INSNBUF_LENGTH \
((MAX_INSN_LENGTH + sizeof(xtensa_insnbuf_word) - 1) / \
sizeof(xtensa_insnbuf_word))
#define MAX_INSN_SLOTS 32
#define MAX_OPCODE_ARGS 16
#define MAX_NAREG 64
target/xtensa/helper.c
+1
View File
@@ -96,6 +96,7 @@ static void init_libisa(XtensaConfig *config)
config->isa = xtensa_isa_init(config->isa_internal, NULL, NULL);
assert(xtensa_isa_maxlength(config->isa) <= MAX_INSN_LENGTH);
assert(xtensa_insnbuf_size(config->isa) <= MAX_INSNBUF_LENGTH);
opcodes = xtensa_isa_num_opcodes(config->isa);
formats = xtensa_isa_num_formats(config->isa);
regfiles = xtensa_isa_num_regfiles(config->isa);
target/xtensa/translate.c
+3 -17
View File
@@ -72,8 +72,8 @@ struct DisasContext {
unsigned cpenable;
uint32_t op_flags;
xtensa_insnbuf insnbuf;
xtensa_insnbuf slotbuf;
xtensa_insnbuf_word insnbuf[MAX_INSNBUF_LENGTH];
xtensa_insnbuf_word slotbuf[MAX_INSNBUF_LENGTH];
};
static TCGv_i32 cpu_pc;
@@ -1173,16 +1173,6 @@ static void xtensa_tr_init_disas_context(DisasContextBase *dcbase,
dc->cwoe = tb_flags & XTENSA_TBFLAG_CWOE;
dc->callinc = ((tb_flags & XTENSA_TBFLAG_CALLINC_MASK) >>
XTENSA_TBFLAG_CALLINC_SHIFT);
/*
* FIXME: This will leak when a failed instruction load or similar
* event causes us to longjump out of the translation loop and
* hence not clean-up in xtensa_tr_tb_stop
*/
if (dc->config->isa) {
dc->insnbuf = xtensa_insnbuf_alloc(dc->config->isa);
dc->slotbuf = xtensa_insnbuf_alloc(dc->config->isa);
}
init_sar_tracker(dc);
}
@@ -1272,10 +1262,6 @@ static void xtensa_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
DisasContext *dc = container_of(dcbase, DisasContext, base);
reset_sar_tracker(dc);
if (dc->config->isa) {
xtensa_insnbuf_free(dc->config->isa, dc->insnbuf);
xtensa_insnbuf_free(dc->config->isa, dc->slotbuf);
}
if (dc->icount) {
tcg_temp_free(dc->next_icount);
}
@@ -3746,7 +3732,7 @@ static const XtensaOpcodeOps core_ops[] = {
.name = "pfwait.a",
.translate = translate_nop,
}, {
.name = "pfwait.o",
.name = "pfwait.r",
.translate = translate_nop,
}, {
.name = "pitlb",