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hw/arm/xlnx-zynqmp: move GIC_NUM_SPI_INTR define in header

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This define will be needed in a later patch in XlnxZynqMPState
structure, hence move it within xlnx-zynqmp header.

Add XLXN_ZYNQMP prefix as it's now public.

Signed-off-by: Clément Chigot <chigot@adacore.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Message-id: 20250930115718.437100-2-chigot@adacore.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Clément Chigot
2025-10-07 10:39:15 +01:00
committed by Peter Maydell
parent f1924af144
commit b94246a252
2 changed files with 6 additions and 6 deletions
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hw/arm/xlnx-zynqmp.c
+5 -6
View File
@@ -26,8 +26,6 @@
#include "target/arm/cpu-qom.h"
#include "target/arm/gtimer.h"
#define GIC_NUM_SPI_INTR 160
#define ARM_PHYS_TIMER_PPI 30
#define ARM_VIRT_TIMER_PPI 27
#define ARM_HYP_TIMER_PPI 26
@@ -206,7 +204,7 @@ static const XlnxZynqMPGICRegion xlnx_zynqmp_gic_regions[] = {
static inline int arm_gic_ppi_index(int cpu_nr, int ppi_index)
{
return GIC_NUM_SPI_INTR + cpu_nr * GIC_INTERNAL + ppi_index;
return XLNX_ZYNQMP_GIC_NUM_SPI_INTR + cpu_nr * GIC_INTERNAL + ppi_index;
}
static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s,
@@ -454,7 +452,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
int num_apus = MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
const char *boot_cpu = s->boot_cpu ? s->boot_cpu : "apu-cpu[0]";
ram_addr_t ddr_low_size, ddr_high_size;
qemu_irq gic_spi[GIC_NUM_SPI_INTR];
qemu_irq gic_spi[XLNX_ZYNQMP_GIC_NUM_SPI_INTR];
Error *err = NULL;
ram_size = memory_region_size(s->ddr_ram);
@@ -502,7 +500,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
g_free(ocm_name);
}
qdev_prop_set_uint32(DEVICE(&s->gic), "num-irq", GIC_NUM_SPI_INTR + 32);
qdev_prop_set_uint32(DEVICE(&s->gic), "num-irq",
XLNX_ZYNQMP_GIC_NUM_SPI_INTR + 32);
qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 2);
qdev_prop_set_uint32(DEVICE(&s->gic), "num-cpu", num_apus);
qdev_prop_set_bit(DEVICE(&s->gic), "has-security-extensions", s->secure);
@@ -613,7 +612,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
return;
}
for (i = 0; i < GIC_NUM_SPI_INTR; i++) {
for (i = 0; i < XLNX_ZYNQMP_GIC_NUM_SPI_INTR; i++) {
gic_spi[i] = qdev_get_gpio_in(DEVICE(&s->gic), i);
}
include/hw/arm/xlnx-zynqmp.h
+1
View File
@@ -67,6 +67,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP)
#define XLNX_ZYNQMP_OCM_RAM_SIZE 0x10000
#define XLNX_ZYNQMP_GIC_REGIONS 6
#define XLNX_ZYNQMP_GIC_NUM_SPI_INTR 160
/*
* ZynqMP maps the ARM GIC regions (GICC, GICD ...) at consecutive 64k offsets