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Merge tag 'q800-for-8.1-pull-request' of https://github.com/vivier/qemu-m68k into staging

Browse Source 
Q800 branch pull request 20230622

Cleanup to introduce support of MacOS Classic

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# gpg: Signature made Thu 22 Jun 2023 09:55:06 AM CEST
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [undefined]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [undefined]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* tag 'q800-for-8.1-pull-request' of https://github.com/vivier/qemu-m68k: (24 commits)
  mac_via: fix rtc command decoding for the PRAM seconds registers
  mac_via: fix rtc command decoding from PRAM addresses 0x0 to 0xf
  q800: move macfb device to Q800MachineState
  q800: don't access Nubus bus directly from the mac-nubus-bridge device
  q800: move mac-nubus-bridge device to Q800MachineState
  q800: move SWIM device to Q800MachineState
  q800: move ESP device to Q800MachineState
  q800: move escc_orgate device to Q800MachineState
  q800: move ESCC device to Q800MachineState
  q800: move dp8393x device to Q800MachineState
  hw/net/dp8393x.c: move TYPE_DP8393X and dp8393xState into dp8393x.h
  q800: move VIA2 device to Q800MachineState
  q800: move VIA1 device to Q800MachineState
  q800: reimplement mac-io region aliasing using IO memory region
  q800: introduce mac-io container memory region
  q800: move GLUE device to Q800MachineState
  q800-glue.c: switch TypeInfo registration to use DEFINE_TYPES() macro
  q800: move GLUE device into separate q800-glue.c file
  q800: move ROM memory region to Q800MachineState
  q800: move CPU object into Q800MachineState
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
2023-06-22 10:18:32 +02:00
parent 67fe6ae41d 532009054b
commit b455ce4c2f
9 changed files with 635 additions and 366 deletions
Download Patch File Download Diff File Expand all files Collapse all files
MAINTAINERS
+3
View File
@@ -1225,6 +1225,7 @@ q800
M: Laurent Vivier <laurent@vivier.eu>
S: Maintained
F: hw/m68k/q800.c
F: hw/m68k/q800-glue.c
F: hw/misc/mac_via.c
F: hw/nubus/*
F: hw/display/macfb.c
@@ -1236,6 +1237,8 @@ F: include/hw/misc/mac_via.h
F: include/hw/nubus/*
F: include/hw/display/macfb.h
F: include/hw/block/swim.h
F: include/hw/m68k/q800.h
F: include/hw/m68k/q800-glue.h
virt
M: Laurent Vivier <laurent@vivier.eu>
hw/m68k/meson.build
+1 -1
View File
@@ -2,7 +2,7 @@ m68k_ss = ss.source_set()
m68k_ss.add(when: 'CONFIG_AN5206', if_true: files('an5206.c', 'mcf5206.c'))
m68k_ss.add(when: 'CONFIG_MCF5208', if_true: files('mcf5208.c', 'mcf_intc.c'))
m68k_ss.add(when: 'CONFIG_NEXTCUBE', if_true: files('next-kbd.c', 'next-cube.c'))
m68k_ss.add(when: 'CONFIG_Q800', if_true: files('q800.c'))
m68k_ss.add(when: 'CONFIG_Q800', if_true: files('q800.c', 'q800-glue.c'))
m68k_ss.add(when: 'CONFIG_M68K_VIRT', if_true: files('virt.c'))
hw_arch += {'m68k': m68k_ss}
hw/m68k/q800-glue.c
+249
View File
@@ -0,0 +1,249 @@
/*
* QEMU q800 logic GLUE (General Logic Unit)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
#include "cpu.h"
#include "hw/m68k/q800-glue.h"
#include "hw/boards.h"
#include "hw/irq.h"
#include "hw/nmi.h"
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
/*
* The GLUE (General Logic Unit) is an Apple custom integrated circuit chip
* that performs a variety of functions (RAM management, clock generation, ...).
* The GLUE chip receives interrupt requests from various devices,
* assign priority to each, and asserts one or more interrupt line to the
* CPU.
*/
/*
* The GLUE logic on the Quadra 800 supports 2 different IRQ routing modes
* controlled from the VIA1 auxmode GPIO (port B bit 6) which are documented
* in NetBSD as follows:
*
* A/UX mode (Linux, NetBSD, auxmode GPIO low)
*
* Level 0: Spurious: ignored
* Level 1: Software
* Level 2: VIA2 (except ethernet, sound)
* Level 3: Ethernet
* Level 4: Serial (SCC)
* Level 5: Sound
* Level 6: VIA1
* Level 7: NMIs: parity errors, RESET button, YANCC error
*
* Classic mode (default: used by MacOS, A/UX 3.0.1, auxmode GPIO high)
*
* Level 0: Spurious: ignored
* Level 1: VIA1 (clock, ADB)
* Level 2: VIA2 (NuBus, SCSI)
* Level 3:
* Level 4: Serial (SCC)
* Level 5:
* Level 6:
* Level 7: Non-maskable: parity errors, RESET button
*
* Note that despite references to A/UX mode in Linux and NetBSD, at least
* A/UX 3.0.1 still uses Classic mode.
*/
static void GLUE_set_irq(void *opaque, int irq, int level)
{
GLUEState *s = opaque;
int i;
if (s->auxmode) {
/* Classic mode */
switch (irq) {
case GLUE_IRQ_IN_VIA1:
irq = 0;
break;
case GLUE_IRQ_IN_VIA2:
irq = 1;
break;
case GLUE_IRQ_IN_SONIC:
/* Route to VIA2 instead */
qemu_set_irq(s->irqs[GLUE_IRQ_NUBUS_9], level);
return;
case GLUE_IRQ_IN_ESCC:
irq = 3;
break;
case GLUE_IRQ_IN_NMI:
irq = 6;
break;
default:
g_assert_not_reached();
}
} else {
/* A/UX mode */
switch (irq) {
case GLUE_IRQ_IN_VIA1:
irq = 5;
break;
case GLUE_IRQ_IN_VIA2:
irq = 1;
break;
case GLUE_IRQ_IN_SONIC:
irq = 2;
break;
case GLUE_IRQ_IN_ESCC:
irq = 3;
break;
case GLUE_IRQ_IN_NMI:
irq = 6;
break;
default:
g_assert_not_reached();
}
}
if (level) {
s->ipr |= 1 << irq;
} else {
s->ipr &= ~(1 << irq);
}
for (i = 7; i >= 0; i--) {
if ((s->ipr >> i) & 1) {
m68k_set_irq_level(s->cpu, i + 1, i + 25);
return;
}
}
m68k_set_irq_level(s->cpu, 0, 0);
}
static void glue_auxmode_set_irq(void *opaque, int irq, int level)
{
GLUEState *s = GLUE(opaque);
s->auxmode = level;
}
static void glue_nmi(NMIState *n, int cpu_index, Error **errp)
{
GLUEState *s = GLUE(n);
/* Hold NMI active for 100ms */
GLUE_set_irq(s, GLUE_IRQ_IN_NMI, 1);
timer_mod(s->nmi_release, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + 100);
}
static void glue_nmi_release(void *opaque)
{
GLUEState *s = GLUE(opaque);
GLUE_set_irq(s, GLUE_IRQ_IN_NMI, 0);
}
static void glue_reset(DeviceState *dev)
{
GLUEState *s = GLUE(dev);
s->ipr = 0;
s->auxmode = 0;
timer_del(s->nmi_release);
}
static const VMStateDescription vmstate_glue = {
.name = "q800-glue",
.version_id = 0,
.minimum_version_id = 0,
.fields = (VMStateField[]) {
VMSTATE_UINT8(ipr, GLUEState),
VMSTATE_UINT8(auxmode, GLUEState),
VMSTATE_TIMER_PTR(nmi_release, GLUEState),
VMSTATE_END_OF_LIST(),
},
};
/*
* If the m68k CPU implemented its inbound irq lines as GPIO lines
* rather than via the m68k_set_irq_level() function we would not need
* this cpu link property and could instead provide outbound IRQ lines
* that the board could wire up to the CPU.
*/
static Property glue_properties[] = {
DEFINE_PROP_LINK("cpu", GLUEState, cpu, TYPE_M68K_CPU, M68kCPU *),
DEFINE_PROP_END_OF_LIST(),
};
static void glue_finalize(Object *obj)
{
GLUEState *s = GLUE(obj);
timer_free(s->nmi_release);
}
static void glue_init(Object *obj)
{
DeviceState *dev = DEVICE(obj);
GLUEState *s = GLUE(dev);
qdev_init_gpio_in(dev, GLUE_set_irq, 8);
qdev_init_gpio_in_named(dev, glue_auxmode_set_irq, "auxmode", 1);
qdev_init_gpio_out(dev, s->irqs, 1);
/* NMI release timer */
s->nmi_release = timer_new_ms(QEMU_CLOCK_VIRTUAL, glue_nmi_release, s);
}
static void glue_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
NMIClass *nc = NMI_CLASS(klass);
dc->vmsd = &vmstate_glue;
dc->reset = glue_reset;
device_class_set_props(dc, glue_properties);
nc->nmi_monitor_handler = glue_nmi;
}
static const TypeInfo glue_info_types[] = {
{
.name = TYPE_GLUE,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(GLUEState),
.instance_init = glue_init,
.instance_finalize = glue_finalize,
.class_init = glue_class_init,
.interfaces = (InterfaceInfo[]) {
{ TYPE_NMI },
{ }
},
},
};
DEFINE_TYPES(glue_info_types)
hw/m68k/q800.c
+198 -328
View File
File diff suppressed because it is too large Load Diff
hw/misc/mac_via.c
+7 -6
View File
@@ -362,10 +362,10 @@ static void pram_update(MOS6522Q800VIA1State *v1s)
*
* Command byte Register addressed by the command
*
* z0000001 Seconds register 0 (lowest-order byte)
* z0000101 Seconds register 1
* z0001001 Seconds register 2
* z0001101 Seconds register 3 (highest-order byte)
* z00x0001 Seconds register 0 (lowest-order byte)
* z00x0101 Seconds register 1
* z00x1001 Seconds register 2
* z00x1101 Seconds register 3 (highest-order byte)
* 00110001 Test register (write-only)
* 00110101 Write-Protect Register (write-only)
* z010aa01 RAM address 100aa ($10-$13) (first 20 bytes only)
@@ -373,6 +373,7 @@ static void pram_update(MOS6522Q800VIA1State *v1s)
* z0111aaa Extended memory designator and sector number
*
* For a read request, z=1, for a write z=0
* The letter x indicates don't care
* The letter a indicates bits whose value depend on what parameter
* RAM byte you want to address
*/
@@ -389,7 +390,7 @@ static int via1_rtc_compact_cmd(uint8_t value)
}
if ((value & 0x03) == 0x01) {
value >>= 2;
if ((value & 0x1c) == 0) {
if ((value & 0x18) == 0) {
/* seconds registers */
return read | (REG_0 + (value & 0x03));
} else if ((value == 0x0c) && !read) {
@@ -399,7 +400,7 @@ static int via1_rtc_compact_cmd(uint8_t value)
} else if ((value & 0x1c) == 0x08) {
/* RAM address 0x10 to 0x13 */
return read | (REG_PRAM_ADDR + 0x10 + (value & 0x03));
} else if ((value & 0x43) == 0x41) {
} else if ((value & 0x10) == 0x10) {
/* RAM address 0x00 to 0x0f */
return read | (REG_PRAM_ADDR + (value & 0x0f));
}
hw/net/dp8393x.c
+1 -31
View File
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
#include "hw/net/dp8393x.h"
#include "hw/sysbus.h"
#include "migration/vmstate.h"
#include "net/net.h"
@@ -85,7 +86,6 @@ static const char *reg_names[] = {
#define SONIC_MPT 0x2e
#define SONIC_MDT 0x2f
#define SONIC_DCR2 0x3f
#define SONIC_REG_COUNT 0x40
#define SONIC_CR_HTX 0x0001
#define SONIC_CR_TXP 0x0002
@@ -139,36 +139,6 @@ static const char *reg_names[] = {
#define SONIC_DESC_EOL 0x0001
#define SONIC_DESC_ADDR 0xFFFE
#define TYPE_DP8393X "dp8393x"
OBJECT_DECLARE_SIMPLE_TYPE(dp8393xState, DP8393X)
struct dp8393xState {
SysBusDevice parent_obj;
/* Hardware */
uint8_t it_shift;
bool big_endian;
bool last_rba_is_full;
qemu_irq irq;
int irq_level;
QEMUTimer *watchdog;
int64_t wt_last_update;
NICConf conf;
NICState *nic;
MemoryRegion mmio;
/* Registers */
uint16_t cam[16][3];
uint16_t regs[SONIC_REG_COUNT];
/* Temporaries */
uint8_t tx_buffer[0x10000];
int loopback_packet;
/* Memory access */
MemoryRegion *dma_mr;
AddressSpace as;
};
/*
* Accessor functions for values which are formed by
include/hw/m68k/q800-glue.h
+50
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@@ -0,0 +1,50 @@
/*
* QEMU q800 logic GLUE (General Logic Unit)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#ifndef HW_Q800_GLUE_H
#define HW_Q800_GLUE_H
#include "qemu/osdep.h"
#include "hw/sysbus.h"
#define TYPE_GLUE "q800-glue"
OBJECT_DECLARE_SIMPLE_TYPE(GLUEState, GLUE)
struct GLUEState {
SysBusDevice parent_obj;
M68kCPU *cpu;
uint8_t ipr;
uint8_t auxmode;
qemu_irq irqs[1];
QEMUTimer *nmi_release;
};
#define GLUE_IRQ_IN_VIA1 0
#define GLUE_IRQ_IN_VIA2 1
#define GLUE_IRQ_IN_SONIC 2
#define GLUE_IRQ_IN_ESCC 3
#define GLUE_IRQ_IN_NMI 4
#define GLUE_IRQ_NUBUS_9 0
#endif
include/hw/m68k/q800.h
+66
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@@ -0,0 +1,66 @@
/*
* QEMU Motorla 680x0 Macintosh hardware System Emulator
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#ifndef HW_Q800_H
#define HW_Q800_H
#include "hw/boards.h"
#include "qom/object.h"
#include "target/m68k/cpu-qom.h"
#include "exec/memory.h"
#include "hw/m68k/q800-glue.h"
#include "hw/misc/mac_via.h"
#include "hw/net/dp8393x.h"
#include "hw/char/escc.h"
#include "hw/or-irq.h"
#include "hw/scsi/esp.h"
#include "hw/block/swim.h"
#include "hw/nubus/mac-nubus-bridge.h"
#include "hw/display/macfb.h"
/*
* The main Q800 machine
*/
struct Q800MachineState {
MachineState parent_obj;
M68kCPU cpu;
MemoryRegion rom;
GLUEState glue;
MOS6522Q800VIA1State via1;
MOS6522Q800VIA2State via2;
dp8393xState dp8393x;
ESCCState escc;
OrIRQState escc_orgate;
SysBusESPState esp;
Swim swim;
MacNubusBridge mac_nubus_bridge;
MacfbNubusState macfb;
MemoryRegion macio;
MemoryRegion macio_alias;
};
#define TYPE_Q800_MACHINE MACHINE_TYPE_NAME("q800")
OBJECT_DECLARE_SIMPLE_TYPE(Q800MachineState, Q800_MACHINE)
#endif
include/hw/net/dp8393x.h
+60
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@@ -0,0 +1,60 @@
/*
* QEMU NS SONIC DP8393x netcard
*
* Copyright (c) 2008-2009 Herve Poussineau
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#ifndef HW_NET_DP8393X_H
#define HW_NET_DP8393X_H
#include "hw/sysbus.h"
#include "net/net.h"
#include "exec/memory.h"
#define SONIC_REG_COUNT 0x40
#define TYPE_DP8393X "dp8393x"
OBJECT_DECLARE_SIMPLE_TYPE(dp8393xState, DP8393X)
struct dp8393xState {
SysBusDevice parent_obj;
/* Hardware */
uint8_t it_shift;
bool big_endian;
bool last_rba_is_full;
qemu_irq irq;
int irq_level;
QEMUTimer *watchdog;
int64_t wt_last_update;
NICConf conf;
NICState *nic;
MemoryRegion mmio;
/* Registers */
uint16_t cam[16][3];
uint16_t regs[SONIC_REG_COUNT];
/* Temporaries */
uint8_t tx_buffer[0x10000];
int loopback_packet;
/* Memory access */
MemoryRegion *dma_mr;
AddressSpace as;
};
#endif