mirror of
https://github.com/izzy2lost/xemu.git
synced 2026-07-06 00:20:22 -07:00
Merge remote-tracking branch 'remotes/rth/tags/pull-hppa-20180131' into staging
Implement hppa-softmmu # gpg: Signature made Wed 31 Jan 2018 14:19:06 GMT # gpg: using RSA key 0x64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-hppa-20180131: (43 commits) target/hppa: Implement PROBE for system mode target/hppa: Fix 32-bit operand masks for 0E FCVT hw/hppa: Add MAINTAINERS entry pc-bios: Add hppa-firmware.img and git submodule hw/hppa: Implement DINO system board target/hppa: Enable MTTCG target/hppa: Implement STWA target/hppa: Implement a pause instruction target/hppa: Implement LDSID for system mode target/hppa: Fix comment target/hppa: Increase number of temp regs target/hppa: Only use EXCP_DTLB_MISS target/hppa: Implement B,GATE insn target/hppa: Add migration for the cpu target/hppa: Add system registers to gdbstub target/hppa: Optimize for flat addressing space target/hppa: Implement halt and reset instructions target/hppa: Implement SYNCDMA insn target/hppa: Implement LCI target/hppa: Implement LPA ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
@@ -40,3 +40,6 @@
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[submodule "capstone"]
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path = capstone
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url = git://git.qemu.org/capstone.git
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[submodule "roms/seabios-hppa"]
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path = roms/seabios-hppa
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url = git://github.com/hdeller/seabios-hppa.git
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@@ -133,6 +133,7 @@ HPPA (PA-RISC)
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M: Richard Henderson <rth@twiddle.net>
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S: Maintained
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F: target/hppa/
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F: hw/hppa/
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F: disas/hppa.c
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LM32
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@@ -661,7 +661,8 @@ s390-ccw.img s390-netboot.img \
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spapr-rtas.bin slof.bin skiboot.lid \
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palcode-clipper \
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u-boot.e500 \
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qemu_vga.ndrv
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qemu_vga.ndrv \
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hppa-firmware.img
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else
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BLOBS=
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endif
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@@ -156,6 +156,7 @@ trace-events-subdirs += hw/vfio
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trace-events-subdirs += hw/acpi
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trace-events-subdirs += hw/arm
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trace-events-subdirs += hw/alpha
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trace-events-subdirs += hw/hppa
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trace-events-subdirs += hw/xen
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trace-events-subdirs += hw/ide
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trace-events-subdirs += ui
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@@ -53,6 +53,8 @@ int graphic_depth = 32;
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#define QEMU_ARCH QEMU_ARCH_CRIS
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#elif defined(TARGET_I386)
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#define QEMU_ARCH QEMU_ARCH_I386
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#elif defined(TARGET_HPPA)
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#define QEMU_ARCH QEMU_ARCH_HPPA
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#elif defined(TARGET_M68K)
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#define QEMU_ARCH QEMU_ARCH_M68K
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#elif defined(TARGET_LM32)
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@@ -6555,6 +6555,7 @@ case "$target_name" in
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cris)
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;;
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hppa)
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mttcg="yes"
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;;
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lm32)
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;;
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@@ -0,0 +1,14 @@
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include pci.mak
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include usb.mak
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CONFIG_SERIAL=y
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CONFIG_SERIAL_ISA=y
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CONFIG_ISA_BUS=y
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CONFIG_I8259=y
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CONFIG_VIRTIO_PCI=$(CONFIG_PCI)
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CONFIG_VIRTIO=y
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CONFIG_E1000_PCI=y
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CONFIG_IDE_ISA=y
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CONFIG_IDE_CMD646=y
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# CONFIG_IDE_MMIO=y
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CONFIG_VIRTIO_VGA=y
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CONFIG_MC146818RTC=y
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@@ -0,0 +1 @@
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obj-y += machine.o pci.o dino.o
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+518
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,40 @@
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/* HPPA cores and system support chips. */
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#define FIRMWARE_START 0xf0000000
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#define FIRMWARE_END 0xf0800000
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#define DEVICE_HPA_LEN 0x00100000
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#define GSC_HPA 0xffc00000
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#define DINO_HPA 0xfff80000
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#define DINO_UART_HPA 0xfff83000
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#define DINO_UART_BASE 0xfff83800
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#define DINO_SCSI_HPA 0xfff8c000
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#define LASI_HPA 0xffd00000
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#define LASI_UART_HPA 0xffd05000
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#define LASI_SCSI_HPA 0xffd06000
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#define LASI_LAN_HPA 0xffd07000
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#define LASI_LPT_HPA 0xffd02000
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#define LASI_AUDIO_HPA 0xffd04000
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#define LASI_PS2KBD_HPA 0xffd08000
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#define LASI_PS2MOU_HPA 0xffd08100
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#define LASI_GFX_HPA 0xf8000000
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#define CPU_HPA 0xfff10000
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#define MEMORY_HPA 0xfffbf000
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#define PCI_HPA DINO_HPA /* PCI bus */
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#define IDE_HPA 0xf9000000 /* Boot disc controller */
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/* offsets to DINO HPA: */
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#define DINO_PCI_ADDR 0x064
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#define DINO_CONFIG_DATA 0x068
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#define DINO_IO_DATA 0x06c
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#define PORT_PCI_CMD (PCI_HPA + DINO_PCI_ADDR)
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#define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA)
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#define PORT_SERIAL1 (DINO_UART_HPA + 0x800)
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#define PORT_SERIAL2 (LASI_UART_HPA + 0x800)
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#define HPPA_MAX_CPUS 32 /* max. number of SMP CPUs */
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#define CPU_CLOCK_MHZ 250 /* emulate a 250 MHz CPU */
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@@ -0,0 +1,24 @@
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/* HPPA cores and system support chips. */
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#ifndef HW_HPPA_SYS_H
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#define HW_HPPA_SYS_H
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#include "target/hppa/cpu-qom.h"
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#include "hw/pci/pci.h"
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#include "hw/pci/pci_host.h"
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#include "hw/ide.h"
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#include "hw/i386/pc.h"
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#include "hw/irq.h"
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#include "hw/hppa/hppa_hardware.h"
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PCIBus *dino_init(MemoryRegion *, qemu_irq *, qemu_irq *);
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#define TYPE_DINO_PCI_HOST_BRIDGE "dino-pcihost"
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/* hppa_pci.c. */
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extern const MemoryRegionOps hppa_pci_ignore_ops;
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extern const MemoryRegionOps hppa_pci_conf1_ops;
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extern const MemoryRegionOps hppa_pci_iack_ops;
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#endif
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@@ -0,0 +1,283 @@
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/*
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* QEMU HPPA hardware system emulator.
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* Copyright 2018 Helge Deller <deller@gmx.de>
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "cpu.h"
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#include "hw/hw.h"
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#include "elf.h"
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#include "hw/loader.h"
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#include "hw/boards.h"
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#include "qemu/error-report.h"
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#include "sysemu/sysemu.h"
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#include "hw/timer/mc146818rtc.h"
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#include "hw/ide.h"
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#include "hw/timer/i8254.h"
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#include "hw/char/serial.h"
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#include "hw/hppa/hppa_sys.h"
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#include "qemu/cutils.h"
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#include "qapi/error.h"
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#define MAX_IDE_BUS 2
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static ISABus *hppa_isa_bus(void)
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{
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ISABus *isa_bus;
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qemu_irq *isa_irqs;
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MemoryRegion *isa_region;
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isa_region = g_new(MemoryRegion, 1);
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memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops,
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NULL, "isa-io", 0x800);
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memory_region_add_subregion(get_system_memory(), IDE_HPA,
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isa_region);
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isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region,
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&error_abort);
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isa_irqs = i8259_init(isa_bus,
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/* qemu_allocate_irq(dino_set_isa_irq, s, 0)); */
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NULL);
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isa_bus_irqs(isa_bus, isa_irqs);
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return isa_bus;
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}
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static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr)
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{
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addr &= (0x10000000 - 1);
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return addr;
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}
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static HPPACPU *cpu[HPPA_MAX_CPUS];
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static uint64_t firmware_entry;
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static void machine_hppa_init(MachineState *machine)
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{
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const char *kernel_filename = machine->kernel_filename;
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const char *kernel_cmdline = machine->kernel_cmdline;
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const char *initrd_filename = machine->initrd_filename;
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PCIBus *pci_bus;
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ISABus *isa_bus;
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qemu_irq rtc_irq, serial_irq;
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char *firmware_filename;
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uint64_t firmware_low, firmware_high;
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long size;
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uint64_t kernel_entry = 0, kernel_low, kernel_high;
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MemoryRegion *addr_space = get_system_memory();
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MemoryRegion *rom_region;
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MemoryRegion *ram_region;
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MemoryRegion *cpu_region;
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long i;
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ram_size = machine->ram_size;
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/* Create CPUs. */
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for (i = 0; i < smp_cpus; i++) {
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cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type));
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cpu_region = g_new(MemoryRegion, 1);
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memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops,
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cpu[i], g_strdup_printf("cpu%ld-io-eir", i), 4);
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memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000,
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cpu_region);
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}
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/* Limit main memory. */
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if (ram_size > FIRMWARE_START) {
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machine->ram_size = ram_size = FIRMWARE_START;
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}
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/* Main memory region. */
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ram_region = g_new(MemoryRegion, 1);
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memory_region_allocate_system_memory(ram_region, OBJECT(machine),
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"ram", ram_size);
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memory_region_add_subregion(addr_space, 0, ram_region);
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/* Init Dino (PCI host bus chip). */
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pci_bus = dino_init(addr_space, &rtc_irq, &serial_irq);
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assert(pci_bus);
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/* Create ISA bus. */
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isa_bus = hppa_isa_bus();
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assert(isa_bus);
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/* Realtime clock, used by firmware for PDC_TOD call. */
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mc146818_rtc_init(isa_bus, 2000, rtc_irq);
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/* Serial code setup. */
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if (serial_hds[0]) {
|
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uint32_t addr = DINO_UART_HPA + 0x800;
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serial_mm_init(addr_space, addr, 0, serial_irq,
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115200, serial_hds[0], DEVICE_BIG_ENDIAN);
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fprintf(stderr, "Serial port created at 0x%x\n", addr);
|
||||
}
|
||||
|
||||
/* SCSI disk setup. */
|
||||
lsi53c895a_create(pci_bus);
|
||||
|
||||
/* Network setup. e1000 is good enough, failing Tulip support. */
|
||||
for (i = 0; i < nb_nics; i++) {
|
||||
pci_nic_init_nofail(&nd_table[i], pci_bus, "e1000", NULL);
|
||||
}
|
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|
||||
/* Load firmware. Given that this is not "real" firmware,
|
||||
but one explicitly written for the emulation, we might as
|
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well load it directly from an ELF image. */
|
||||
firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
|
||||
bios_name ? bios_name :
|
||||
"hppa-firmware.img");
|
||||
if (firmware_filename == NULL) {
|
||||
error_report("no firmware provided");
|
||||
exit(1);
|
||||
}
|
||||
|
||||
size = load_elf(firmware_filename, NULL,
|
||||
NULL, &firmware_entry, &firmware_low, &firmware_high,
|
||||
true, EM_PARISC, 0, 0);
|
||||
|
||||
/* Unfortunately, load_elf sign-extends reading elf32. */
|
||||
firmware_entry = (target_ureg)firmware_entry;
|
||||
firmware_low = (target_ureg)firmware_low;
|
||||
firmware_high = (target_ureg)firmware_high;
|
||||
|
||||
if (size < 0) {
|
||||
error_report("could not load firmware '%s'", firmware_filename);
|
||||
exit(1);
|
||||
}
|
||||
fprintf(stderr, "Firmware loaded at 0x%08" PRIx64 "-0x%08" PRIx64
|
||||
", entry at 0x%08" PRIx64 ".\n",
|
||||
firmware_low, firmware_high, firmware_entry);
|
||||
if (firmware_low < ram_size || firmware_high >= FIRMWARE_END) {
|
||||
error_report("Firmware overlaps with memory or IO space");
|
||||
exit(1);
|
||||
}
|
||||
g_free(firmware_filename);
|
||||
|
||||
rom_region = g_new(MemoryRegion, 1);
|
||||
memory_region_allocate_system_memory(rom_region, OBJECT(machine),
|
||||
"firmware",
|
||||
(FIRMWARE_END - FIRMWARE_START));
|
||||
memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region);
|
||||
|
||||
/* Load kernel */
|
||||
if (kernel_filename) {
|
||||
fprintf(stderr, "LOADING kernel '%s'\n", kernel_filename);
|
||||
size = load_elf(kernel_filename, &cpu_hppa_to_phys,
|
||||
NULL, &kernel_entry, &kernel_low, &kernel_high,
|
||||
true, EM_PARISC, 0, 0);
|
||||
|
||||
/* Unfortunately, load_elf sign-extends reading elf32. */
|
||||
kernel_entry = (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry);
|
||||
kernel_low = (target_ureg)kernel_low;
|
||||
kernel_high = (target_ureg)kernel_high;
|
||||
|
||||
if (size < 0) {
|
||||
error_report("could not load kernel '%s'", kernel_filename);
|
||||
exit(1);
|
||||
}
|
||||
|
||||
fprintf(stderr, "Kernel loaded at 0x%08" PRIx64 "-0x%08" PRIx64
|
||||
", entry at 0x%08" PRIx64 ", size %ld kB.\n",
|
||||
kernel_low, kernel_high, kernel_entry, size / 1024);
|
||||
|
||||
if (kernel_cmdline) {
|
||||
cpu[0]->env.gr[24] = 0x4000;
|
||||
pstrcpy_targphys("cmdline", cpu[0]->env.gr[24],
|
||||
TARGET_PAGE_SIZE, kernel_cmdline);
|
||||
}
|
||||
|
||||
if (initrd_filename) {
|
||||
ram_addr_t initrd_base;
|
||||
long initrd_size;
|
||||
|
||||
initrd_size = get_image_size(initrd_filename);
|
||||
if (initrd_size < 0) {
|
||||
error_report("could not load initial ram disk '%s'",
|
||||
initrd_filename);
|
||||
exit(1);
|
||||
}
|
||||
|
||||
/* Load the initrd image high in memory.
|
||||
Mirror the algorithm used by palo:
|
||||
(1) Due to sign-extension problems and PDC,
|
||||
put the initrd no higher than 1G.
|
||||
(2) Reserve 64k for stack. */
|
||||
initrd_base = MIN(ram_size, 1024 * 1024 * 1024);
|
||||
initrd_base = initrd_base - 64 * 1024;
|
||||
initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK;
|
||||
|
||||
if (initrd_base < kernel_high) {
|
||||
error_report("kernel and initial ram disk too large!");
|
||||
exit(1);
|
||||
}
|
||||
|
||||
load_image_targphys(initrd_filename, initrd_base, initrd_size);
|
||||
cpu[0]->env.gr[23] = initrd_base;
|
||||
cpu[0]->env.gr[22] = initrd_base + initrd_size;
|
||||
}
|
||||
}
|
||||
|
||||
if (!kernel_entry) {
|
||||
/* When booting via firmware, tell firmware if we want interactive
|
||||
* mode (kernel_entry=1), and to boot from CD (gr[24]='d')
|
||||
* or hard disc * (gr[24]='c').
|
||||
*/
|
||||
kernel_entry = boot_menu ? 1 : 0;
|
||||
cpu[0]->env.gr[24] = machine->boot_order[0];
|
||||
}
|
||||
|
||||
/* We jump to the firmware entry routine and pass the
|
||||
* various parameters in registers. After firmware initialization,
|
||||
* firmware will start the Linux kernel with ramdisk and cmdline.
|
||||
*/
|
||||
cpu[0]->env.gr[26] = ram_size;
|
||||
cpu[0]->env.gr[25] = kernel_entry;
|
||||
|
||||
/* tell firmware how many SMP CPUs to present in inventory table */
|
||||
cpu[0]->env.gr[21] = smp_cpus;
|
||||
}
|
||||
|
||||
static void hppa_machine_reset(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
qemu_devices_reset();
|
||||
|
||||
/* Start all CPUs at the firmware entry point.
|
||||
* Monarch CPU will initialize firmware, secondary CPUs
|
||||
* will enter a small idle look and wait for rendevouz. */
|
||||
for (i = 0; i < smp_cpus; i++) {
|
||||
cpu_set_pc(CPU(cpu[i]), firmware_entry);
|
||||
cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000;
|
||||
}
|
||||
|
||||
/* already initialized by machine_hppa_init()? */
|
||||
if (cpu[0]->env.gr[26] == ram_size) {
|
||||
return;
|
||||
}
|
||||
|
||||
cpu[0]->env.gr[26] = ram_size;
|
||||
cpu[0]->env.gr[25] = 0; /* no firmware boot menu */
|
||||
cpu[0]->env.gr[24] = 'c';
|
||||
/* gr22/gr23 unused, no initrd while reboot. */
|
||||
cpu[0]->env.gr[21] = smp_cpus;
|
||||
}
|
||||
|
||||
|
||||
static void machine_hppa_machine_init(MachineClass *mc)
|
||||
{
|
||||
mc->desc = "HPPA generic machine";
|
||||
mc->default_cpu_type = TYPE_HPPA_CPU;
|
||||
mc->init = machine_hppa_init;
|
||||
mc->reset = hppa_machine_reset;
|
||||
mc->block_default_type = IF_SCSI;
|
||||
mc->max_cpus = HPPA_MAX_CPUS;
|
||||
mc->default_cpus = 1;
|
||||
mc->is_default = 1;
|
||||
mc->default_ram_size = 512 * M_BYTE;
|
||||
mc->default_boot_order = "cd";
|
||||
}
|
||||
|
||||
DEFINE_MACHINE("hppa", machine_hppa_machine_init)
|
||||
@@ -0,0 +1,90 @@
|
||||
/*
|
||||
* QEMU HP-PARISC PCI support functions.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "qemu-common.h"
|
||||
#include "hppa_sys.h"
|
||||
#include "qemu/log.h"
|
||||
#include "sysemu/sysemu.h"
|
||||
#include "trace.h"
|
||||
|
||||
|
||||
/* Fallback for unassigned PCI I/O operations. Avoids MCHK. */
|
||||
|
||||
static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size)
|
||||
{
|
||||
}
|
||||
|
||||
const MemoryRegionOps hppa_pci_ignore_ops = {
|
||||
.read = ignore_read,
|
||||
.write = ignore_write,
|
||||
.endianness = DEVICE_BIG_ENDIAN,
|
||||
.valid = {
|
||||
.min_access_size = 1,
|
||||
.max_access_size = 8,
|
||||
},
|
||||
.impl = {
|
||||
.min_access_size = 1,
|
||||
.max_access_size = 8,
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
/* PCI config space reads/writes, to byte-word addressable memory. */
|
||||
static uint64_t bw_conf1_read(void *opaque, hwaddr addr,
|
||||
unsigned size)
|
||||
{
|
||||
PCIBus *b = opaque;
|
||||
return pci_data_read(b, addr, size);
|
||||
}
|
||||
|
||||
static void bw_conf1_write(void *opaque, hwaddr addr,
|
||||
uint64_t val, unsigned size)
|
||||
{
|
||||
PCIBus *b = opaque;
|
||||
pci_data_write(b, addr, val, size);
|
||||
}
|
||||
|
||||
const MemoryRegionOps hppa_pci_conf1_ops = {
|
||||
.read = bw_conf1_read,
|
||||
.write = bw_conf1_write,
|
||||
.endianness = DEVICE_BIG_ENDIAN,
|
||||
.impl = {
|
||||
.min_access_size = 1,
|
||||
.max_access_size = 4,
|
||||
},
|
||||
};
|
||||
|
||||
/* PCI/EISA Interrupt Acknowledge Cycle. */
|
||||
|
||||
static uint64_t iack_read(void *opaque, hwaddr addr, unsigned size)
|
||||
{
|
||||
return pic_read_irq(isa_pic);
|
||||
}
|
||||
|
||||
static void special_write(void *opaque, hwaddr addr,
|
||||
uint64_t val, unsigned size)
|
||||
{
|
||||
trace_hppa_pci_iack_write();
|
||||
}
|
||||
|
||||
const MemoryRegionOps hppa_pci_iack_ops = {
|
||||
.read = iack_read,
|
||||
.write = special_write,
|
||||
.endianness = DEVICE_BIG_ENDIAN,
|
||||
.valid = {
|
||||
.min_access_size = 4,
|
||||
.max_access_size = 4,
|
||||
},
|
||||
.impl = {
|
||||
.min_access_size = 4,
|
||||
.max_access_size = 4,
|
||||
},
|
||||
};
|
||||
@@ -0,0 +1,4 @@
|
||||
# See docs/devel/tracing.txt for syntax documentation.
|
||||
|
||||
# hw/hppa/pci.c
|
||||
hppa_pci_iack_write(void) ""
|
||||
@@ -24,6 +24,7 @@ enum {
|
||||
QEMU_ARCH_MOXIE = (1 << 15),
|
||||
QEMU_ARCH_TRICORE = (1 << 16),
|
||||
QEMU_ARCH_NIOS2 = (1 << 17),
|
||||
QEMU_ARCH_HPPA = (1 << 18),
|
||||
};
|
||||
|
||||
extern const uint32_t arch_type;
|
||||
|
||||
@@ -33,7 +33,7 @@ static inline void cpu_clone_regs(CPUHPPAState *env, target_ulong newsp)
|
||||
|
||||
static inline void cpu_set_tls(CPUHPPAState *env, target_ulong newtls)
|
||||
{
|
||||
env->cr27 = newtls;
|
||||
env->cr[27] = newtls;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
+24
-4
@@ -3773,21 +3773,41 @@ void cpu_loop(CPUHPPAState *env)
|
||||
env->iaoq_f = env->gr[31];
|
||||
env->iaoq_b = env->gr[31] + 4;
|
||||
break;
|
||||
case EXCP_SIGSEGV:
|
||||
case EXCP_ITLB_MISS:
|
||||
case EXCP_DTLB_MISS:
|
||||
case EXCP_NA_ITLB_MISS:
|
||||
case EXCP_NA_DTLB_MISS:
|
||||
case EXCP_IMP:
|
||||
case EXCP_DMP:
|
||||
case EXCP_DMB:
|
||||
case EXCP_PAGE_REF:
|
||||
case EXCP_DMAR:
|
||||
case EXCP_DMPI:
|
||||
info.si_signo = TARGET_SIGSEGV;
|
||||
info.si_errno = 0;
|
||||
info.si_code = TARGET_SEGV_ACCERR;
|
||||
info._sifields._sigfault._addr = env->ior;
|
||||
info._sifields._sigfault._addr = env->cr[CR_IOR];
|
||||
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
||||
break;
|
||||
case EXCP_SIGILL:
|
||||
case EXCP_UNALIGN:
|
||||
info.si_signo = TARGET_SIGBUS;
|
||||
info.si_errno = 0;
|
||||
info.si_code = 0;
|
||||
info._sifields._sigfault._addr = env->cr[CR_IOR];
|
||||
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
||||
break;
|
||||
case EXCP_ILL:
|
||||
case EXCP_PRIV_OPR:
|
||||
case EXCP_PRIV_REG:
|
||||
info.si_signo = TARGET_SIGILL;
|
||||
info.si_errno = 0;
|
||||
info.si_code = TARGET_ILL_ILLOPN;
|
||||
info._sifields._sigfault._addr = env->iaoq_f;
|
||||
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
||||
break;
|
||||
case EXCP_SIGFPE:
|
||||
case EXCP_OVERFLOW:
|
||||
case EXCP_COND:
|
||||
case EXCP_ASSIST:
|
||||
info.si_signo = TARGET_SIGFPE;
|
||||
info.si_errno = 0;
|
||||
info.si_code = 0;
|
||||
|
||||
+2
-2
@@ -6442,7 +6442,7 @@ static void setup_sigcontext(struct target_sigcontext *sc, CPUArchState *env)
|
||||
__put_user(env->fr[i], &sc->sc_fr[i]);
|
||||
}
|
||||
|
||||
__put_user(env->sar, &sc->sc_sar);
|
||||
__put_user(env->cr[CR_SAR], &sc->sc_sar);
|
||||
}
|
||||
|
||||
static void restore_sigcontext(CPUArchState *env, struct target_sigcontext *sc)
|
||||
@@ -6463,7 +6463,7 @@ static void restore_sigcontext(CPUArchState *env, struct target_sigcontext *sc)
|
||||
|
||||
__get_user(env->iaoq_f, &sc->sc_iaoq[0]);
|
||||
__get_user(env->iaoq_b, &sc->sc_iaoq[1]);
|
||||
__get_user(env->sar, &sc->sc_sar);
|
||||
__get_user(env->cr[CR_SAR], &sc->sc_sar);
|
||||
}
|
||||
|
||||
/* No, this doesn't look right, but it's copied straight from the kernel. */
|
||||
|
||||
Executable
BIN
Binary file not shown.
Submodule
+1
Submodule roms/seabios-hppa added at 8fa4ca9935
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user