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Merge remote-tracking branch 'afaerber/qom-cpu.v5' into staging

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* afaerber/qom-cpu.v5: (43 commits)
  qom: Introduce CPU class
  Rename CPUState -> CPUArchState
  xtensa hw/: Don't use CPUState
  sparc hw/: Don't use CPUState
  sh4 hw/: Don't use CPUState
  s390x hw/: Don't use CPUState
  ppc hw/: Don't use CPUState
  mips hw/: Don't use CPUState
  microblaze hw/: Don't use CPUState
  m68k hw/: Don't use CPUState
  lm32 hw/: Don't use CPUState
  i386 hw/: Don't use CPUState
  cris hw/: Don't use CPUState
  arm hw/: Don't use CPUState
  alpha hw/: Don't use CPUState
  xtensa-semi: Don't use CPUState
  m68k-semi: Don't use CPUState
  arm-semi: Don't use CPUState
  target-xtensa: Don't overuse CPUState
  target-unicore32: Don't overuse CPUState
  ...
This commit is contained in:
Anthony Liguori
2012-03-14 16:47:49 -05:00
parent 9e4dd565b4 dd83b06ae6
commit aea6ff7fa0
229 changed files with 3142 additions and 2978 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Makefile.objs
+3
View File
@@ -14,6 +14,7 @@ universal-obj-y += $(qobject-obj-y)
# QOM
include $(SRC_PATH)/qom/Makefile
qom-obj-y = $(addprefix qom/, $(qom-y))
qom-obj-twice-y = $(addprefix qom/, $(qom-twice-y))
universal-obj-y += $(qom-obj-y)
@@ -93,6 +94,7 @@ fsdev-obj-$(CONFIG_VIRTFS) += $(addprefix fsdev/, $(fsdev-nested-y))
common-obj-y = $(block-obj-y) blockdev.o
common-obj-y += $(net-obj-y)
common-obj-y += $(qom-obj-twice-y)
common-obj-$(CONFIG_LINUX) += $(fsdev-obj-$(CONFIG_LINUX))
common-obj-y += readline.o console.o cursor.o
common-obj-y += $(oslib-obj-y)
@@ -200,6 +202,7 @@ user-obj-y += cutils.o cache-utils.o
user-obj-y += module.o
user-obj-y += qemu-user.o
user-obj-y += $(trace-obj-y)
user-obj-y += $(qom-obj-twice-y)
######################################################################
# libhw
arm-semi.c
+5 -5
View File
@@ -108,7 +108,7 @@ static inline uint32_t set_swi_errno(TaskState *ts, uint32_t code)
return code;
}
#else
static inline uint32_t set_swi_errno(CPUState *env, uint32_t code)
static inline uint32_t set_swi_errno(CPUARMState *env, uint32_t code)
{
return code;
}
@@ -122,7 +122,7 @@ static target_ulong arm_semi_syscall_len;
static target_ulong syscall_err;
#endif
static void arm_semi_cb(CPUState *env, target_ulong ret, target_ulong err)
static void arm_semi_cb(CPUARMState *env, target_ulong ret, target_ulong err)
{
#ifdef CONFIG_USER_ONLY
TaskState *ts = env->opaque;
@@ -152,7 +152,7 @@ static void arm_semi_cb(CPUState *env, target_ulong ret, target_ulong err)
}
}
static void arm_semi_flen_cb(CPUState *env, target_ulong ret, target_ulong err)
static void arm_semi_flen_cb(CPUARMState *env, target_ulong ret, target_ulong err)
{
/* The size is always stored in big-endian order, extract
the value. We assume the size always fit in 32 bits. */
@@ -174,7 +174,7 @@ static void arm_semi_flen_cb(CPUState *env, target_ulong ret, target_ulong err)
__arg; \
})
#define SET_ARG(n, val) put_user_ual(val, args + (n) * 4)
uint32_t do_arm_semihosting(CPUState *env)
uint32_t do_arm_semihosting(CPUARMState *env)
{
target_ulong args;
char * s;
@@ -184,7 +184,7 @@ uint32_t do_arm_semihosting(CPUState *env)
#ifdef CONFIG_USER_ONLY
TaskState *ts = env->opaque;
#else
CPUState *ts = env;
CPUARMState *ts = env;
#endif
nr = env->regs[0];
bsd-user/main.c
+7 -7
View File
@@ -63,18 +63,18 @@ void gemu_log(const char *fmt, ...)
}
#if defined(TARGET_I386)
int cpu_get_pic_interrupt(CPUState *env)
int cpu_get_pic_interrupt(CPUX86State *env)
{
return -1;
}
#endif
/* These are no-ops because we are not threadsafe. */
static inline void cpu_exec_start(CPUState *env)
static inline void cpu_exec_start(CPUArchState *env)
{
}
static inline void cpu_exec_end(CPUState *env)
static inline void cpu_exec_end(CPUArchState *env)
{
}
@@ -109,7 +109,7 @@ void cpu_list_unlock(void)
/***********************************************************/
/* CPUX86 core interface */
void cpu_smm_update(CPUState *env)
void cpu_smm_update(CPUX86State *env)
{
}
@@ -713,7 +713,7 @@ static void usage(void)
exit(1);
}
THREAD CPUState *thread_env;
THREAD CPUArchState *thread_env;
/* Assumes contents are already zeroed. */
void init_task_state(TaskState *ts)
@@ -737,7 +737,7 @@ int main(int argc, char **argv)
struct target_pt_regs regs1, *regs = &regs1;
struct image_info info1, *info = &info1;
TaskState ts1, *ts = &ts1;
CPUState *env;
CPUArchState *env;
int optind;
const char *r;
int gdbstub_port = 0;
@@ -917,7 +917,7 @@ int main(int argc, char **argv)
exit(1);
}
#if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
cpu_reset(env);
cpu_state_reset(env);
#endif
thread_env = env;
bsd-user/qemu.h
+6 -6
View File
@@ -139,8 +139,8 @@ abi_long do_openbsd_syscall(void *cpu_env, int num, abi_long arg1,
abi_long arg2, abi_long arg3, abi_long arg4,
abi_long arg5, abi_long arg6);
void gemu_log(const char *fmt, ...) GCC_FMT_ATTR(1, 2);
extern THREAD CPUState *thread_env;
void cpu_loop(CPUState *env);
extern THREAD CPUArchState *thread_env;
void cpu_loop(CPUArchState *env);
char *target_strerror(int err);
int get_osversion(void);
void fork_start(void);
@@ -167,13 +167,13 @@ void print_openbsd_syscall_ret(int num, abi_long ret);
extern int do_strace;
/* signal.c */
void process_pending_signals(CPUState *cpu_env);
void process_pending_signals(CPUArchState *cpu_env);
void signal_init(void);
//int queue_signal(CPUState *env, int sig, target_siginfo_t *info);
//int queue_signal(CPUArchState *env, int sig, target_siginfo_t *info);
//void host_to_target_siginfo(target_siginfo_t *tinfo, const siginfo_t *info);
//void target_to_host_siginfo(siginfo_t *info, const target_siginfo_t *tinfo);
long do_sigreturn(CPUState *env);
long do_rt_sigreturn(CPUState *env);
long do_sigreturn(CPUArchState *env);
long do_rt_sigreturn(CPUArchState *env);
abi_long do_sigaltstack(abi_ulong uss_addr, abi_ulong uoss_addr, abi_ulong sp);
/* mmap.c */
bsd-user/signal.c
+1 -1
View File
@@ -33,6 +33,6 @@ void signal_init(void)
{
}
void process_pending_signals(CPUState *cpu_env)
void process_pending_signals(CPUArchState *cpu_env)
{
}
configure
Vendored
+1
View File
@@ -3921,6 +3921,7 @@ fi
d=libuser
mkdir -p $d
mkdir -p $d/trace
mkdir -p $d/qom
symlink $source_path/Makefile.user $d/Makefile
if test "$docs" = "yes" ; then
cpu-all.h
+28 -28
View File
@@ -322,20 +322,20 @@ void page_set_flags(target_ulong start, target_ulong end, int flags);
int page_check_range(target_ulong start, target_ulong len, int flags);
#endif
CPUState *cpu_copy(CPUState *env);
CPUState *qemu_get_cpu(int cpu);
CPUArchState *cpu_copy(CPUArchState *env);
CPUArchState *qemu_get_cpu(int cpu);
#define CPU_DUMP_CODE 0x00010000
void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
void cpu_dump_state(CPUArchState *env, FILE *f, fprintf_function cpu_fprintf,
int flags);
void cpu_dump_statistics(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
void cpu_dump_statistics(CPUArchState *env, FILE *f, fprintf_function cpu_fprintf,
int flags);
void QEMU_NORETURN cpu_abort(CPUState *env, const char *fmt, ...)
void QEMU_NORETURN cpu_abort(CPUArchState *env, const char *fmt, ...)
GCC_FMT_ATTR(2, 3);
extern CPUState *first_cpu;
DECLARE_TLS(CPUState *,cpu_single_env);
extern CPUArchState *first_cpu;
DECLARE_TLS(CPUArchState *,cpu_single_env);
#define cpu_single_env tls_var(cpu_single_env)
/* Flags for use in ENV->INTERRUPT_PENDING.
@@ -389,23 +389,23 @@ DECLARE_TLS(CPUState *,cpu_single_env);
| CPU_INTERRUPT_TGT_EXT_4)
#ifndef CONFIG_USER_ONLY
typedef void (*CPUInterruptHandler)(CPUState *, int);
typedef void (*CPUInterruptHandler)(CPUArchState *, int);
extern CPUInterruptHandler cpu_interrupt_handler;
static inline void cpu_interrupt(CPUState *s, int mask)
static inline void cpu_interrupt(CPUArchState *s, int mask)
{
cpu_interrupt_handler(s, mask);
}
#else /* USER_ONLY */
void cpu_interrupt(CPUState *env, int mask);
void cpu_interrupt(CPUArchState *env, int mask);
#endif /* USER_ONLY */
void cpu_reset_interrupt(CPUState *env, int mask);
void cpu_reset_interrupt(CPUArchState *env, int mask);
void cpu_exit(CPUState *s);
void cpu_exit(CPUArchState *s);
bool qemu_cpu_has_work(CPUState *env);
bool qemu_cpu_has_work(CPUArchState *env);
/* Breakpoint/watchpoint flags */
#define BP_MEM_READ 0x01
@@ -416,26 +416,26 @@ bool qemu_cpu_has_work(CPUState *env);
#define BP_GDB 0x10
#define BP_CPU 0x20
int cpu_breakpoint_insert(CPUState *env, target_ulong pc, int flags,
int cpu_breakpoint_insert(CPUArchState *env, target_ulong pc, int flags,
CPUBreakpoint **breakpoint);
int cpu_breakpoint_remove(CPUState *env, target_ulong pc, int flags);
void cpu_breakpoint_remove_by_ref(CPUState *env, CPUBreakpoint *breakpoint);
void cpu_breakpoint_remove_all(CPUState *env, int mask);
int cpu_watchpoint_insert(CPUState *env, target_ulong addr, target_ulong len,
int cpu_breakpoint_remove(CPUArchState *env, target_ulong pc, int flags);
void cpu_breakpoint_remove_by_ref(CPUArchState *env, CPUBreakpoint *breakpoint);
void cpu_breakpoint_remove_all(CPUArchState *env, int mask);
int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len,
int flags, CPUWatchpoint **watchpoint);
int cpu_watchpoint_remove(CPUState *env, target_ulong addr,
int cpu_watchpoint_remove(CPUArchState *env, target_ulong addr,
target_ulong len, int flags);
void cpu_watchpoint_remove_by_ref(CPUState *env, CPUWatchpoint *watchpoint);
void cpu_watchpoint_remove_all(CPUState *env, int mask);
void cpu_watchpoint_remove_by_ref(CPUArchState *env, CPUWatchpoint *watchpoint);
void cpu_watchpoint_remove_all(CPUArchState *env, int mask);
#define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */
#define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */
#define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
void cpu_single_step(CPUState *env, int enabled);
void cpu_reset(CPUState *s);
int cpu_is_stopped(CPUState *env);
void run_on_cpu(CPUState *env, void (*func)(void *data), void *data);
void cpu_single_step(CPUArchState *env, int enabled);
void cpu_state_reset(CPUArchState *s);
int cpu_is_stopped(CPUArchState *env);
void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data);
#define CPU_LOG_TB_OUT_ASM (1 << 0)
#define CPU_LOG_TB_IN_ASM (1 << 1)
@@ -466,7 +466,7 @@ int cpu_str_to_log_mask(const char *str);
/* Return the physical page corresponding to a virtual one. Use it
only for debugging because no protection checks are done. Return -1
if no page found. */
target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr);
target_phys_addr_t cpu_get_phys_page_debug(CPUArchState *env, target_ulong addr);
/* memory API */
@@ -508,12 +508,12 @@ extern int mem_prealloc;
/* Set if TLB entry is an IO callback. */
#define TLB_MMIO (1 << 5)
void cpu_tlb_update_dirty(CPUState *env);
void cpu_tlb_update_dirty(CPUArchState *env);
void dump_exec_info(FILE *f, fprintf_function cpu_fprintf);
#endif /* !CONFIG_USER_ONLY */
int cpu_memory_rw_debug(CPUState *env, target_ulong addr,
int cpu_memory_rw_debug(CPUArchState *env, target_ulong addr,
uint8_t *buf, int len, int is_write);
#endif /* CPU_ALL_H */
cpu-defs.h
+1 -1
View File
@@ -202,7 +202,7 @@ typedef struct CPUWatchpoint {
jmp_buf jmp_env; \
int exception_index; \
\
CPUState *next_cpu; /* next CPU sharing TB cache */ \
CPUArchState *next_cpu; /* next CPU sharing TB cache */ \
int cpu_index; /* CPU index (informative) */ \
uint32_t host_tid; /* host thread ID */ \
int numa_node; /* NUMA node this cpu is belonging to */ \
cpu-exec.c
+9 -11
View File
@@ -26,12 +26,12 @@ int tb_invalidated_flag;
//#define CONFIG_DEBUG_EXEC
bool qemu_cpu_has_work(CPUState *env)
bool qemu_cpu_has_work(CPUArchState *env)
{
return cpu_has_work(env);
}
void cpu_loop_exit(CPUState *env)
void cpu_loop_exit(CPUArchState *env)
{
env->current_tb = NULL;
longjmp(env->jmp_env, 1);
@@ -41,7 +41,7 @@ void cpu_loop_exit(CPUState *env)
restored in a state compatible with the CPU emulator
*/
#if defined(CONFIG_SOFTMMU)
void cpu_resume_from_signal(CPUState *env, void *puc)
void cpu_resume_from_signal(CPUArchState *env, void *puc)
{
/* XXX: restore cpu registers saved in host registers */
@@ -52,7 +52,7 @@ void cpu_resume_from_signal(CPUState *env, void *puc)
/* Execute the code without caching the generated code. An interpreter
could be used if available. */
static void cpu_exec_nocache(CPUState *env, int max_cycles,
static void cpu_exec_nocache(CPUArchState *env, int max_cycles,
TranslationBlock *orig_tb)
{
unsigned long next_tb;
@@ -79,7 +79,7 @@ static void cpu_exec_nocache(CPUState *env, int max_cycles,
tb_free(tb);
}
static TranslationBlock *tb_find_slow(CPUState *env,
static TranslationBlock *tb_find_slow(CPUArchState *env,
target_ulong pc,
target_ulong cs_base,
uint64_t flags)
@@ -135,7 +135,7 @@ static TranslationBlock *tb_find_slow(CPUState *env,
return tb;
}
static inline TranslationBlock *tb_find_fast(CPUState *env)
static inline TranslationBlock *tb_find_fast(CPUArchState *env)
{
TranslationBlock *tb;
target_ulong cs_base, pc;
@@ -163,7 +163,7 @@ CPUDebugExcpHandler *cpu_set_debug_excp_handler(CPUDebugExcpHandler *handler)
return old_handler;
}
static void cpu_handle_debug_exception(CPUState *env)
static void cpu_handle_debug_exception(CPUArchState *env)
{
CPUWatchpoint *wp;
@@ -181,7 +181,7 @@ static void cpu_handle_debug_exception(CPUState *env)
volatile sig_atomic_t exit_request;
int cpu_exec(CPUState *env)
int cpu_exec(CPUArchState *env)
{
int ret, interrupt_request;
TranslationBlock *tb;
@@ -339,11 +339,9 @@ int cpu_exec(CPUState *env)
}
}
#elif defined(TARGET_PPC)
#if 0
if ((interrupt_request & CPU_INTERRUPT_RESET)) {
cpu_reset(env);
cpu_state_reset(env);
}
#endif
if (interrupt_request & CPU_INTERRUPT_HARD) {
ppc_hw_interrupt(env);
if (env->pending_interrupts == 0)
cpus.c
+38 -38
View File
@@ -58,7 +58,7 @@
#endif /* CONFIG_LINUX */
static CPUState *next_cpu;
static CPUArchState *next_cpu;
/***********************************************************/
/* guest cycle counter */
@@ -89,7 +89,7 @@ TimersState timers_state;
int64_t cpu_get_icount(void)
{
int64_t icount;
CPUState *env = cpu_single_env;
CPUArchState *env = cpu_single_env;
icount = qemu_icount;
if (env) {
@@ -339,7 +339,7 @@ void configure_icount(const char *option)
void hw_error(const char *fmt, ...)
{
va_list ap;
CPUState *env;
CPUArchState *env;
va_start(ap, fmt);
fprintf(stderr, "qemu: hardware error: ");
@@ -359,7 +359,7 @@ void hw_error(const char *fmt, ...)
void cpu_synchronize_all_states(void)
{
CPUState *cpu;
CPUArchState *cpu;
for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
cpu_synchronize_state(cpu);
@@ -368,7 +368,7 @@ void cpu_synchronize_all_states(void)
void cpu_synchronize_all_post_reset(void)
{
CPUState *cpu;
CPUArchState *cpu;
for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
cpu_synchronize_post_reset(cpu);
@@ -377,14 +377,14 @@ void cpu_synchronize_all_post_reset(void)
void cpu_synchronize_all_post_init(void)
{
CPUState *cpu;
CPUArchState *cpu;
for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
cpu_synchronize_post_init(cpu);
}
}
int cpu_is_stopped(CPUState *env)
int cpu_is_stopped(CPUArchState *env)
{
return !runstate_is_running() || env->stopped;
}
@@ -402,7 +402,7 @@ static void do_vm_stop(RunState state)
}
}
static int cpu_can_run(CPUState *env)
static int cpu_can_run(CPUArchState *env)
{
if (env->stop) {
return 0;
@@ -413,7 +413,7 @@ static int cpu_can_run(CPUState *env)
return 1;
}
static bool cpu_thread_is_idle(CPUState *env)
static bool cpu_thread_is_idle(CPUArchState *env)
{
if (env->stop || env->queued_work_first) {
return false;
@@ -430,7 +430,7 @@ static bool cpu_thread_is_idle(CPUState *env)
bool all_cpu_threads_idle(void)
{
CPUState *env;
CPUArchState *env;
for (env = first_cpu; env != NULL; env = env->next_cpu) {
if (!cpu_thread_is_idle(env)) {
@@ -440,7 +440,7 @@ bool all_cpu_threads_idle(void)
return true;
}
static void cpu_handle_guest_debug(CPUState *env)
static void cpu_handle_guest_debug(CPUArchState *env)
{
gdb_set_stop_cpu(env);
qemu_system_debug_request();
@@ -494,7 +494,7 @@ static void qemu_init_sigbus(void)
prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0);
}
static void qemu_kvm_eat_signals(CPUState *env)
static void qemu_kvm_eat_signals(CPUArchState *env)
{
struct timespec ts = { 0, 0 };
siginfo_t siginfo;
@@ -537,7 +537,7 @@ static void qemu_init_sigbus(void)
{
}
static void qemu_kvm_eat_signals(CPUState *env)
static void qemu_kvm_eat_signals(CPUArchState *env)
{
}
#endif /* !CONFIG_LINUX */
@@ -547,7 +547,7 @@ static void dummy_signal(int sig)
{
}
static void qemu_kvm_init_cpu_signals(CPUState *env)
static void qemu_kvm_init_cpu_signals(CPUArchState *env)
{
int r;
sigset_t set;
@@ -582,7 +582,7 @@ static void qemu_tcg_init_cpu_signals(void)
}
#else /* _WIN32 */
static void qemu_kvm_init_cpu_signals(CPUState *env)
static void qemu_kvm_init_cpu_signals(CPUArchState *env)
{
abort();
}
@@ -619,7 +619,7 @@ void qemu_init_cpu_loop(void)
qemu_thread_get_self(&io_thread);
}
void run_on_cpu(CPUState *env, void (*func)(void *data), void *data)
void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
{
struct qemu_work_item wi;
@@ -641,14 +641,14 @@ void run_on_cpu(CPUState *env, void (*func)(void *data), void *data)
qemu_cpu_kick(env);
while (!wi.done) {
CPUState *self_env = cpu_single_env;
CPUArchState *self_env = cpu_single_env;
qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex);
cpu_single_env = self_env;
}
}
static void flush_queued_work(CPUState *env)
static void flush_queued_work(CPUArchState *env)
{
struct qemu_work_item *wi;
@@ -665,7 +665,7 @@ static void flush_queued_work(CPUState *env)
qemu_cond_broadcast(&qemu_work_cond);
}
static void qemu_wait_io_event_common(CPUState *env)
static void qemu_wait_io_event_common(CPUArchState *env)
{
if (env->stop) {
env->stop = 0;
@@ -678,7 +678,7 @@ static void qemu_wait_io_event_common(CPUState *env)
static void qemu_tcg_wait_io_event(void)
{
CPUState *env;
CPUArchState *env;
while (all_cpu_threads_idle()) {
/* Start accounting real time to the virtual clock if the CPUs
@@ -696,7 +696,7 @@ static void qemu_tcg_wait_io_event(void)
}
}
static void qemu_kvm_wait_io_event(CPUState *env)
static void qemu_kvm_wait_io_event(CPUArchState *env)
{
while (cpu_thread_is_idle(env)) {
qemu_cond_wait(env->halt_cond, &qemu_global_mutex);
@@ -708,7 +708,7 @@ static void qemu_kvm_wait_io_event(CPUState *env)
static void *qemu_kvm_cpu_thread_fn(void *arg)
{
CPUState *env = arg;
CPUArchState *env = arg;
int r;
qemu_mutex_lock(&qemu_global_mutex);
@@ -745,7 +745,7 @@ static void tcg_exec_all(void);
static void *qemu_tcg_cpu_thread_fn(void *arg)
{
CPUState *env = arg;
CPUArchState *env = arg;
qemu_tcg_init_cpu_signals();
qemu_thread_get_self(env->thread);
@@ -779,7 +779,7 @@ static void *qemu_tcg_cpu_thread_fn(void *arg)
return NULL;
}
static void qemu_cpu_kick_thread(CPUState *env)
static void qemu_cpu_kick_thread(CPUArchState *env)
{
#ifndef _WIN32
int err;
@@ -800,7 +800,7 @@ static void qemu_cpu_kick_thread(CPUState *env)
void qemu_cpu_kick(void *_env)
{
CPUState *env = _env;
CPUArchState *env = _env;
qemu_cond_broadcast(env->halt_cond);
if (kvm_enabled() && !env->thread_kicked) {
@@ -825,7 +825,7 @@ void qemu_cpu_kick_self(void)
int qemu_cpu_is_self(void *_env)
{
CPUState *env = _env;
CPUArchState *env = _env;
return qemu_thread_is_self(env->thread);
}
@@ -852,7 +852,7 @@ void qemu_mutex_unlock_iothread(void)
static int all_vcpus_paused(void)
{
CPUState *penv = first_cpu;
CPUArchState *penv = first_cpu;
while (penv) {
if (!penv->stopped) {
@@ -866,7 +866,7 @@ static int all_vcpus_paused(void)
void pause_all_vcpus(void)
{
CPUState *penv = first_cpu;
CPUArchState *penv = first_cpu;
qemu_clock_enable(vm_clock, false);
while (penv) {
@@ -899,7 +899,7 @@ void pause_all_vcpus(void)
void resume_all_vcpus(void)
{
CPUState *penv = first_cpu;
CPUArchState *penv = first_cpu;
qemu_clock_enable(vm_clock, true);
while (penv) {
@@ -912,7 +912,7 @@ void resume_all_vcpus(void)
static void qemu_tcg_init_vcpu(void *_env)
{
CPUState *env = _env;
CPUArchState *env = _env;
/* share a single thread for all cpus with TCG */
if (!tcg_cpu_thread) {
@@ -935,7 +935,7 @@ static void qemu_tcg_init_vcpu(void *_env)
}
}
static void qemu_kvm_start_vcpu(CPUState *env)
static void qemu_kvm_start_vcpu(CPUArchState *env)
{
env->thread = g_malloc0(sizeof(QemuThread));
env->halt_cond = g_malloc0(sizeof(QemuCond));
@@ -949,7 +949,7 @@ static void qemu_kvm_start_vcpu(CPUState *env)
void qemu_init_vcpu(void *_env)
{
CPUState *env = _env;
CPUArchState *env = _env;
env->nr_cores = smp_cores;
env->nr_threads = smp_threads;
@@ -996,7 +996,7 @@ void vm_stop_force_state(RunState state)
}
}
static int tcg_cpu_exec(CPUState *env)
static int tcg_cpu_exec(CPUArchState *env)
{
int ret;
#ifdef CONFIG_PROFILER
@@ -1045,7 +1045,7 @@ static void tcg_exec_all(void)
next_cpu = first_cpu;
}
for (; next_cpu != NULL && !exit_request; next_cpu = next_cpu->next_cpu) {
CPUState *env = next_cpu;
CPUArchState *env = next_cpu;
qemu_clock_enable(vm_clock,
(env->singlestep_enabled & SSTEP_NOTIMER) == 0);
@@ -1065,7 +1065,7 @@ static void tcg_exec_all(void)
void set_numa_modes(void)
{
CPUState *env;
CPUArchState *env;
int i;
for (env = first_cpu; env != NULL; env = env->next_cpu) {
@@ -1111,7 +1111,7 @@ void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg)
CpuInfoList *qmp_query_cpus(Error **errp)
{
CpuInfoList *head = NULL, *cur_item = NULL;
CPUState *env;
CPUArchState *env;
for(env = first_cpu; env != NULL; env = env->next_cpu) {
CpuInfoList *info;
@@ -1157,7 +1157,7 @@ void qmp_memsave(int64_t addr, int64_t size, const char *filename,
{
FILE *f;
uint32_t l;
CPUState *env;
CPUArchState *env;
uint8_t buf[1024];
if (!has_cpu) {
@@ -1232,7 +1232,7 @@ exit:
void qmp_inject_nmi(Error **errp)
{
#if defined(TARGET_I386)
CPUState *env;
CPUArchState *env;
for (env = first_cpu; env != NULL; env = env->next_cpu) {
if (!env->apic_state) {
darwin-user/main.c
+11 -11
View File
@@ -71,44 +71,44 @@ void gemu_log(const char *fmt, ...)
va_end(ap);
}
int cpu_get_pic_interrupt(CPUState *env)
int cpu_get_pic_interrupt(CPUArchState *env)
{
return -1;
}
#ifdef TARGET_PPC
static inline uint64_t cpu_ppc_get_tb (CPUState *env)
static inline uint64_t cpu_ppc_get_tb(CPUPPCState *env)
{
/* TO FIX */
return 0;
}
uint64_t cpu_ppc_load_tbl (CPUState *env)
uint64_t cpu_ppc_load_tbl(CPUPPCState *env)
{
return cpu_ppc_get_tb(env);
}
uint32_t cpu_ppc_load_tbu (CPUState *env)
uint32_t cpu_ppc_load_tbu(CPUPPCState *env)
{
return cpu_ppc_get_tb(env) >> 32;
}
uint64_t cpu_ppc_load_atbl (CPUState *env)
uint64_t cpu_ppc_load_atbl(CPUPPCState *env)
{
return cpu_ppc_get_tb(env);
}
uint32_t cpu_ppc_load_atbu (CPUState *env)
uint32_t cpu_ppc_load_atbu(CPUPPCState *env)
{
return cpu_ppc_get_tb(env) >> 32;
}
uint32_t cpu_ppc601_load_rtcu (CPUState *env)
uint32_t cpu_ppc601_load_rtcu(CPUPPCState *env)
{
cpu_ppc_load_tbu(env);
}
uint32_t cpu_ppc601_load_rtcl (CPUState *env)
uint32_t cpu_ppc601_load_rtcl(CPUPPCState *env)
{
return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
}
@@ -729,7 +729,7 @@ static void usage(void)
}
/* XXX: currently only used for async signals (see signal.c) */
CPUState *global_env;
CPUArchState *global_env;
/* used to free thread contexts */
TaskState *first_task_state;
@@ -741,7 +741,7 @@ int main(int argc, char **argv)
const char *log_mask = NULL;
struct target_pt_regs regs1, *regs = &regs1;
TaskState ts1, *ts = &ts1;
CPUState *env;
CPUArchState *env;
int optind;
short use_gdbstub = 0;
const char *r;
@@ -858,7 +858,7 @@ int main(int argc, char **argv)
/* NOTE: we need to init the CPU at this stage to get
qemu_host_page_size */
env = cpu_init(cpu_model);
cpu_reset(env);
cpu_state_reset(env);
printf("Starting %s with qemu\n----------------\n", filename);
darwin-user/qemu.h
+3 -3
View File
@@ -104,8 +104,8 @@ void qerror(const char *fmt, ...) GCC_FMT_ATTR(1, 2);
void write_dt(void *ptr, unsigned long addr, unsigned long limit, int flags);
extern CPUState *global_env;
void cpu_loop(CPUState *env);
extern CPUArchState *global_env;
void cpu_loop(CPUArchState *env);
void init_paths(const char *prefix);
const char *path(const char *pathname);
@@ -122,7 +122,7 @@ void signal_init(void);
int queue_signal(int sig, target_siginfo_t *info);
void host_to_target_siginfo(target_siginfo_t *tinfo, const siginfo_t *info);
void target_to_host_siginfo(siginfo_t *info, const target_siginfo_t *tinfo);
long do_sigreturn(CPUState *env, int num);
long do_sigreturn(CPUArchState *env, int num);
/* machload.c */
int mach_exec(const char * filename, char ** argv, char ** envp,
darwin-user/signal.c
+4 -4
View File
@@ -315,7 +315,7 @@ get_sigframe(struct emulated_sigaction *ka, CPUX86State *env, size_t frame_size)
}
static void setup_frame(int sig, struct emulated_sigaction *ka,
void *set, CPUState *env)
void *set, CPUX86State *env)
{
void *frame;
@@ -336,7 +336,7 @@ give_sigsegv:
force_sig(SIGSEGV /* , current */);
}
long do_sigreturn(CPUState *env, int num)
long do_sigreturn(CPUX86State *env, int num)
{
int i = 0;
struct target_sigcontext *scp = get_int_arg(&i, env);
@@ -377,12 +377,12 @@ long do_sigreturn(CPUState *env, int num)
#else
static void setup_frame(int sig, struct emulated_sigaction *ka,
void *set, CPUState *env)
void *set, CPUArchState *env)
{
fprintf(stderr, "setup_frame: not implemented\n");
}
long do_sigreturn(CPUState *env, int num)
long do_sigreturn(CPUArchState *env, int num)
{
int i = 0;
struct target_sigcontext *scp = get_int_arg(&i, env);
def-helper.h
+1 -1
View File
@@ -52,7 +52,7 @@
#define dh_ctype_tl target_ulong
#define dh_ctype_ptr void *
#define dh_ctype_void void
#define dh_ctype_env CPUState *
#define dh_ctype_env CPUArchState *
#define dh_ctype(t) dh_ctype_##t
/* We can't use glue() here because it falls foul of C preprocessor
disas.c
+2 -2
View File
@@ -339,7 +339,7 @@ const char *lookup_symbol(target_ulong orig_addr)
#include "monitor.h"
static int monitor_disas_is_physical;
static CPUState *monitor_disas_env;
static CPUArchState *monitor_disas_env;
static int
monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
@@ -363,7 +363,7 @@ monitor_fprintf(FILE *stream, const char *fmt, ...)
return 0;
}
void monitor_disas(Monitor *mon, CPUState *env,
void monitor_disas(Monitor *mon, CPUArchState *env,
target_ulong pc, int nb_insn, int is_physical, int flags)
{
int count, i;
disas.h
+1 -1
View File
@@ -8,7 +8,7 @@
void disas(FILE *out, void *code, unsigned long size);
void target_disas(FILE *out, target_ulong code, target_ulong size, int flags);
void monitor_disas(Monitor *mon, CPUState *env,
void monitor_disas(Monitor *mon, CPUArchState *env,
target_ulong pc, int nb_insn, int is_physical, int flags);
/* Look up symbol for debugging purpose. Returns "" if unknown. */
dyngen-exec.h
+2 -2
View File
@@ -61,10 +61,10 @@
#endif
#if defined(AREG0)
register CPUState *env asm(AREG0);
register CPUArchState *env asm(AREG0);
#else
/* TODO: Try env = cpu_single_env. */
extern CPUState *env;
extern CPUArchState *env;
#endif
#endif /* !defined(__DYNGEN_EXEC_H__) */
exec-all.h
+19 -19
View File
@@ -76,30 +76,30 @@ extern uint16_t gen_opc_icount[OPC_BUF_SIZE];
#include "qemu-log.h"
void gen_intermediate_code(CPUState *env, struct TranslationBlock *tb);
void gen_intermediate_code_pc(CPUState *env, struct TranslationBlock *tb);
void restore_state_to_opc(CPUState *env, struct TranslationBlock *tb,
void gen_intermediate_code(CPUArchState *env, struct TranslationBlock *tb);
void gen_intermediate_code_pc(CPUArchState *env, struct TranslationBlock *tb);
void restore_state_to_opc(CPUArchState *env, struct TranslationBlock *tb,
int pc_pos);
void cpu_gen_init(void);
int cpu_gen_code(CPUState *env, struct TranslationBlock *tb,
int cpu_gen_code(CPUArchState *env, struct TranslationBlock *tb,
int *gen_code_size_ptr);
int cpu_restore_state(struct TranslationBlock *tb,
CPUState *env, unsigned long searched_pc);
void cpu_resume_from_signal(CPUState *env1, void *puc);
void cpu_io_recompile(CPUState *env, void *retaddr);
TranslationBlock *tb_gen_code(CPUState *env,
CPUArchState *env, unsigned long searched_pc);
void cpu_resume_from_signal(CPUArchState *env1, void *puc);
void cpu_io_recompile(CPUArchState *env, void *retaddr);
TranslationBlock *tb_gen_code(CPUArchState *env,
target_ulong pc, target_ulong cs_base, int flags,
int cflags);
void cpu_exec_init(CPUState *env);
void QEMU_NORETURN cpu_loop_exit(CPUState *env1);
void cpu_exec_init(CPUArchState *env);
void QEMU_NORETURN cpu_loop_exit(CPUArchState *env1);
int page_unprotect(target_ulong address, unsigned long pc, void *puc);
void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
int is_cpu_write_access);
void tlb_flush_page(CPUState *env, target_ulong addr);
void tlb_flush(CPUState *env, int flush_global);
void tlb_flush_page(CPUArchState *env, target_ulong addr);
void tlb_flush(CPUArchState *env, int flush_global);
#if !defined(CONFIG_USER_ONLY)
void tlb_set_page(CPUState *env, target_ulong vaddr,
void tlb_set_page(CPUArchState *env, target_ulong vaddr,
target_phys_addr_t paddr, int prot,
int mmu_idx, target_ulong size);
#endif
@@ -182,7 +182,7 @@ static inline unsigned int tb_phys_hash_func(tb_page_addr_t pc)
}
void tb_free(TranslationBlock *tb);
void tb_flush(CPUState *env);
void tb_flush(CPUArchState *env);
void tb_link_page(TranslationBlock *tb,
tb_page_addr_t phys_pc, tb_page_addr_t phys_page2);
void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
@@ -305,7 +305,7 @@ uint64_t io_mem_read(struct MemoryRegion *mr, target_phys_addr_t addr,
void io_mem_write(struct MemoryRegion *mr, target_phys_addr_t addr,
uint64_t value, unsigned size);
void tlb_fill(CPUState *env1, target_ulong addr, int is_write, int mmu_idx,
void tlb_fill(CPUArchState *env1, target_ulong addr, int is_write, int mmu_idx,
void *retaddr);
#include "softmmu_defs.h"
@@ -333,15 +333,15 @@ void tlb_fill(CPUState *env1, target_ulong addr, int is_write, int mmu_idx,
#endif
#if defined(CONFIG_USER_ONLY)
static inline tb_page_addr_t get_page_addr_code(CPUState *env1, target_ulong addr)
static inline tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr)
{
return addr;
}
#else
tb_page_addr_t get_page_addr_code(CPUState *env1, target_ulong addr);
tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr);
#endif
typedef void (CPUDebugExcpHandler)(CPUState *env);
typedef void (CPUDebugExcpHandler)(CPUArchState *env);
CPUDebugExcpHandler *cpu_set_debug_excp_handler(CPUDebugExcpHandler *handler);
@@ -353,7 +353,7 @@ extern volatile sig_atomic_t exit_request;
/* Deterministic execution requires that IO only be performed on the last
instruction of a TB so that interrupts take effect immediately. */
static inline int can_do_io(CPUState *env)
static inline int can_do_io(CPUArchState *env)
{
if (!use_icount) {
return 1;
exec.c
+57 -57
View File
@@ -123,10 +123,10 @@ static MemoryRegion io_mem_subpage_ram;
#endif
CPUState *first_cpu;
CPUArchState *first_cpu;
/* current CPU in the current thread. It is only valid inside
cpu_exec() */
DEFINE_TLS(CPUState *,cpu_single_env);
DEFINE_TLS(CPUArchState *,cpu_single_env);
/* 0 = Do not count executed instructions.
1 = Precise instruction counting.
2 = Adaptive rate instruction counting. */
@@ -509,7 +509,7 @@ static target_phys_addr_t section_addr(MemoryRegionSection *section,
}
static void tlb_protect_code(ram_addr_t ram_addr);
static void tlb_unprotect_code_phys(CPUState *env, ram_addr_t ram_addr,
static void tlb_unprotect_code_phys(CPUArchState *env, ram_addr_t ram_addr,
target_ulong vaddr);
#define mmap_lock() do { } while(0)
#define mmap_unlock() do { } while(0)
@@ -661,7 +661,7 @@ void cpu_exec_init_all(void)
static int cpu_common_post_load(void *opaque, int version_id)
{
CPUState *env = opaque;
CPUArchState *env = opaque;
/* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
version_id is increased. */
@@ -678,16 +678,16 @@ static const VMStateDescription vmstate_cpu_common = {
.minimum_version_id_old = 1,
.post_load = cpu_common_post_load,
.fields = (VMStateField []) {
VMSTATE_UINT32(halted, CPUState),
VMSTATE_UINT32(interrupt_request, CPUState),
VMSTATE_UINT32(halted, CPUArchState),
VMSTATE_UINT32(interrupt_request, CPUArchState),
VMSTATE_END_OF_LIST()
}
};
#endif
CPUState *qemu_get_cpu(int cpu)
CPUArchState *qemu_get_cpu(int cpu)
{
CPUState *env = first_cpu;
CPUArchState *env = first_cpu;
while (env) {
if (env->cpu_index == cpu)
@@ -698,9 +698,9 @@ CPUState *qemu_get_cpu(int cpu)
return env;
}
void cpu_exec_init(CPUState *env)
void cpu_exec_init(CPUArchState *env)
{
CPUState **penv;
CPUArchState **penv;
int cpu_index;
#if defined(CONFIG_USER_ONLY)
@@ -799,9 +799,9 @@ static void page_flush_tb(void)
/* flush all the translation blocks */
/* XXX: tb_flush is currently not thread safe */
void tb_flush(CPUState *env1)
void tb_flush(CPUArchState *env1)
{
CPUState *env;
CPUArchState *env;
#if defined(DEBUG_FLUSH)
printf("qemu: flush code_size=%ld nb_tbs=%d avg_tb_size=%ld\n",
(unsigned long)(code_gen_ptr - code_gen_buffer),
@@ -934,7 +934,7 @@ static inline void tb_reset_jump(TranslationBlock *tb, int n)
void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr)
{
CPUState *env;
CPUArchState *env;
PageDesc *p;
unsigned int h, n1;
tb_page_addr_t phys_pc;
@@ -1043,7 +1043,7 @@ static void build_page_bitmap(PageDesc *p)
}
}
TranslationBlock *tb_gen_code(CPUState *env,
TranslationBlock *tb_gen_code(CPUArchState *env,
target_ulong pc, target_ulong cs_base,
int flags, int cflags)
{
@@ -1090,7 +1090,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
int is_cpu_write_access)
{
TranslationBlock *tb, *tb_next, *saved_tb;
CPUState *env = cpu_single_env;
CPUArchState *env = cpu_single_env;
tb_page_addr_t tb_start, tb_end;
PageDesc *p;
int n;
@@ -1227,7 +1227,7 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr,
int n;
#ifdef TARGET_HAS_PRECISE_SMC
TranslationBlock *current_tb = NULL;
CPUState *env = cpu_single_env;
CPUArchState *env = cpu_single_env;
int current_tb_modified = 0;
target_ulong current_pc = 0;
target_ulong current_cs_base = 0;
@@ -1457,12 +1457,12 @@ static void tb_reset_jump_recursive(TranslationBlock *tb)
#if defined(TARGET_HAS_ICE)
#if defined(CONFIG_USER_ONLY)
static void breakpoint_invalidate(CPUState *env, target_ulong pc)
static void breakpoint_invalidate(CPUArchState *env, target_ulong pc)
{
tb_invalidate_phys_page_range(pc, pc + 1, 0);
}
#else
static void breakpoint_invalidate(CPUState *env, target_ulong pc)
static void breakpoint_invalidate(CPUArchState *env, target_ulong pc)
{
target_phys_addr_t addr;
ram_addr_t ram_addr;
@@ -1482,19 +1482,19 @@ static void breakpoint_invalidate(CPUState *env, target_ulong pc)
#endif /* TARGET_HAS_ICE */
#if defined(CONFIG_USER_ONLY)
void cpu_watchpoint_remove_all(CPUState *env, int mask)
void cpu_watchpoint_remove_all(CPUArchState *env, int mask)
{
}
int cpu_watchpoint_insert(CPUState *env, target_ulong addr, target_ulong len,
int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len,
int flags, CPUWatchpoint **watchpoint)
{
return -ENOSYS;
}
#else
/* Add a watchpoint. */
int cpu_watchpoint_insert(CPUState *env, target_ulong addr, target_ulong len,
int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len,
int flags, CPUWatchpoint **watchpoint)
{
target_ulong len_mask = ~(len - 1);
@@ -1527,7 +1527,7 @@ int cpu_watchpoint_insert(CPUState *env, target_ulong addr, target_ulong len,
}
/* Remove a specific watchpoint. */
int cpu_watchpoint_remove(CPUState *env, target_ulong addr, target_ulong len,
int cpu_watchpoint_remove(CPUArchState *env, target_ulong addr, target_ulong len,
int flags)
{
target_ulong len_mask = ~(len - 1);
@@ -1544,7 +1544,7 @@ int cpu_watchpoint_remove(CPUState *env, target_ulong addr, target_ulong len,
}
/* Remove a specific watchpoint by reference. */
void cpu_watchpoint_remove_by_ref(CPUState *env, CPUWatchpoint *watchpoint)
void cpu_watchpoint_remove_by_ref(CPUArchState *env, CPUWatchpoint *watchpoint)
{
QTAILQ_REMOVE(&env->watchpoints, watchpoint, entry);
@@ -1554,7 +1554,7 @@ void cpu_watchpoint_remove_by_ref(CPUState *env, CPUWatchpoint *watchpoint)
}
/* Remove all matching watchpoints. */
void cpu_watchpoint_remove_all(CPUState *env, int mask)
void cpu_watchpoint_remove_all(CPUArchState *env, int mask)
{
CPUWatchpoint *wp, *next;
@@ -1566,7 +1566,7 @@ void cpu_watchpoint_remove_all(CPUState *env, int mask)
#endif
/* Add a breakpoint. */
int cpu_breakpoint_insert(CPUState *env, target_ulong pc, int flags,
int cpu_breakpoint_insert(CPUArchState *env, target_ulong pc, int flags,
CPUBreakpoint **breakpoint)
{
#if defined(TARGET_HAS_ICE)
@@ -1594,7 +1594,7 @@ int cpu_breakpoint_insert(CPUState *env, target_ulong pc, int flags,
}
/* Remove a specific breakpoint. */
int cpu_breakpoint_remove(CPUState *env, target_ulong pc, int flags)
int cpu_breakpoint_remove(CPUArchState *env, target_ulong pc, int flags)
{
#if defined(TARGET_HAS_ICE)
CPUBreakpoint *bp;
@@ -1612,7 +1612,7 @@ int cpu_breakpoint_remove(CPUState *env, target_ulong pc, int flags)
}
/* Remove a specific breakpoint by reference. */
void cpu_breakpoint_remove_by_ref(CPUState *env, CPUBreakpoint *breakpoint)
void cpu_breakpoint_remove_by_ref(CPUArchState *env, CPUBreakpoint *breakpoint)
{
#if defined(TARGET_HAS_ICE)
QTAILQ_REMOVE(&env->breakpoints, breakpoint, entry);
@@ -1624,7 +1624,7 @@ void cpu_breakpoint_remove_by_ref(CPUState *env, CPUBreakpoint *breakpoint)
}
/* Remove all matching breakpoints. */
void cpu_breakpoint_remove_all(CPUState *env, int mask)
void cpu_breakpoint_remove_all(CPUArchState *env, int mask)
{
#if defined(TARGET_HAS_ICE)
CPUBreakpoint *bp, *next;
@@ -1638,7 +1638,7 @@ void cpu_breakpoint_remove_all(CPUState *env, int mask)
/* enable or disable single step mode. EXCP_DEBUG is returned by the
CPU loop after each instruction */
void cpu_single_step(CPUState *env, int enabled)
void cpu_single_step(CPUArchState *env, int enabled)
{
#if defined(TARGET_HAS_ICE)
if (env->singlestep_enabled != enabled) {
@@ -1694,7 +1694,7 @@ void cpu_set_log_filename(const char *filename)
cpu_set_log(loglevel);
}
static void cpu_unlink_tb(CPUState *env)
static void cpu_unlink_tb(CPUArchState *env)
{
/* FIXME: TB unchaining isn't SMP safe. For now just ignore the
problem and hope the cpu will stop of its own accord. For userspace
@@ -1716,7 +1716,7 @@ static void cpu_unlink_tb(CPUState *env)
#ifndef CONFIG_USER_ONLY
/* mask must never be zero, except for A20 change call */
static void tcg_handle_interrupt(CPUState *env, int mask)
static void tcg_handle_interrupt(CPUArchState *env, int mask)
{
int old_mask;
@@ -1747,19 +1747,19 @@ CPUInterruptHandler cpu_interrupt_handler = tcg_handle_interrupt;
#else /* CONFIG_USER_ONLY */
void cpu_interrupt(CPUState *env, int mask)
void cpu_interrupt(CPUArchState *env, int mask)
{
env->interrupt_request |= mask;
cpu_unlink_tb(env);
}
#endif /* CONFIG_USER_ONLY */
void cpu_reset_interrupt(CPUState *env, int mask)
void cpu_reset_interrupt(CPUArchState *env, int mask)
{
env->interrupt_request &= ~mask;
}
void cpu_exit(CPUState *env)
void cpu_exit(CPUArchState *env)
{
env->exit_request = 1;
cpu_unlink_tb(env);
@@ -1837,7 +1837,7 @@ int cpu_str_to_log_mask(const char *str)
return mask;
}
void cpu_abort(CPUState *env, const char *fmt, ...)
void cpu_abort(CPUArchState *env, const char *fmt, ...)
{
va_list ap;
va_list ap2;
@@ -1877,17 +1877,17 @@ void cpu_abort(CPUState *env, const char *fmt, ...)
abort();
}
CPUState *cpu_copy(CPUState *env)
CPUArchState *cpu_copy(CPUArchState *env)
{
CPUState *new_env = cpu_init(env->cpu_model_str);
CPUState *next_cpu = new_env->next_cpu;
CPUArchState *new_env = cpu_init(env->cpu_model_str);
CPUArchState *next_cpu = new_env->next_cpu;
int cpu_index = new_env->cpu_index;
#if defined(TARGET_HAS_ICE)
CPUBreakpoint *bp;
CPUWatchpoint *wp;
#endif
memcpy(new_env, env, sizeof(CPUState));
memcpy(new_env, env, sizeof(CPUArchState));
/* Preserve chaining and index. */
new_env->next_cpu = next_cpu;
@@ -1913,7 +1913,7 @@ CPUState *cpu_copy(CPUState *env)
#if !defined(CONFIG_USER_ONLY)
static inline void tlb_flush_jmp_cache(CPUState *env, target_ulong addr)
static inline void tlb_flush_jmp_cache(CPUArchState *env, target_ulong addr)
{
unsigned int i;
@@ -1947,7 +1947,7 @@ static CPUTLBEntry s_cputlb_empty_entry = {
* entries from the TLB at any time, so flushing more entries than
* required is only an efficiency issue, not a correctness issue.
*/
void tlb_flush(CPUState *env, int flush_global)
void tlb_flush(CPUArchState *env, int flush_global)
{
int i;
@@ -1984,7 +1984,7 @@ static inline void tlb_flush_entry(CPUTLBEntry *tlb_entry, target_ulong addr)
}
}
void tlb_flush_page(CPUState *env, target_ulong addr)
void tlb_flush_page(CPUArchState *env, target_ulong addr)
{
int i;
int mmu_idx;
@@ -2025,7 +2025,7 @@ static void tlb_protect_code(ram_addr_t ram_addr)
/* update the TLB so that writes in physical page 'phys_addr' are no longer
tested for self modifying code */
static void tlb_unprotect_code_phys(CPUState *env, ram_addr_t ram_addr,
static void tlb_unprotect_code_phys(CPUArchState *env, ram_addr_t ram_addr,
target_ulong vaddr)
{
cpu_physical_memory_set_dirty_flags(ram_addr, CODE_DIRTY_FLAG);
@@ -2047,7 +2047,7 @@ static inline void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry,
void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end,
int dirty_flags)
{
CPUState *env;
CPUArchState *env;
unsigned long length, start1;
int i;
@@ -2102,7 +2102,7 @@ static inline void tlb_update_dirty(CPUTLBEntry *tlb_entry)
}
/* update the TLB according to the current state of the dirty bits */
void cpu_tlb_update_dirty(CPUState *env)
void cpu_tlb_update_dirty(CPUArchState *env)
{
int i;
int mmu_idx;
@@ -2120,7 +2120,7 @@ static inline void tlb_set_dirty1(CPUTLBEntry *tlb_entry, target_ulong vaddr)
/* update the TLB corresponding to virtual page vaddr
so that it is no longer dirty */
static inline void tlb_set_dirty(CPUState *env, target_ulong vaddr)
static inline void tlb_set_dirty(CPUArchState *env, target_ulong vaddr)
{
int i;
int mmu_idx;
@@ -2133,7 +2133,7 @@ static inline void tlb_set_dirty(CPUState *env, target_ulong vaddr)
/* Our TLB does not support large pages, so remember the area covered by
large pages and trigger a full TLB flush if these are invalidated. */
static void tlb_add_large_page(CPUState *env, target_ulong vaddr,
static void tlb_add_large_page(CPUArchState *env, target_ulong vaddr,
target_ulong size)
{
target_ulong mask = ~(size - 1);
@@ -2174,7 +2174,7 @@ static bool is_ram_rom_romd(MemoryRegionSection *s)
/* Add a new TLB entry. At most one entry for a given virtual address
is permitted. Only a single TARGET_PAGE_SIZE region is mapped, the
supplied size is only used by tlb_flush_page. */
void tlb_set_page(CPUState *env, target_ulong vaddr,
void tlb_set_page(CPUArchState *env, target_ulong vaddr,
target_phys_addr_t paddr, int prot,
int mmu_idx, target_ulong size)
{
@@ -2277,11 +2277,11 @@ void tlb_set_page(CPUState *env, target_ulong vaddr,
#else
void tlb_flush(CPUState *env, int flush_global)
void tlb_flush(CPUArchState *env, int flush_global)
{
}
void tlb_flush_page(CPUState *env, target_ulong addr)
void tlb_flush_page(CPUArchState *env, target_ulong addr)
{
}
@@ -2542,7 +2542,7 @@ int page_unprotect(target_ulong address, unsigned long pc, void *puc)
return 0;
}
static inline void tlb_set_dirty(CPUState *env,
static inline void tlb_set_dirty(CPUArchState *env,
unsigned long addr, target_ulong vaddr)
{
}
@@ -3299,7 +3299,7 @@ static const MemoryRegionOps notdirty_mem_ops = {
/* Generate a debug exception if a watchpoint has been hit. */
static void check_watchpoint(int offset, int len_mask, int flags)
{
CPUState *env = cpu_single_env;
CPUArchState *env = cpu_single_env;
target_ulong pc, cs_base;
TranslationBlock *tb;
target_ulong vaddr;
@@ -3544,7 +3544,7 @@ static void core_begin(MemoryListener *listener)
static void core_commit(MemoryListener *listener)
{
CPUState *env;
CPUArchState *env;
/* since each CPU stores ram addresses in its TLB cache, we must
reset the modified entries */
@@ -3734,7 +3734,7 @@ MemoryRegion *get_system_io(void)
/* physical memory access (slow version, mainly for debug) */
#if defined(CONFIG_USER_ONLY)
int cpu_memory_rw_debug(CPUState *env, target_ulong addr,
int cpu_memory_rw_debug(CPUArchState *env, target_ulong addr,
uint8_t *buf, int len, int is_write)
{
int l, flags;
@@ -4440,7 +4440,7 @@ void stq_be_phys(target_phys_addr_t addr, uint64_t val)
}
/* virtual memory access for debug (includes writing to ROM) */
int cpu_memory_rw_debug(CPUState *env, target_ulong addr,
int cpu_memory_rw_debug(CPUArchState *env, target_ulong addr,
uint8_t *buf, int len, int is_write)
{
int l;
@@ -4471,7 +4471,7 @@ int cpu_memory_rw_debug(CPUState *env, target_ulong addr,
/* in deterministic execution mode, instructions doing device I/Os
must be at the end of the TB */
void cpu_io_recompile(CPUState *env, void *retaddr)
void cpu_io_recompile(CPUArchState *env, void *retaddr)
{
TranslationBlock *tb;
uint32_t n, cflags;
@@ -4585,7 +4585,7 @@ void dump_exec_info(FILE *f, fprintf_function cpu_fprintf)
/* NOTE: this function can trigger an exception */
/* NOTE2: the returned address is not exactly the physical address: it
is the offset relative to phys_ram_base */
tb_page_addr_t get_page_addr_code(CPUState *env1, target_ulong addr)
tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr)
{
int mmu_idx, page_index, pd;
void *p;
gdbstub.c
+50 -50
View File
@@ -42,7 +42,7 @@
#include "kvm.h"
#ifndef TARGET_CPU_MEMORY_RW_DEBUG
static inline int target_memory_rw_debug(CPUState *env, target_ulong addr,
static inline int target_memory_rw_debug(CPUArchState *env, target_ulong addr,
uint8_t *buf, int len, int is_write)
{
return cpu_memory_rw_debug(env, addr, buf, len, is_write);
@@ -287,9 +287,9 @@ enum RSState {
RS_SYSCALL,
};
typedef struct GDBState {
CPUState *c_cpu; /* current CPU for step/continue ops */
CPUState *g_cpu; /* current CPU for other ops */
CPUState *query_cpu; /* for q{f|s}ThreadInfo */
CPUArchState *c_cpu; /* current CPU for step/continue ops */
CPUArchState *g_cpu; /* current CPU for other ops */
CPUArchState *query_cpu; /* for q{f|s}ThreadInfo */
enum RSState state; /* parsing state */
char line_buf[MAX_PACKET_LENGTH];
int line_buf_index;
@@ -533,7 +533,7 @@ static const int gpr_map32[8] = { 0, 1, 2, 3, 4, 5, 6, 7 };
#define IDX_XMM_REGS (IDX_FP_REGS + 16)
#define IDX_MXCSR_REG (IDX_XMM_REGS + CPU_NB_REGS)
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_read_register(CPUX86State *env, uint8_t *mem_buf, int n)
{
if (n < CPU_NB_REGS) {
if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
@@ -590,7 +590,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
return 0;
}
static int cpu_x86_gdb_load_seg(CPUState *env, int sreg, uint8_t *mem_buf)
static int cpu_x86_gdb_load_seg(CPUX86State *env, int sreg, uint8_t *mem_buf)
{
uint16_t selector = ldl_p(mem_buf);
@@ -615,7 +615,7 @@ static int cpu_x86_gdb_load_seg(CPUState *env, int sreg, uint8_t *mem_buf)
return 4;
}
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_write_register(CPUX86State *env, uint8_t *mem_buf, int n)
{
uint32_t tmp;
@@ -703,7 +703,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
#define GDB_CORE_XML "power-core.xml"
#endif
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_read_register(CPUPPCState *env, uint8_t *mem_buf, int n)
{
if (n < 32) {
/* gprs */
@@ -740,7 +740,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
return 0;
}
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_write_register(CPUPPCState *env, uint8_t *mem_buf, int n)
{
if (n < 32) {
/* gprs */
@@ -801,7 +801,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
#define GET_REGA(val) GET_REGL(val)
#endif
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_read_register(CPUSPARCState *env, uint8_t *mem_buf, int n)
{
if (n < 8) {
/* g0..g7 */
@@ -860,7 +860,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
return 0;
}
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_write_register(CPUSPARCState *env, uint8_t *mem_buf, int n)
{
#if defined(TARGET_ABI32)
abi_ulong tmp;
@@ -944,7 +944,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
#define NUM_CORE_REGS 26
#define GDB_CORE_XML "arm-core.xml"
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_read_register(CPUARMState *env, uint8_t *mem_buf, int n)
{
if (n < 16) {
/* Core integer register. */
@@ -971,7 +971,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
return 0;
}
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_write_register(CPUARMState *env, uint8_t *mem_buf, int n)
{
uint32_t tmp;
@@ -1014,7 +1014,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
#define GDB_CORE_XML "cf-core.xml"
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_read_register(CPUM68KState *env, uint8_t *mem_buf, int n)
{
if (n < 8) {
/* D0-D7 */
@@ -1033,7 +1033,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
return 0;
}
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_write_register(CPUM68KState *env, uint8_t *mem_buf, int n)
{
uint32_t tmp;
@@ -1058,7 +1058,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
#define NUM_CORE_REGS 73
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_read_register(CPUMIPSState *env, uint8_t *mem_buf, int n)
{
if (n < 32) {
GET_REGL(env->active_tc.gpr[n]);
@@ -1104,7 +1104,7 @@ static unsigned int ieee_rm[] =
#define RESTORE_ROUNDING_MODE \
set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_write_register(CPUMIPSState *env, uint8_t *mem_buf, int n)
{
target_ulong tmp;
@@ -1163,7 +1163,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
#define NUM_CORE_REGS 59
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_read_register(CPUSH4State *env, uint8_t *mem_buf, int n)
{
if (n < 8) {
if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
@@ -1197,7 +1197,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
return 0;
}
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_write_register(CPUSH4State *env, uint8_t *mem_buf, int n)
{
uint32_t tmp;
@@ -1244,7 +1244,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
#define NUM_CORE_REGS (32 + 5)
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_read_register(CPUMBState *env, uint8_t *mem_buf, int n)
{
if (n < 32) {
GET_REG32(env->regs[n]);
@@ -1254,7 +1254,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
return 0;
}
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_write_register(CPUMBState *env, uint8_t *mem_buf, int n)
{
uint32_t tmp;
@@ -1275,7 +1275,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
#define NUM_CORE_REGS 49
static int
read_register_crisv10(CPUState *env, uint8_t *mem_buf, int n)
read_register_crisv10(CPUCRISState *env, uint8_t *mem_buf, int n)
{
if (n < 15) {
GET_REG32(env->regs[n]);
@@ -1307,7 +1307,7 @@ read_register_crisv10(CPUState *env, uint8_t *mem_buf, int n)
return 0;
}
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_read_register(CPUCRISState *env, uint8_t *mem_buf, int n)
{
uint8_t srs;
@@ -1337,7 +1337,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
return 0;
}
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_write_register(CPUCRISState *env, uint8_t *mem_buf, int n)
{
uint32_t tmp;
@@ -1370,7 +1370,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
#define NUM_CORE_REGS 67
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_read_register(CPUAlphaState *env, uint8_t *mem_buf, int n)
{
uint64_t val;
CPU_DoubleU d;
@@ -1404,7 +1404,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
GET_REGL(val);
}
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_write_register(CPUAlphaState *env, uint8_t *mem_buf, int n)
{
target_ulong tmp = ldtul_p(mem_buf);
CPU_DoubleU d;
@@ -1440,7 +1440,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
#define NUM_CORE_REGS S390_NUM_TOTAL_REGS
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_read_register(CPUS390XState *env, uint8_t *mem_buf, int n)
{
switch (n) {
case S390_PSWM_REGNUM: GET_REGL(env->psw.mask); break;
@@ -1464,7 +1464,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
return 0;
}
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_write_register(CPUS390XState *env, uint8_t *mem_buf, int n)
{
target_ulong tmpl;
uint32_t tmp32;
@@ -1494,7 +1494,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
#include "hw/lm32_pic.h"
#define NUM_CORE_REGS (32 + 7)
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_read_register(CPULM32State *env, uint8_t *mem_buf, int n)
{
if (n < 32) {
GET_REG32(env->regs[n]);
@@ -1527,7 +1527,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
return 0;
}
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_write_register(CPULM32State *env, uint8_t *mem_buf, int n)
{
uint32_t tmp;
@@ -1573,7 +1573,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
#define NUM_CORE_REGS (env->config->gdb_regmap.num_regs)
#define num_g_regs NUM_CORE_REGS
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_read_register(CPUXtensaState *env, uint8_t *mem_buf, int n)
{
const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
@@ -1610,7 +1610,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
}
}
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_write_register(CPUXtensaState *env, uint8_t *mem_buf, int n)
{
uint32_t tmp;
const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
@@ -1655,12 +1655,12 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
#define NUM_CORE_REGS 0
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_read_register(CPUArchState *env, uint8_t *mem_buf, int n)
{
return 0;
}
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
static int cpu_gdb_write_register(CPUArchState *env, uint8_t *mem_buf, int n)
{
return 0;
}
@@ -1736,7 +1736,7 @@ static const char *get_feature_xml(const char *p, const char **newp)
}
#endif
static int gdb_read_register(CPUState *env, uint8_t *mem_buf, int reg)
static int gdb_read_register(CPUArchState *env, uint8_t *mem_buf, int reg)
{
GDBRegisterState *r;
@@ -1751,7 +1751,7 @@ static int gdb_read_register(CPUState *env, uint8_t *mem_buf, int reg)
return 0;
}
static int gdb_write_register(CPUState *env, uint8_t *mem_buf, int reg)
static int gdb_write_register(CPUArchState *env, uint8_t *mem_buf, int reg)
{
GDBRegisterState *r;
@@ -1773,7 +1773,7 @@ static int gdb_write_register(CPUState *env, uint8_t *mem_buf, int reg)
gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
*/
void gdb_register_coprocessor(CPUState * env,
void gdb_register_coprocessor(CPUArchState * env,
gdb_reg_cb get_reg, gdb_reg_cb set_reg,
int num_regs, const char *xml, int g_pos)
{
@@ -1820,7 +1820,7 @@ static const int xlat_gdb_type[] = {
static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type)
{
CPUState *env;
CPUArchState *env;
int err = 0;
if (kvm_enabled())
@@ -1854,7 +1854,7 @@ static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type)
static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type)
{
CPUState *env;
CPUArchState *env;
int err = 0;
if (kvm_enabled())
@@ -1887,7 +1887,7 @@ static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type)
static void gdb_breakpoint_remove_all(void)
{
CPUState *env;
CPUArchState *env;
if (kvm_enabled()) {
kvm_remove_all_breakpoints(gdbserver_state->c_cpu);
@@ -1939,7 +1939,7 @@ static void gdb_set_cpu_pc(GDBState *s, target_ulong pc)
#endif
}
static inline int gdb_id(CPUState *env)
static inline int gdb_id(CPUArchState *env)
{
#if defined(CONFIG_USER_ONLY) && defined(CONFIG_USE_NPTL)
return env->host_tid;
@@ -1948,9 +1948,9 @@ static inline int gdb_id(CPUState *env)
#endif
}
static CPUState *find_cpu(uint32_t thread_id)
static CPUArchState *find_cpu(uint32_t thread_id)
{
CPUState *env;
CPUArchState *env;
for (env = first_cpu; env != NULL; env = env->next_cpu) {
if (gdb_id(env) == thread_id) {
@@ -1963,7 +1963,7 @@ static CPUState *find_cpu(uint32_t thread_id)
static int gdb_handle_packet(GDBState *s, const char *line_buf)
{
CPUState *env;
CPUArchState *env;
const char *p;
uint32_t thread;
int ch, reg_size, type, res;
@@ -2383,7 +2383,7 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf)
return RS_IDLE;
}
void gdb_set_stop_cpu(CPUState *env)
void gdb_set_stop_cpu(CPUArchState *env)
{
gdbserver_state->c_cpu = env;
gdbserver_state->g_cpu = env;
@@ -2393,7 +2393,7 @@ void gdb_set_stop_cpu(CPUState *env)
static void gdb_vm_state_change(void *opaque, int running, RunState state)
{
GDBState *s = gdbserver_state;
CPUState *env = s->c_cpu;
CPUArchState *env = s->c_cpu;
char buf[256];
const char *type;
int ret;
@@ -2602,7 +2602,7 @@ static void gdb_read_byte(GDBState *s, int ch)
}
/* Tell the remote gdb that the process has exited. */
void gdb_exit(CPUState *env, int code)
void gdb_exit(CPUArchState *env, int code)
{
GDBState *s;
char buf[4];
@@ -2642,7 +2642,7 @@ gdb_queuesig (void)
}
int
gdb_handlesig (CPUState *env, int sig)
gdb_handlesig (CPUArchState *env, int sig)
{
GDBState *s;
char buf[256];
@@ -2691,7 +2691,7 @@ gdb_handlesig (CPUState *env, int sig)
}
/* Tell the remote gdb that the process has exited due to SIG. */
void gdb_signalled(CPUState *env, int sig)
void gdb_signalled(CPUArchState *env, int sig)
{
GDBState *s;
char buf[4];
@@ -2787,7 +2787,7 @@ int gdbserver_start(int port)
}
/* Disable gdb stub for child processes. */
void gdbserver_fork(CPUState *env)
void gdbserver_fork(CPUArchState *env)
{
GDBState *s = gdbserver_state;
if (gdbserver_fd < 0 || s->fd < 0)

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