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target/arm: Implement GCSPOPCX

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Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20251008215613.300150-53-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson
2025-10-10 13:19:10 +01:00
committed by Peter Maydell
parent 75c8d645b9
commit a94b6aab8e
3 changed files with 74 additions and 0 deletions
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target/arm/cpregs-gcs.c
+17
View File
@@ -66,6 +66,19 @@ static CPAccessResult access_gcspushx(CPUARMState *env, const ARMCPRegInfo *ri,
return CP_ACCESS_OK;
}
static CPAccessResult access_gcspopcx(CPUARMState *env, const ARMCPRegInfo *ri,
bool isread)
{
/* Trap if lock not taken, and enabled. */
if (env->pstate & PSTATE_EXLOCK) {
int el = arm_current_el(env);
if (env->cp15.gcscr_el[el] & GCSCR_EXLOCKEN) {
return CP_ACCESS_EXLOCK;
}
}
return CP_ACCESS_OK;
}
static const ARMCPRegInfo gcs_reginfo[] = {
{ .name = "GCSCRE0_EL1", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 0, .crn = 2, .crm = 5, .opc2 = 2,
@@ -120,6 +133,10 @@ static const ARMCPRegInfo gcs_reginfo[] = {
.opc0 = 1, .opc1 = 0, .crn = 7, .crm = 7, .opc2 = 4,
.access = PL1_W, .accessfn = access_gcspushx, .fgt = FGT_NGCSEPP,
.type = ARM_CP_GCSPUSHX },
{ .name = "GCSPOPCX", .state = ARM_CP_STATE_AA64,
.opc0 = 1, .opc1 = 0, .crn = 7, .crm = 7, .opc2 = 5,
.access = PL1_W, .accessfn = access_gcspopcx, .fgt = FGT_NGCSEPP,
.type = ARM_CP_GCSPOPCX },
{ .name = "GCSPOPX", .state = ARM_CP_STATE_AA64,
.opc0 = 1, .opc1 = 0, .crn = 7, .crm = 7, .opc2 = 6,
.access = PL1_W, .type = ARM_CP_GCSPOPX },
target/arm/cpregs.h
+1
View File
@@ -52,6 +52,7 @@ enum {
ARM_CP_GCSPOPM = 0x0009,
ARM_CP_GCSPUSHX = 0x000a,
ARM_CP_GCSPOPX = 0x000b,
ARM_CP_GCSPOPCX = 0x000c,
/* Flag: reads produce resetvalue; writes ignored. */
ARM_CP_CONST = 1 << 4,
target/arm/tcg/translate-a64.c
+56
View File
@@ -2568,6 +2568,54 @@ static void gen_gcspushx(DisasContext *s)
clear_pstate_bits(PSTATE_EXLOCK);
}
static void gen_gcspopcx(DisasContext *s)
{
TCGv_i64 gcspr = cpu_gcspr[s->current_el];
int spsr_idx = aarch64_banked_spsr_index(s->current_el);
int spsr_off = offsetof(CPUARMState, banked_spsr[spsr_idx]);
int elr_off = offsetof(CPUARMState, elr_el[s->current_el]);
int gcscr_off = offsetof(CPUARMState, cp15.gcscr_el[s->current_el]);
int pstate_off = offsetof(CPUARMState, pstate);
int mmuidx = core_gcs_mem_index(s->mmu_idx);
MemOp mop = finalize_memop(s, MO_64 | MO_ALIGN);
TCGv_i64 addr = tcg_temp_new_i64();
TCGv_i64 tmp1 = tcg_temp_new_i64();
TCGv_i64 tmp2 = tcg_temp_new_i64();
TCGLabel *fail_label =
delay_exception(s, EXCP_UDEF, syn_gcs_data_check(GCS_IT_GCSPOPCX, 31));
/* The value at top-of-stack must be an exception token. */
tcg_gen_qemu_ld_i64(tmp1, gcspr, mmuidx, mop);
tcg_gen_brcondi_i64(TCG_COND_NE, tmp1, 0b1001, fail_label);
/* Validate in turn, ELR ... */
tcg_gen_addi_i64(addr, gcspr, 8);
tcg_gen_qemu_ld_i64(tmp1, addr, mmuidx, mop);
tcg_gen_ld_i64(tmp2, tcg_env, elr_off);
tcg_gen_brcond_i64(TCG_COND_NE, tmp1, tmp2, fail_label);
/* ... SPSR ... */
tcg_gen_addi_i64(addr, addr, 8);
tcg_gen_qemu_ld_i64(tmp1, addr, mmuidx, mop);
tcg_gen_ld_i64(tmp2, tcg_env, spsr_off);
tcg_gen_brcond_i64(TCG_COND_NE, tmp1, tmp2, fail_label);
/* ... and LR. */
tcg_gen_addi_i64(addr, addr, 8);
tcg_gen_qemu_ld_i64(tmp1, addr, mmuidx, mop);
tcg_gen_brcond_i64(TCG_COND_NE, tmp1, cpu_reg(s, 30), fail_label);
/* Writeback stack pointer after pop. */
tcg_gen_addi_i64(gcspr, addr, 8);
/* PSTATE.EXLOCK = GetCurrentEXLOCKEN(). */
tcg_gen_ld_i64(tmp1, tcg_env, gcscr_off);
tcg_gen_ld_i64(tmp2, tcg_env, pstate_off);
tcg_gen_shri_i64(tmp1, tmp1, ctz64(GCSCR_EXLOCKEN));
tcg_gen_deposit_i64(tmp2, tmp2, tmp1, ctz64(PSTATE_EXLOCK), 1);
tcg_gen_st_i64(tmp2, tcg_env, pstate_off);
}
static void gen_gcspopx(DisasContext *s)
{
TCGv_i64 gcspr = cpu_gcspr[s->current_el];
@@ -2920,6 +2968,14 @@ static void handle_sys(DisasContext *s, bool isread,
gen_gcspushx(s);
}
return;
case ARM_CP_GCSPOPCX:
/* Choose the CONSTRAINED UNPREDICTABLE for UNDEF. */
if (rt != 31) {
unallocated_encoding(s);
} else if (s->gcs_en) {
gen_gcspopcx(s);
}
return;
case ARM_CP_GCSPOPX:
/* Choose the CONSTRAINED UNPREDICTABLE for UNDEF. */
if (rt != 31) {