mirror of
https://github.com/izzy2lost/xemu.git
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Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: fixes, features, cleanups Mostly just fixes, cleanups all over the place. Some optimizations. More control over slot_reserved_mask. More feature bits supported for SVQ. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmRHQvAPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpQc0H/RD+RXy7IAnmhkdCyjj0hM8pftPTwCJfrSCW # DLHP4c5jiKO5ngUoAv3YJdM77TBCXlJn6gceeKBrzhGUTtJ7dTLC+Udeq/jW43EF # /E2ldLLbTNFyUqW8yX7D+EVio7Jy4zXTHpczKCF5vO7MaVWS/b3QdCpmjXpEHLNb # janv24vQHHgmRwK96uIdIauJJT8aqYW0arn1po8anxuFS8ok9Tf8LTEF5uBHokJP # MriTwMaqMgRK+4rzh+b6wc7QC5GqIr44gFrsfFYuNOUY0+BizvGvUAtMt+B/XZwt # OF4RSShUh2bhsQoYwgvShfEsR/vWwOl3yMAhcsB+wMgMzMG8MUQ= # =e8DF # -----END PGP SIGNATURE----- # gpg: Signature made Tue 25 Apr 2023 04:03:12 AM BST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [undefined] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (31 commits) hw/pci-bridge: Make PCIe and CXL PXB Devices inherit from TYPE_PXB_DEV hw/pci-bridge: pci_expander_bridge fix type in pxb_cxl_dev_reset() docs/specs: Convert pci-testdev.txt to rst docs/specs: Convert pci-serial.txt to rst docs/specs/pci-ids: Convert from txt to rST acpi: pcihp: allow repeating hot-unplug requests virtio: i2c: Check notifier helpers for VIRTIO_CONFIG_IRQ_IDX docs: Remove obsolete descriptions of SR-IOV support intel_iommu: refine iotlb hash calculation docs/cxl: Fix sentence MAINTAINERS: Add Eugenio Pérez as vhost-shadow-virtqueue reviewer tests: bios-tables-test: replace memset with initializer hw/acpi: limit warning on acpi table size to pc machines older than version 2.3 Add my old and new work email mapping and use work email to support acpi vhost-user-blk-server: notify client about disk resize pci: avoid accessing slot_reserved_mask directly outside of pci.c hw: Add compat machines for 8.1 hw/i386/amd_iommu: Factor amdvi_pci_realize out of amdvi_sysbus_realize hw/i386/amd_iommu: Set PCI static/const fields via PCIDeviceClass hw/i386/amd_iommu: Move capab_offset from AMDVIState to AMDVIPCIState ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
@@ -54,6 +54,7 @@ Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> <amarkovic@wavecomp.com>
|
||||
Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> <arikalo@wavecomp.com>
|
||||
Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> <aleksandar.rikalo@rt-rk.com>
|
||||
Alexander Graf <agraf@csgraf.de> <agraf@suse.de>
|
||||
Ani Sinha <anisinha@redhat.com> <ani@anisinha.ca>
|
||||
Anthony Liguori <anthony@codemonkey.ws> Anthony Liguori <aliguori@us.ibm.com>
|
||||
Christian Borntraeger <borntraeger@linux.ibm.com> <borntraeger@de.ibm.com>
|
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Damien Hedde <damien.hedde@dahe.fr> <damien.hedde@greensocs.com>
|
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|
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+10
-2
@@ -1895,7 +1895,7 @@ F: hw/pci/pcie_doe.c
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ACPI/SMBIOS
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M: Michael S. Tsirkin <mst@redhat.com>
|
||||
M: Igor Mammedov <imammedo@redhat.com>
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R: Ani Sinha <ani@anisinha.ca>
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R: Ani Sinha <anisinha@redhat.com>
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S: Supported
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F: include/hw/acpi/*
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F: include/hw/firmware/smbios.h
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@@ -1932,7 +1932,7 @@ F: hw/acpi/viot.c
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F: hw/acpi/viot.h
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ACPI/AVOCADO/BIOSBITS
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M: Ani Sinha <ani@anisinha.ca>
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M: Ani Sinha <anisinha@redhat.com>
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M: Michael S. Tsirkin <mst@redhat.com>
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S: Supported
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F: tests/avocado/acpi-bits/*
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@@ -2076,6 +2076,10 @@ F: backends/vhost-user.c
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F: include/sysemu/vhost-user-backend.h
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F: subprojects/libvhost-user/
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vhost-shadow-virtqueue
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R: Eugenio Pérez <eperezma@redhat.com>
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F: hw/virtio/vhost-shadow-virtqueue.*
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virtio
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||||
M: Michael S. Tsirkin <mst@redhat.com>
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S: Supported
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||||
@@ -3368,6 +3372,10 @@ F: hw/i386/intel_iommu.c
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F: hw/i386/intel_iommu_internal.h
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F: include/hw/i386/intel_iommu.h
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||||
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AMD-Vi Emulation
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S: Orphan
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F: hw/i386/amd_iommu.?
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OpenSBI Firmware
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||||
M: Bin Meng <bmeng.cn@gmail.com>
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||||
S: Supported
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||||
|
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@@ -10,6 +10,7 @@
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* later. See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu/error-report.h"
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#include "block/block.h"
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#include "subprojects/libvhost-user/libvhost-user.h" /* only for the type definitions */
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#include "standard-headers/linux/virtio_blk.h"
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@@ -251,6 +252,27 @@ static void vu_blk_exp_request_shutdown(BlockExport *exp)
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vhost_user_server_stop(&vexp->vu_server);
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}
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static void vu_blk_exp_resize(void *opaque)
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{
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VuBlkExport *vexp = opaque;
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BlockDriverState *bs = blk_bs(vexp->handler.blk);
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int64_t new_size = bdrv_getlength(bs);
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|
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if (new_size < 0) {
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error_printf("Failed to get length of block node '%s'",
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bdrv_get_node_name(bs));
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return;
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}
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vexp->blkcfg.capacity = cpu_to_le64(new_size >> VIRTIO_BLK_SECTOR_BITS);
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vu_config_change_msg(&vexp->vu_server.vu_dev);
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}
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static const BlockDevOps vu_blk_dev_ops = {
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.resize_cb = vu_blk_exp_resize,
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};
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|
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static int vu_blk_exp_create(BlockExport *exp, BlockExportOptions *opts,
|
||||
Error **errp)
|
||||
{
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||||
@@ -292,6 +314,8 @@ static int vu_blk_exp_create(BlockExport *exp, BlockExportOptions *opts,
|
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blk_add_aio_context_notifier(exp->blk, blk_aio_attached, blk_aio_detach,
|
||||
vexp);
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||||
blk_set_dev_ops(exp->blk, &vu_blk_dev_ops, vexp);
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|
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if (!vhost_user_server_start(&vexp->vu_server, vu_opts->addr, exp->ctx,
|
||||
num_queues, &vu_blk_iface, errp)) {
|
||||
blk_remove_aio_context_notifier(exp->blk, blk_aio_attached,
|
||||
|
||||
@@ -135,7 +135,7 @@ Under ``tests/avocado/`` as the root we have:
|
||||
(c) They need not be loaded by avocado framework when running tests.
|
||||
|
||||
|
||||
Author: Ani Sinha <ani@anisinha.ca>
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||||
Author: Ani Sinha <anisinha@redhat.com>
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||||
|
||||
References:
|
||||
-----------
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||||
|
||||
+39
-21
@@ -130,18 +130,8 @@ A vring address description
|
||||
Note that a ring address is an IOVA if ``VIRTIO_F_IOMMU_PLATFORM`` has
|
||||
been negotiated. Otherwise it is a user address.
|
||||
|
||||
Memory regions description
|
||||
^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
+-------------+---------+---------+-----+---------+
|
||||
| num regions | padding | region0 | ... | region7 |
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||||
+-------------+---------+---------+-----+---------+
|
||||
|
||||
:num regions: a 32-bit number of regions
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||||
|
||||
:padding: 32-bit
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||||
|
||||
A region is:
|
||||
Memory region description
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||||
^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
+---------------+------+--------------+-------------+
|
||||
| guest address | size | user address | mmap offset |
|
||||
@@ -155,22 +145,49 @@ A region is:
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||||
|
||||
:mmap offset: 64-bit offset where region starts in the mapped memory
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||||
|
||||
When the ``VHOST_USER_PROTOCOL_F_XEN_MMAP`` protocol feature has been
|
||||
successfully negotiated, the memory region description contains two extra
|
||||
fields at the end.
|
||||
|
||||
+---------------+------+--------------+-------------+----------------+-------+
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||||
| guest address | size | user address | mmap offset | xen mmap flags | domid |
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||||
+---------------+------+--------------+-------------+----------------+-------+
|
||||
|
||||
:xen mmap flags: 32-bit bit field
|
||||
|
||||
- Bit 0 is set for Xen foreign memory mapping.
|
||||
- Bit 1 is set for Xen grant memory mapping.
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||||
- Bit 8 is set if the memory region can not be mapped in advance, and memory
|
||||
areas within this region must be mapped / unmapped only when required by the
|
||||
back-end. The back-end shouldn't try to map the entire region at once, as the
|
||||
front-end may not allow it. The back-end should rather map only the required
|
||||
amount of memory at once and unmap it after it is used.
|
||||
|
||||
:domid: a 32-bit Xen hypervisor specific domain id.
|
||||
|
||||
Single memory region description
|
||||
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
+---------+---------------+------+--------------+-------------+
|
||||
| padding | guest address | size | user address | mmap offset |
|
||||
+---------+---------------+------+--------------+-------------+
|
||||
+---------+--------+
|
||||
| padding | region |
|
||||
+---------+--------+
|
||||
|
||||
:padding: 64-bit
|
||||
|
||||
:guest address: a 64-bit guest address of the region
|
||||
A region is represented by Memory region description.
|
||||
|
||||
:size: a 64-bit size
|
||||
Multiple Memory regions description
|
||||
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
:user address: a 64-bit user address
|
||||
+-------------+---------+---------+-----+---------+
|
||||
| num regions | padding | region0 | ... | region7 |
|
||||
+-------------+---------+---------+-----+---------+
|
||||
|
||||
:mmap offset: 64-bit offset where region starts in the mapped memory
|
||||
:num regions: a 32-bit number of regions
|
||||
|
||||
:padding: 32-bit
|
||||
|
||||
A region is represented by Memory region description.
|
||||
|
||||
Log description
|
||||
^^^^^^^^^^^^^^^
|
||||
@@ -867,6 +884,7 @@ Protocol features
|
||||
#define VHOST_USER_PROTOCOL_F_INBAND_NOTIFICATIONS 14
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||||
#define VHOST_USER_PROTOCOL_F_CONFIGURE_MEM_SLOTS 15
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||||
#define VHOST_USER_PROTOCOL_F_STATUS 16
|
||||
#define VHOST_USER_PROTOCOL_F_XEN_MMAP 17
|
||||
|
||||
Front-end message types
|
||||
-----------------------
|
||||
@@ -952,8 +970,8 @@ Front-end message types
|
||||
``VHOST_USER_SET_MEM_TABLE``
|
||||
:id: 5
|
||||
:equivalent ioctl: ``VHOST_SET_MEM_TABLE``
|
||||
:request payload: memory regions description
|
||||
:reply payload: (postcopy only) memory regions description
|
||||
:request payload: multiple memory regions description
|
||||
:reply payload: (postcopy only) multiple memory regions description
|
||||
|
||||
Sets the memory map regions on the back-end so it can translate the
|
||||
vring addresses. In the ancillary data there is an array of file
|
||||
|
||||
+1
-4
@@ -9,10 +9,7 @@ virtual functions (VFs) for the main purpose of eliminating software
|
||||
overhead in I/O from virtual machines.
|
||||
|
||||
QEMU now implements the basic common functionality to enable an emulated device
|
||||
to support SR/IOV. Yet no fully implemented devices exists in QEMU, but a
|
||||
proof-of-concept hack of the Intel igb can be found here:
|
||||
|
||||
git://github.com/knuto/qemu.git sriov_patches_v5
|
||||
to support SR/IOV.
|
||||
|
||||
Implementation
|
||||
==============
|
||||
|
||||
@@ -8,6 +8,9 @@ guest hardware that is specific to QEMU.
|
||||
.. toctree::
|
||||
:maxdepth: 2
|
||||
|
||||
pci-ids
|
||||
pci-serial
|
||||
pci-testdev
|
||||
ppc-xive
|
||||
ppc-spapr-xive
|
||||
ppc-spapr-numa
|
||||
|
||||
@@ -0,0 +1,98 @@
|
||||
================
|
||||
PCI IDs for QEMU
|
||||
================
|
||||
|
||||
Red Hat, Inc. donates a part of its device ID range to QEMU, to be used for
|
||||
virtual devices. The vendor IDs are 1af4 (formerly Qumranet ID) and 1b36.
|
||||
|
||||
Contact Gerd Hoffmann <kraxel@redhat.com> to get a device ID assigned
|
||||
for your devices.
|
||||
|
||||
1af4 vendor ID
|
||||
--------------
|
||||
|
||||
The 1000 -> 10ff device ID range is used as follows for virtio-pci devices.
|
||||
Note that this allocation is separate from the virtio device IDs, which are
|
||||
maintained as part of the virtio specification.
|
||||
|
||||
1af4:1000
|
||||
network device (legacy)
|
||||
1af4:1001
|
||||
block device (legacy)
|
||||
1af4:1002
|
||||
balloon device (legacy)
|
||||
1af4:1003
|
||||
console device (legacy)
|
||||
1af4:1004
|
||||
SCSI host bus adapter device (legacy)
|
||||
1af4:1005
|
||||
entropy generator device (legacy)
|
||||
1af4:1009
|
||||
9p filesystem device (legacy)
|
||||
1af4:1012
|
||||
vsock device (bug compatibility)
|
||||
|
||||
1af4:1040 to 1af4:10ef
|
||||
ID range for modern virtio devices. The PCI device
|
||||
ID is calculated from the virtio device ID by adding the
|
||||
0x1040 offset. The virtio IDs are defined in the virtio
|
||||
specification. The Linux kernel has a header file with
|
||||
defines for all virtio IDs (``linux/virtio_ids.h``); QEMU has a
|
||||
copy in ``include/standard-headers/``.
|
||||
|
||||
1af4:10f0 to 1a4f:10ff
|
||||
Available for experimental usage without registration. Must get
|
||||
official ID when the code leaves the test lab (i.e. when seeking
|
||||
upstream merge or shipping a distro/product) to avoid conflicts.
|
||||
|
||||
1af4:1100
|
||||
Used as PCI Subsystem ID for existing hardware devices emulated
|
||||
by QEMU.
|
||||
|
||||
1af4:1110
|
||||
ivshmem device (shared memory, ``docs/specs/ivshmem-spec.txt``)
|
||||
|
||||
All other device IDs are reserved.
|
||||
|
||||
1b36 vendor ID
|
||||
--------------
|
||||
|
||||
The 0000 -> 00ff device ID range is used as follows for QEMU-specific
|
||||
PCI devices (other than virtio):
|
||||
|
||||
1b36:0001
|
||||
PCI-PCI bridge
|
||||
1b36:0002
|
||||
PCI serial port (16550A) adapter (:doc:`pci-serial`)
|
||||
1b36:0003
|
||||
PCI Dual-port 16550A adapter (:doc:`pci-serial`)
|
||||
1b36:0004
|
||||
PCI Quad-port 16550A adapter (:doc:`pci-serial`)
|
||||
1b36:0005
|
||||
PCI test device (:doc:`pci-testdev`)
|
||||
1b36:0006
|
||||
PCI Rocker Ethernet switch device
|
||||
1b36:0007
|
||||
PCI SD Card Host Controller Interface (SDHCI)
|
||||
1b36:0008
|
||||
PCIe host bridge
|
||||
1b36:0009
|
||||
PCI Expander Bridge (-device pxb)
|
||||
1b36:000a
|
||||
PCI-PCI bridge (multiseat)
|
||||
1b36:000b
|
||||
PCIe Expander Bridge (-device pxb-pcie)
|
||||
1b36:000d
|
||||
PCI xhci usb host adapter
|
||||
1b36:000f
|
||||
mdpy (mdev sample device), ``linux/samples/vfio-mdev/mdpy.c``
|
||||
1b36:0010
|
||||
PCIe NVMe device (``-device nvme``)
|
||||
1b36:0011
|
||||
PCI PVPanic device (``-device pvpanic-pci``)
|
||||
1b36:0012
|
||||
PCI ACPI ERST device (``-device acpi-erst``)
|
||||
|
||||
All these devices are documented in :doc:`index`.
|
||||
|
||||
The 0100 device ID is used for the QXL video card device.
|
||||
@@ -1,70 +0,0 @@
|
||||
|
||||
PCI IDs for qemu
|
||||
================
|
||||
|
||||
Red Hat, Inc. donates a part of its device ID range to qemu, to be used for
|
||||
virtual devices. The vendor IDs are 1af4 (formerly Qumranet ID) and 1b36.
|
||||
|
||||
Contact Gerd Hoffmann <kraxel@redhat.com> to get a device ID assigned
|
||||
for your devices.
|
||||
|
||||
1af4 vendor ID
|
||||
--------------
|
||||
|
||||
The 1000 -> 10ff device ID range is used as follows for virtio-pci devices.
|
||||
Note that this allocation separate from the virtio device IDs, which are
|
||||
maintained as part of the virtio specification.
|
||||
|
||||
1af4:1000 network device (legacy)
|
||||
1af4:1001 block device (legacy)
|
||||
1af4:1002 balloon device (legacy)
|
||||
1af4:1003 console device (legacy)
|
||||
1af4:1004 SCSI host bus adapter device (legacy)
|
||||
1af4:1005 entropy generator device (legacy)
|
||||
1af4:1009 9p filesystem device (legacy)
|
||||
1af4:1012 vsock device (bug compatibility)
|
||||
|
||||
1af4:1040 Start of ID range for modern virtio devices. The PCI device
|
||||
to ID is calculated from the virtio device ID by adding the
|
||||
1af4:10ef 0x1040 offset. The virtio IDs are defined in the virtio
|
||||
specification. The Linux kernel has a header file with
|
||||
defines for all virtio IDs (linux/virtio_ids.h), qemu has a
|
||||
copy in include/standard-headers/.
|
||||
|
||||
1af4:10f0 Available for experimental usage without registration. Must get
|
||||
to official ID when the code leaves the test lab (i.e. when seeking
|
||||
1af4:10ff upstream merge or shipping a distro/product) to avoid conflicts.
|
||||
|
||||
1af4:1100 Used as PCI Subsystem ID for existing hardware devices emulated
|
||||
by qemu.
|
||||
|
||||
1af4:1110 ivshmem device (shared memory, docs/specs/ivshmem-spec.txt)
|
||||
|
||||
All other device IDs are reserved.
|
||||
|
||||
1b36 vendor ID
|
||||
--------------
|
||||
|
||||
The 0000 -> 00ff device ID range is used as follows for QEMU-specific
|
||||
PCI devices (other than virtio):
|
||||
|
||||
1b36:0001 PCI-PCI bridge
|
||||
1b36:0002 PCI serial port (16550A) adapter (docs/specs/pci-serial.txt)
|
||||
1b36:0003 PCI Dual-port 16550A adapter (docs/specs/pci-serial.txt)
|
||||
1b36:0004 PCI Quad-port 16550A adapter (docs/specs/pci-serial.txt)
|
||||
1b36:0005 PCI test device (docs/specs/pci-testdev.txt)
|
||||
1b36:0006 PCI Rocker Ethernet switch device
|
||||
1b36:0007 PCI SD Card Host Controller Interface (SDHCI)
|
||||
1b36:0008 PCIe host bridge
|
||||
1b36:0009 PCI Expander Bridge (-device pxb)
|
||||
1b36:000a PCI-PCI bridge (multiseat)
|
||||
1b36:000b PCIe Expander Bridge (-device pxb-pcie)
|
||||
1b36:000d PCI xhci usb host adapter
|
||||
1b36:000f mdpy (mdev sample device), linux/samples/vfio-mdev/mdpy.c
|
||||
1b36:0010 PCIe NVMe device (-device nvme)
|
||||
1b36:0011 PCI PVPanic device (-device pvpanic-pci)
|
||||
1b36:0012 PCI ACPI ERST device (-device acpi-erst)
|
||||
|
||||
All these devices are documented in docs/specs.
|
||||
|
||||
The 0100 device ID is used for the QXL video card device.
|
||||
@@ -0,0 +1,37 @@
|
||||
=======================
|
||||
QEMU PCI serial devices
|
||||
=======================
|
||||
|
||||
QEMU implements some PCI serial devices which are simple PCI
|
||||
wrappers around one or more 16550 UARTs.
|
||||
|
||||
There is one single-port variant and two multiport-variants. Linux
|
||||
guests work out-of-the box with all cards. There is a Windows inf file
|
||||
(``docs/qemupciserial.inf``) to set up the cards in Windows guests.
|
||||
|
||||
|
||||
Single-port card
|
||||
----------------
|
||||
|
||||
Name:
|
||||
``pci-serial``
|
||||
PCI ID:
|
||||
1b36:0002
|
||||
PCI Region 0:
|
||||
IO bar, 8 bytes long, with the 16550 UART mapped to it.
|
||||
Interrupt:
|
||||
Wired to pin A.
|
||||
|
||||
|
||||
Multiport cards
|
||||
---------------
|
||||
|
||||
Name:
|
||||
``pci-serial-2x``, ``pci-serial-4x``
|
||||
PCI ID:
|
||||
1b36:0003 (``-2x``) and 1b36:0004 (``-4x``)
|
||||
PCI Region 0:
|
||||
IO bar, with two or four 16550 UARTs mapped after each other.
|
||||
The first is at offset 0, the second at offset 8, and so on.
|
||||
Interrupt:
|
||||
Wired to pin A.
|
||||
@@ -1,34 +0,0 @@
|
||||
|
||||
QEMU pci serial devices
|
||||
=======================
|
||||
|
||||
There is one single-port variant and two muliport-variants. Linux
|
||||
guests out-of-the box with all cards. There is a Windows inf file
|
||||
(docs/qemupciserial.inf) to setup the single-port card in Windows
|
||||
guests.
|
||||
|
||||
|
||||
single-port card
|
||||
----------------
|
||||
|
||||
Name: pci-serial
|
||||
PCI ID: 1b36:0002
|
||||
|
||||
PCI Region 0:
|
||||
IO bar, 8 bytes long, with the 16550 uart mapped to it.
|
||||
Interrupt is wired to pin A.
|
||||
|
||||
|
||||
multiport cards
|
||||
---------------
|
||||
|
||||
Name: pci-serial-2x
|
||||
PCI ID: 1b36:0003
|
||||
|
||||
Name: pci-serial-4x
|
||||
PCI ID: 1b36:0004
|
||||
|
||||
PCI Region 0:
|
||||
IO bar, with two/four 16550 uart mapped after each other.
|
||||
The first is at offset 0, second at offset 8, ...
|
||||
Interrupt is wired to pin A.
|
||||
@@ -0,0 +1,39 @@
|
||||
====================
|
||||
QEMU PCI test device
|
||||
====================
|
||||
|
||||
``pci-testdev`` is a device used for testing low level IO.
|
||||
|
||||
The device implements up to three BARs: BAR0, BAR1 and BAR2.
|
||||
Each of BAR 0+1 can be memory or IO. Guests must detect
|
||||
BAR types and act accordingly.
|
||||
|
||||
BAR 0+1 size is up to 4K bytes each.
|
||||
BAR 0+1 starts with the following header:
|
||||
|
||||
.. code-block:: c
|
||||
|
||||
typedef struct PCITestDevHdr {
|
||||
uint8_t test; /* write-only, starts a given test number */
|
||||
uint8_t width_type; /*
|
||||
* read-only, type and width of access for a given test.
|
||||
* 1,2,4 for byte,word or long write.
|
||||
* any other value if test not supported on this BAR
|
||||
*/
|
||||
uint8_t pad0[2];
|
||||
uint32_t offset; /* read-only, offset in this BAR for a given test */
|
||||
uint32_t data; /* read-only, data to use for a given test */
|
||||
uint32_t count; /* for debugging. number of writes detected. */
|
||||
uint8_t name[]; /* for debugging. 0-terminated ASCII string. */
|
||||
} PCITestDevHdr;
|
||||
|
||||
All registers are little endian.
|
||||
|
||||
The device is expected to always implement tests 0 to N on each BAR, and to add new
|
||||
tests with higher numbers. In this way a guest can scan test numbers until it
|
||||
detects an access type that it does not support on this BAR, then stop.
|
||||
|
||||
BAR2 is a 64bit memory BAR, without backing storage. It is disabled
|
||||
by default and can be enabled using the ``membar=<size>`` property. This
|
||||
can be used to test whether guests handle PCI BARs of a specific
|
||||
(possibly quite large) size correctly.
|
||||
@@ -1,31 +0,0 @@
|
||||
pci-test is a device used for testing low level IO
|
||||
|
||||
device implements up to three BARs: BAR0, BAR1 and BAR2.
|
||||
Each of BAR 0+1 can be memory or IO. Guests must detect
|
||||
BAR types and act accordingly.
|
||||
|
||||
BAR 0+1 size is up to 4K bytes each.
|
||||
BAR 0+1 starts with the following header:
|
||||
|
||||
typedef struct PCITestDevHdr {
|
||||
uint8_t test; <- write-only, starts a given test number
|
||||
uint8_t width_type; <- read-only, type and width of access for a given test.
|
||||
1,2,4 for byte,word or long write.
|
||||
any other value if test not supported on this BAR
|
||||
uint8_t pad0[2];
|
||||
uint32_t offset; <- read-only, offset in this BAR for a given test
|
||||
uint32_t data; <- read-only, data to use for a given test
|
||||
uint32_t count; <- for debugging. number of writes detected.
|
||||
uint8_t name[]; <- for debugging. 0-terminated ASCII string.
|
||||
} PCITestDevHdr;
|
||||
|
||||
All registers are little endian.
|
||||
|
||||
device is expected to always implement tests 0 to N on each BAR, and to add new
|
||||
tests with higher numbers. In this way a guest can scan test numbers until it
|
||||
detects an access type that it does not support on this BAR, then stop.
|
||||
|
||||
BAR2 is a 64bit memory bar, without backing storage. It is disabled
|
||||
by default and can be enabled using the membar=<size> property. This
|
||||
can be used to test whether guests handle pci bars of a specific
|
||||
(possibly quite large) size correctly.
|
||||
+6
-5
@@ -30,9 +30,10 @@
|
||||
#include "qapi/error.h"
|
||||
#include "qemu/uuid.h"
|
||||
|
||||
static void cedt_build_chbs(GArray *table_data, PXBDev *cxl)
|
||||
static void cedt_build_chbs(GArray *table_data, PXBCXLDev *cxl)
|
||||
{
|
||||
SysBusDevice *sbd = SYS_BUS_DEVICE(cxl->cxl.cxl_host_bridge);
|
||||
PXBDev *pxb = PXB_DEV(cxl);
|
||||
SysBusDevice *sbd = SYS_BUS_DEVICE(cxl->cxl_host_bridge);
|
||||
struct MemoryRegion *mr = sbd->mmio[0].memory;
|
||||
|
||||
/* Type */
|
||||
@@ -45,7 +46,7 @@ static void cedt_build_chbs(GArray *table_data, PXBDev *cxl)
|
||||
build_append_int_noprefix(table_data, 32, 2);
|
||||
|
||||
/* UID - currently equal to bus number */
|
||||
build_append_int_noprefix(table_data, cxl->bus_nr, 4);
|
||||
build_append_int_noprefix(table_data, pxb->bus_nr, 4);
|
||||
|
||||
/* Version */
|
||||
build_append_int_noprefix(table_data, 1, 4);
|
||||
@@ -112,7 +113,7 @@ static void cedt_build_cfmws(GArray *table_data, CXLState *cxls)
|
||||
/* Host Bridge List (list of UIDs - currently bus_nr) */
|
||||
for (i = 0; i < fw->num_targets; i++) {
|
||||
g_assert(fw->target_hbs[i]);
|
||||
build_append_int_noprefix(table_data, fw->target_hbs[i]->bus_nr, 4);
|
||||
build_append_int_noprefix(table_data, PXB_DEV(fw->target_hbs[i])->bus_nr, 4);
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -121,7 +122,7 @@ static int cxl_foreach_pxb_hb(Object *obj, void *opaque)
|
||||
{
|
||||
Aml *cedt = opaque;
|
||||
|
||||
if (object_dynamic_cast(obj, TYPE_PXB_CXL_DEVICE)) {
|
||||
if (object_dynamic_cast(obj, TYPE_PXB_CXL_DEV)) {
|
||||
cedt_build_chbs(cedt->buf, PXB_CXL_DEV(obj));
|
||||
}
|
||||
|
||||
|
||||
@@ -357,6 +357,16 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
|
||||
* acpi_pcihp_eject_slot() when the operation is completed.
|
||||
*/
|
||||
pdev->qdev.pending_deleted_event = true;
|
||||
/* if unplug was requested before OSPM is initialized,
|
||||
* linux kernel will clear GPE0.sts[] bits during boot, which effectively
|
||||
* hides unplug event. And than followup qmp_device_del() calls remain
|
||||
* blocked by above flag permanently.
|
||||
* Unblock qmp_device_del() by setting expire limit, so user can
|
||||
* repeat unplug request later when OSPM has been booted.
|
||||
*/
|
||||
pdev->qdev.pending_deleted_expires_ms =
|
||||
qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL); /* 1 msec */
|
||||
|
||||
s->acpi_pcihp_pci_status[bsel].down |= (1U << slot);
|
||||
acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
|
||||
}
|
||||
|
||||
@@ -25,7 +25,7 @@
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/* see docs/specs/pci-serial.txt */
|
||||
/* see docs/specs/pci-serial.rst */
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "qapi/error.h"
|
||||
|
||||
@@ -23,7 +23,7 @@
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/* see docs/specs/pci-serial.txt */
|
||||
/* see docs/specs/pci-serial.rst */
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "qapi/error.h"
|
||||
|
||||
+2
-2
@@ -84,7 +84,7 @@ void cxl_fmws_link_targets(CXLState *cxl_state, Error **errp)
|
||||
bool ambig;
|
||||
|
||||
o = object_resolve_path_type(fw->targets[i],
|
||||
TYPE_PXB_CXL_DEVICE,
|
||||
TYPE_PXB_CXL_DEV,
|
||||
&ambig);
|
||||
if (!o) {
|
||||
error_setg(errp, "Could not resolve CXLFM target %s",
|
||||
@@ -141,7 +141,7 @@ static PCIDevice *cxl_cfmws_find_device(CXLFixedWindow *fw, hwaddr addr)
|
||||
addr += fw->base;
|
||||
|
||||
rb_index = (addr / cxl_decode_ig(fw->enc_int_gran)) % fw->num_targets;
|
||||
hb = PCI_HOST_BRIDGE(fw->target_hbs[rb_index]->cxl.cxl_host_bridge);
|
||||
hb = PCI_HOST_BRIDGE(fw->target_hbs[rb_index]->cxl_host_bridge);
|
||||
if (!hb || !hb->bus || !pci_bus_is_cxl(hb->bus)) {
|
||||
return NULL;
|
||||
}
|
||||
|
||||
@@ -2395,9 +2395,11 @@ build_amd_iommu(GArray *table_data, BIOSLinker *linker, const char *oem_id,
|
||||
/* IVHD length */
|
||||
build_append_int_noprefix(table_data, ivhd_table_len, 2);
|
||||
/* DeviceID */
|
||||
build_append_int_noprefix(table_data, s->devid, 2);
|
||||
build_append_int_noprefix(table_data,
|
||||
object_property_get_int(OBJECT(&s->pci), "addr",
|
||||
&error_abort), 2);
|
||||
/* Capability offset */
|
||||
build_append_int_noprefix(table_data, s->capab_offset, 2);
|
||||
build_append_int_noprefix(table_data, s->pci.capab_offset, 2);
|
||||
/* IOMMU base address */
|
||||
build_append_int_noprefix(table_data, s->mmio.addr, 8);
|
||||
/* PCI Segment Group */
|
||||
@@ -2695,7 +2697,8 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine)
|
||||
int legacy_table_size =
|
||||
ROUND_UP(tables_blob->len - aml_len + legacy_aml_len,
|
||||
ACPI_BUILD_ALIGN_SIZE);
|
||||
if (tables_blob->len > legacy_table_size) {
|
||||
if ((tables_blob->len > legacy_table_size) &&
|
||||
!pcmc->resizable_acpi_blob) {
|
||||
/* Should happen only with PCI bridges and -M pc-i440fx-2.0. */
|
||||
warn_report("ACPI table size %u exceeds %d bytes,"
|
||||
" migration may not work",
|
||||
@@ -2706,7 +2709,8 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine)
|
||||
g_array_set_size(tables_blob, legacy_table_size);
|
||||
} else {
|
||||
/* Make sure we have a buffer in case we need to resize the tables. */
|
||||
if (tables_blob->len > ACPI_BUILD_TABLE_SIZE / 2) {
|
||||
if ((tables_blob->len > ACPI_BUILD_TABLE_SIZE / 2) &&
|
||||
!pcmc->resizable_acpi_blob) {
|
||||
/* As of QEMU 2.1, this fires with 160 VCPUs and 255 memory slots. */
|
||||
warn_report("ACPI table size %u exceeds %d bytes,"
|
||||
" migration may not work",
|
||||
|
||||
+42
-32
@@ -1509,23 +1509,48 @@ static void amdvi_init(AMDVIState *s)
|
||||
amdvi_set_quad(s, AMDVI_MMIO_EXT_FEATURES, AMDVI_EXT_FEATURES,
|
||||
0xffffffffffffffef, 0);
|
||||
amdvi_set_quad(s, AMDVI_MMIO_STATUS, 0, 0x98, 0x67);
|
||||
}
|
||||
|
||||
static void amdvi_pci_realize(PCIDevice *pdev, Error **errp)
|
||||
{
|
||||
AMDVIPCIState *s = AMD_IOMMU_PCI(pdev);
|
||||
int ret;
|
||||
|
||||
ret = pci_add_capability(pdev, AMDVI_CAPAB_ID_SEC, 0,
|
||||
AMDVI_CAPAB_SIZE, errp);
|
||||
if (ret < 0) {
|
||||
return;
|
||||
}
|
||||
s->capab_offset = ret;
|
||||
|
||||
ret = pci_add_capability(pdev, PCI_CAP_ID_MSI, 0,
|
||||
AMDVI_CAPAB_REG_SIZE, errp);
|
||||
if (ret < 0) {
|
||||
return;
|
||||
}
|
||||
ret = pci_add_capability(pdev, PCI_CAP_ID_HT, 0,
|
||||
AMDVI_CAPAB_REG_SIZE, errp);
|
||||
if (ret < 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (msi_init(pdev, 0, 1, true, false, errp) < 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
/* reset device ident */
|
||||
pci_config_set_vendor_id(s->pci.dev.config, PCI_VENDOR_ID_AMD);
|
||||
pci_config_set_prog_interface(s->pci.dev.config, 00);
|
||||
pci_config_set_device_id(s->pci.dev.config, s->devid);
|
||||
pci_config_set_class(s->pci.dev.config, 0x0806);
|
||||
pci_config_set_prog_interface(pdev->config, 0);
|
||||
|
||||
/* reset AMDVI specific capabilities, all r/o */
|
||||
pci_set_long(s->pci.dev.config + s->capab_offset, AMDVI_CAPAB_FEATURES);
|
||||
pci_set_long(s->pci.dev.config + s->capab_offset + AMDVI_CAPAB_BAR_LOW,
|
||||
s->mmio.addr & ~(0xffff0000));
|
||||
pci_set_long(s->pci.dev.config + s->capab_offset + AMDVI_CAPAB_BAR_HIGH,
|
||||
(s->mmio.addr & ~(0xffff)) >> 16);
|
||||
pci_set_long(s->pci.dev.config + s->capab_offset + AMDVI_CAPAB_RANGE,
|
||||
pci_set_long(pdev->config + s->capab_offset, AMDVI_CAPAB_FEATURES);
|
||||
pci_set_long(pdev->config + s->capab_offset + AMDVI_CAPAB_BAR_LOW,
|
||||
AMDVI_BASE_ADDR & ~(0xffff0000));
|
||||
pci_set_long(pdev->config + s->capab_offset + AMDVI_CAPAB_BAR_HIGH,
|
||||
(AMDVI_BASE_ADDR & ~(0xffff)) >> 16);
|
||||
pci_set_long(pdev->config + s->capab_offset + AMDVI_CAPAB_RANGE,
|
||||
0xff000000);
|
||||
pci_set_long(s->pci.dev.config + s->capab_offset + AMDVI_CAPAB_MISC, 0);
|
||||
pci_set_long(s->pci.dev.config + s->capab_offset + AMDVI_CAPAB_MISC,
|
||||
pci_set_long(pdev->config + s->capab_offset + AMDVI_CAPAB_MISC, 0);
|
||||
pci_set_long(pdev->config + s->capab_offset + AMDVI_CAPAB_MISC,
|
||||
AMDVI_MAX_PH_ADDR | AMDVI_MAX_GVA_ADDR | AMDVI_MAX_VA_ADDR);
|
||||
}
|
||||
|
||||
@@ -1539,7 +1564,6 @@ static void amdvi_sysbus_reset(DeviceState *dev)
|
||||
|
||||
static void amdvi_sysbus_realize(DeviceState *dev, Error **errp)
|
||||
{
|
||||
int ret = 0;
|
||||
AMDVIState *s = AMD_IOMMU_DEVICE(dev);
|
||||
MachineState *ms = MACHINE(qdev_get_machine());
|
||||
PCMachineState *pcms = PC_MACHINE(ms);
|
||||
@@ -1553,23 +1577,6 @@ static void amdvi_sysbus_realize(DeviceState *dev, Error **errp)
|
||||
if (!qdev_realize(DEVICE(&s->pci), &bus->qbus, errp)) {
|
||||
return;
|
||||
}
|
||||
ret = pci_add_capability(&s->pci.dev, AMDVI_CAPAB_ID_SEC, 0,
|
||||
AMDVI_CAPAB_SIZE, errp);
|
||||
if (ret < 0) {
|
||||
return;
|
||||
}
|
||||
s->capab_offset = ret;
|
||||
|
||||
ret = pci_add_capability(&s->pci.dev, PCI_CAP_ID_MSI, 0,
|
||||
AMDVI_CAPAB_REG_SIZE, errp);
|
||||
if (ret < 0) {
|
||||
return;
|
||||
}
|
||||
ret = pci_add_capability(&s->pci.dev, PCI_CAP_ID_HT, 0,
|
||||
AMDVI_CAPAB_REG_SIZE, errp);
|
||||
if (ret < 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
/* Pseudo address space under root PCI bus. */
|
||||
x86ms->ioapic_as = amdvi_host_dma_iommu(bus, s, AMDVI_IOAPIC_SB_DEVID);
|
||||
@@ -1581,8 +1588,6 @@ static void amdvi_sysbus_realize(DeviceState *dev, Error **errp)
|
||||
sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->mmio);
|
||||
sysbus_mmio_map(SYS_BUS_DEVICE(s), 0, AMDVI_BASE_ADDR);
|
||||
pci_setup_iommu(bus, amdvi_host_dma_iommu, s);
|
||||
s->devid = object_property_get_int(OBJECT(&s->pci), "addr", &error_abort);
|
||||
msi_init(&s->pci.dev, 0, 1, true, false, errp);
|
||||
amdvi_init(s);
|
||||
}
|
||||
|
||||
@@ -1625,6 +1630,11 @@ static const TypeInfo amdvi_sysbus = {
|
||||
static void amdvi_pci_class_init(ObjectClass *klass, void *data)
|
||||
{
|
||||
DeviceClass *dc = DEVICE_CLASS(klass);
|
||||
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
|
||||
|
||||
k->vendor_id = PCI_VENDOR_ID_AMD;
|
||||
k->class_id = 0x0806;
|
||||
k->realize = amdvi_pci_realize;
|
||||
|
||||
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
|
||||
dc->desc = "AMD IOMMU (AMD-Vi) DMA Remapping device";
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user