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hw/display: fix tab indentation

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The TABs should be replaced with spaces, to make sure that we have a
consistent coding style with an indentation of 4 spaces everywhere.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/370
Signed-off-by: Amarjargal Gundjalam <amarjargal16@gmail.com>
Message-Id: <5cefd05b4d3721d416e48e6df19df18cb6338933.1666707782.git.amarjargal16@gmail.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
Amarjargal Gundjalam
2022-11-08 10:23:32 +01:00
committed by Thomas Huth
parent ef99aa2a31
commit a076a3dcbf
6 changed files with 1499 additions and 1499 deletions
Download Patch File Download Diff File Expand all files Collapse all files
hw/display/blizzard.c
+176 -176
View File
File diff suppressed because it is too large Load Diff
hw/display/cirrus_vga.c
+800 -800
View File
File diff suppressed because it is too large Load Diff
hw/display/omap_dss.c
+299 -299
View File
File diff suppressed because it is too large Load Diff
hw/display/pxa2xx_lcd.c
+92 -92
View File
@@ -86,106 +86,106 @@ typedef struct QEMU_PACKED {
uint32_t ldcmd;
} PXAFrameDescriptor;
#define LCCR0 0x000 /* LCD Controller Control register 0 */
#define LCCR1 0x004 /* LCD Controller Control register 1 */
#define LCCR2 0x008 /* LCD Controller Control register 2 */
#define LCCR3 0x00c /* LCD Controller Control register 3 */
#define LCCR4 0x010 /* LCD Controller Control register 4 */
#define LCCR5 0x014 /* LCD Controller Control register 5 */
#define LCCR0 0x000 /* LCD Controller Control register 0 */
#define LCCR1 0x004 /* LCD Controller Control register 1 */
#define LCCR2 0x008 /* LCD Controller Control register 2 */
#define LCCR3 0x00c /* LCD Controller Control register 3 */
#define LCCR4 0x010 /* LCD Controller Control register 4 */
#define LCCR5 0x014 /* LCD Controller Control register 5 */
#define FBR0 0x020 /* DMA Channel 0 Frame Branch register */
#define FBR1 0x024 /* DMA Channel 1 Frame Branch register */
#define FBR2 0x028 /* DMA Channel 2 Frame Branch register */
#define FBR3 0x02c /* DMA Channel 3 Frame Branch register */
#define FBR4 0x030 /* DMA Channel 4 Frame Branch register */
#define FBR5 0x110 /* DMA Channel 5 Frame Branch register */
#define FBR6 0x114 /* DMA Channel 6 Frame Branch register */
#define FBR0 0x020 /* DMA Channel 0 Frame Branch register */
#define FBR1 0x024 /* DMA Channel 1 Frame Branch register */
#define FBR2 0x028 /* DMA Channel 2 Frame Branch register */
#define FBR3 0x02c /* DMA Channel 3 Frame Branch register */
#define FBR4 0x030 /* DMA Channel 4 Frame Branch register */
#define FBR5 0x110 /* DMA Channel 5 Frame Branch register */
#define FBR6 0x114 /* DMA Channel 6 Frame Branch register */
#define LCSR1 0x034 /* LCD Controller Status register 1 */
#define LCSR0 0x038 /* LCD Controller Status register 0 */
#define LIIDR 0x03c /* LCD Controller Interrupt ID register */
#define LCSR1 0x034 /* LCD Controller Status register 1 */
#define LCSR0 0x038 /* LCD Controller Status register 0 */
#define LIIDR 0x03c /* LCD Controller Interrupt ID register */
#define TRGBR 0x040 /* TMED RGB Seed register */
#define TCR 0x044 /* TMED Control register */
#define TRGBR 0x040 /* TMED RGB Seed register */
#define TCR 0x044 /* TMED Control register */
#define OVL1C1 0x050 /* Overlay 1 Control register 1 */
#define OVL1C2 0x060 /* Overlay 1 Control register 2 */
#define OVL2C1 0x070 /* Overlay 2 Control register 1 */
#define OVL2C2 0x080 /* Overlay 2 Control register 2 */
#define CCR 0x090 /* Cursor Control register */
#define OVL1C1 0x050 /* Overlay 1 Control register 1 */
#define OVL1C2 0x060 /* Overlay 1 Control register 2 */
#define OVL2C1 0x070 /* Overlay 2 Control register 1 */
#define OVL2C2 0x080 /* Overlay 2 Control register 2 */
#define CCR 0x090 /* Cursor Control register */
#define CMDCR 0x100 /* Command Control register */
#define PRSR 0x104 /* Panel Read Status register */
#define CMDCR 0x100 /* Command Control register */
#define PRSR 0x104 /* Panel Read Status register */
#define PXA_LCDDMA_CHANS 7
#define DMA_FDADR 0x00 /* Frame Descriptor Address register */
#define DMA_FSADR 0x04 /* Frame Source Address register */
#define DMA_FIDR 0x08 /* Frame ID register */
#define DMA_LDCMD 0x0c /* Command register */
#define PXA_LCDDMA_CHANS 7
#define DMA_FDADR 0x00 /* Frame Descriptor Address register */
#define DMA_FSADR 0x04 /* Frame Source Address register */
#define DMA_FIDR 0x08 /* Frame ID register */
#define DMA_LDCMD 0x0c /* Command register */
/* LCD Buffer Strength Control register */
#define BSCNTR 0x04000054
#define BSCNTR 0x04000054
/* Bitfield masks */
#define LCCR0_ENB (1 << 0)
#define LCCR0_CMS (1 << 1)
#define LCCR0_SDS (1 << 2)
#define LCCR0_LDM (1 << 3)
#define LCCR0_SOFM0 (1 << 4)
#define LCCR0_IUM (1 << 5)
#define LCCR0_EOFM0 (1 << 6)
#define LCCR0_PAS (1 << 7)
#define LCCR0_DPD (1 << 9)
#define LCCR0_DIS (1 << 10)
#define LCCR0_QDM (1 << 11)
#define LCCR0_PDD (0xff << 12)
#define LCCR0_BSM0 (1 << 20)
#define LCCR0_OUM (1 << 21)
#define LCCR0_LCDT (1 << 22)
#define LCCR0_RDSTM (1 << 23)
#define LCCR0_CMDIM (1 << 24)
#define LCCR0_OUC (1 << 25)
#define LCCR0_LDDALT (1 << 26)
#define LCCR1_PPL(x) ((x) & 0x3ff)
#define LCCR2_LPP(x) ((x) & 0x3ff)
#define LCCR3_API (15 << 16)
#define LCCR3_BPP(x) ((((x) >> 24) & 7) | (((x) >> 26) & 8))
#define LCCR3_PDFOR(x) (((x) >> 30) & 3)
#define LCCR4_K1(x) (((x) >> 0) & 7)
#define LCCR4_K2(x) (((x) >> 3) & 7)
#define LCCR4_K3(x) (((x) >> 6) & 7)
#define LCCR4_PALFOR(x) (((x) >> 15) & 3)
#define LCCR5_SOFM(ch) (1 << (ch - 1))
#define LCCR5_EOFM(ch) (1 << (ch + 7))
#define LCCR5_BSM(ch) (1 << (ch + 15))
#define LCCR5_IUM(ch) (1 << (ch + 23))
#define OVLC1_EN (1 << 31)
#define CCR_CEN (1 << 31)
#define FBR_BRA (1 << 0)
#define FBR_BINT (1 << 1)
#define FBR_SRCADDR (0xfffffff << 4)
#define LCSR0_LDD (1 << 0)
#define LCSR0_SOF0 (1 << 1)
#define LCSR0_BER (1 << 2)
#define LCSR0_ABC (1 << 3)
#define LCSR0_IU0 (1 << 4)
#define LCSR0_IU1 (1 << 5)
#define LCSR0_OU (1 << 6)
#define LCSR0_QD (1 << 7)
#define LCSR0_EOF0 (1 << 8)
#define LCSR0_BS0 (1 << 9)
#define LCSR0_SINT (1 << 10)
#define LCSR0_RDST (1 << 11)
#define LCSR0_CMDINT (1 << 12)
#define LCSR0_BERCH(x) (((x) & 7) << 28)
#define LCSR1_SOF(ch) (1 << (ch - 1))
#define LCSR1_EOF(ch) (1 << (ch + 7))
#define LCSR1_BS(ch) (1 << (ch + 15))
#define LCSR1_IU(ch) (1 << (ch + 23))
#define LDCMD_LENGTH(x) ((x) & 0x001ffffc)
#define LDCMD_EOFINT (1 << 21)
#define LDCMD_SOFINT (1 << 22)
#define LDCMD_PAL (1 << 26)
#define LCCR0_ENB (1 << 0)
#define LCCR0_CMS (1 << 1)
#define LCCR0_SDS (1 << 2)
#define LCCR0_LDM (1 << 3)
#define LCCR0_SOFM0 (1 << 4)
#define LCCR0_IUM (1 << 5)
#define LCCR0_EOFM0 (1 << 6)
#define LCCR0_PAS (1 << 7)
#define LCCR0_DPD (1 << 9)
#define LCCR0_DIS (1 << 10)
#define LCCR0_QDM (1 << 11)
#define LCCR0_PDD (0xff << 12)
#define LCCR0_BSM0 (1 << 20)
#define LCCR0_OUM (1 << 21)
#define LCCR0_LCDT (1 << 22)
#define LCCR0_RDSTM (1 << 23)
#define LCCR0_CMDIM (1 << 24)
#define LCCR0_OUC (1 << 25)
#define LCCR0_LDDALT (1 << 26)
#define LCCR1_PPL(x) ((x) & 0x3ff)
#define LCCR2_LPP(x) ((x) & 0x3ff)
#define LCCR3_API (15 << 16)
#define LCCR3_BPP(x) ((((x) >> 24) & 7) | (((x) >> 26) & 8))
#define LCCR3_PDFOR(x) (((x) >> 30) & 3)
#define LCCR4_K1(x) (((x) >> 0) & 7)
#define LCCR4_K2(x) (((x) >> 3) & 7)
#define LCCR4_K3(x) (((x) >> 6) & 7)
#define LCCR4_PALFOR(x) (((x) >> 15) & 3)
#define LCCR5_SOFM(ch) (1 << (ch - 1))
#define LCCR5_EOFM(ch) (1 << (ch + 7))
#define LCCR5_BSM(ch) (1 << (ch + 15))
#define LCCR5_IUM(ch) (1 << (ch + 23))
#define OVLC1_EN (1 << 31)
#define CCR_CEN (1 << 31)
#define FBR_BRA (1 << 0)
#define FBR_BINT (1 << 1)
#define FBR_SRCADDR (0xfffffff << 4)
#define LCSR0_LDD (1 << 0)
#define LCSR0_SOF0 (1 << 1)
#define LCSR0_BER (1 << 2)
#define LCSR0_ABC (1 << 3)
#define LCSR0_IU0 (1 << 4)
#define LCSR0_IU1 (1 << 5)
#define LCSR0_OU (1 << 6)
#define LCSR0_QD (1 << 7)
#define LCSR0_EOF0 (1 << 8)
#define LCSR0_BS0 (1 << 9)
#define LCSR0_SINT (1 << 10)
#define LCSR0_RDST (1 << 11)
#define LCSR0_CMDINT (1 << 12)
#define LCSR0_BERCH(x) (((x) & 7) << 28)
#define LCSR1_SOF(ch) (1 << (ch - 1))
#define LCSR1_EOF(ch) (1 << (ch + 7))
#define LCSR1_BS(ch) (1 << (ch + 15))
#define LCSR1_IU(ch) (1 << (ch + 23))
#define LDCMD_LENGTH(x) ((x) & 0x001ffffc)
#define LDCMD_EOFINT (1 << 21)
#define LDCMD_SOFINT (1 << 22)
#define LDCMD_PAL (1 << 26)
/* Size of a pixel in the QEMU UI output surface, in bytes */
#define DEST_PIXEL_WIDTH 4
@@ -788,7 +788,7 @@ static uint64_t pxa2xx_lcdc_read(void *opaque, hwaddr offset,
case TCR:
return s->tcr;
case 0x200 ... 0x1000: /* DMA per-channel registers */
case 0x200 ... 0x1000: /* DMA per-channel registers */
ch = (offset - 0x200) >> 4;
if (!(ch >= 0 && ch < PXA_LCDDMA_CHANS))
goto fail;
@@ -938,7 +938,7 @@ static void pxa2xx_lcdc_write(void *opaque, hwaddr offset,
s->tcr = value & 0x7fff;
break;
case 0x200 ... 0x1000: /* DMA per-channel registers */
case 0x200 ... 0x1000: /* DMA per-channel registers */
ch = (offset - 0x200) >> 4;
if (!(ch >= 0 && ch < PXA_LCDDMA_CHANS))
goto fail;
hw/display/vga_regs.h
+3 -3
View File
@@ -4,9 +4,9 @@
* Copyright 1999 Jeff Garzik <jgarzik@pobox.com>
*
* Copyright history from vga16fb.c:
* Copyright 1999 Ben Pfaff and Petr Vandrovec
* Based on VGA info at http://www.osdever.net/FreeVGA/home.htm
* Based on VESA framebuffer (c) 1998 Gerd Knorr
* Copyright 1999 Ben Pfaff and Petr Vandrovec
* Based on VGA info at http://www.osdever.net/FreeVGA/home.htm
* Based on VESA framebuffer (c) 1998 Gerd Knorr
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
hw/display/xenfb.c
+129 -129
View File
@@ -76,7 +76,7 @@ struct XenFB {
int do_resize;
struct {
int x,y,w,h;
int x,y,w,h;
} up_rects[UP_QUEUE];
int up_count;
int up_fullscreen;
@@ -116,32 +116,32 @@ static void common_unbind(struct common *c)
xen_pv_unbind_evtchn(&c->xendev);
if (c->page) {
xenforeignmemory_unmap(xen_fmem, c->page, 1);
c->page = NULL;
c->page = NULL;
}
}
/* -------------------------------------------------------------------- */
/* Send an event to the keyboard frontend driver */
static int xenfb_kbd_event(struct XenInput *xenfb,
union xenkbd_in_event *event)
union xenkbd_in_event *event)
{
struct xenkbd_page *page = xenfb->c.page;
uint32_t prod;
if (xenfb->c.xendev.be_state != XenbusStateConnected)
return 0;
return 0;
if (!page)
return 0;
prod = page->in_prod;
if (prod - page->in_cons == XENKBD_IN_RING_LEN) {
errno = EAGAIN;
return -1;
errno = EAGAIN;
return -1;
}
xen_mb(); /* ensure ring space available */
xen_mb(); /* ensure ring space available */
XENKBD_IN_RING_REF(page, prod) = *event;
xen_wmb(); /* ensure ring contents visible */
xen_wmb(); /* ensure ring contents visible */
page->in_prod = prod + 1;
return xen_pv_send_notify(&xenfb->c.xendev);
}
@@ -161,7 +161,7 @@ static int xenfb_send_key(struct XenInput *xenfb, bool down, int keycode)
/* Send a relative mouse movement event */
static int xenfb_send_motion(struct XenInput *xenfb,
int rel_x, int rel_y, int rel_z)
int rel_x, int rel_y, int rel_z)
{
union xenkbd_in_event event;
@@ -176,7 +176,7 @@ static int xenfb_send_motion(struct XenInput *xenfb,
/* Send an absolute mouse movement event */
static int xenfb_send_position(struct XenInput *xenfb,
int abs_x, int abs_y, int z)
int abs_x, int abs_y, int z)
{
union xenkbd_in_event event;
@@ -354,7 +354,7 @@ static int input_initialise(struct XenLegacyDevice *xendev)
rc = common_bind(&in->c);
if (rc != 0)
return rc;
return rc;
return 0;
}
@@ -415,7 +415,7 @@ static void input_event(struct XenLegacyDevice *xendev)
/* We don't understand any keyboard events, so just ignore them. */
if (page->out_prod == page->out_cons)
return;
return;
page->out_cons = page->out_prod;
xen_pv_send_notify(&xenfb->c.xendev);
}
@@ -429,7 +429,7 @@ static void xenfb_copy_mfns(int mode, int count, xen_pfn_t *dst, void *src)
int i;
for (i = 0; i < count; i++)
dst[i] = (mode == 32) ? src32[i] : src64[i];
dst[i] = (mode == 32) ? src32[i] : src64[i];
}
static int xenfb_map_fb(struct XenFB *xenfb)
@@ -447,43 +447,43 @@ static int xenfb_map_fb(struct XenFB *xenfb)
mode = sizeof(unsigned long) * 8;
if (!protocol) {
/*
* Undefined protocol, some guesswork needed.
*
* Old frontends which don't set the protocol use
* one page directory only, thus pd[1] must be zero.
* pd[1] of the 32bit struct layout and the lower
* 32 bits of pd[0] of the 64bit struct layout have
* the same location, so we can check that ...
*/
uint32_t *ptr32 = NULL;
uint32_t *ptr64 = NULL;
/*
* Undefined protocol, some guesswork needed.
*
* Old frontends which don't set the protocol use
* one page directory only, thus pd[1] must be zero.
* pd[1] of the 32bit struct layout and the lower
* 32 bits of pd[0] of the 64bit struct layout have
* the same location, so we can check that ...
*/
uint32_t *ptr32 = NULL;
uint32_t *ptr64 = NULL;
#if defined(__i386__)
ptr32 = (void*)page->pd;
ptr64 = ((void*)page->pd) + 4;
ptr32 = (void*)page->pd;
ptr64 = ((void*)page->pd) + 4;
#elif defined(__x86_64__)
ptr32 = ((void*)page->pd) - 4;
ptr64 = (void*)page->pd;
ptr32 = ((void*)page->pd) - 4;
ptr64 = (void*)page->pd;
#endif
if (ptr32) {
if (ptr32[1] == 0) {
mode = 32;
pd = ptr32;
} else {
mode = 64;
pd = ptr64;
}
}
if (ptr32) {
if (ptr32[1] == 0) {
mode = 32;
pd = ptr32;
} else {
mode = 64;
pd = ptr64;
}
}
#if defined(__x86_64__)
} else if (strcmp(protocol, XEN_IO_PROTO_ABI_X86_32) == 0) {
/* 64bit dom0, 32bit domU */
mode = 32;
pd = ((void*)page->pd) - 4;
/* 64bit dom0, 32bit domU */
mode = 32;
pd = ((void*)page->pd) - 4;
#elif defined(__i386__)
} else if (strcmp(protocol, XEN_IO_PROTO_ABI_X86_64) == 0) {
/* 32bit dom0, 64bit domU */
mode = 64;
pd = ((void*)page->pd) + 4;
/* 32bit dom0, 64bit domU */
mode = 64;
pd = ((void*)page->pd) + 4;
#endif
}
@@ -503,14 +503,14 @@ static int xenfb_map_fb(struct XenFB *xenfb)
map = xenforeignmemory_map(xen_fmem, xenfb->c.xendev.dom,
PROT_READ, n_fbdirs, pgmfns, NULL);
if (map == NULL)
goto out;
goto out;
xenfb_copy_mfns(mode, xenfb->fbpages, fbmfns, map);
xenforeignmemory_unmap(xen_fmem, map, n_fbdirs);
xenfb->pixels = xenforeignmemory_map(xen_fmem, xenfb->c.xendev.dom,
PROT_READ, xenfb->fbpages, fbmfns, NULL);
if (xenfb->pixels == NULL)
goto out;
goto out;
ret = 0; /* all is fine */
@@ -589,35 +589,35 @@ static int xenfb_configure_fb(struct XenFB *xenfb, size_t fb_len_lim,
/* A convenient function for munging pixels between different depths */
#define BLT(SRC_T,DST_T,RSB,GSB,BSB,RDB,GDB,BDB) \
for (line = y ; line < (y+h) ; line++) { \
SRC_T *src = (SRC_T *)(xenfb->pixels \
+ xenfb->offset \
+ (line * xenfb->row_stride) \
+ (x * xenfb->depth / 8)); \
DST_T *dst = (DST_T *)(data \
+ (line * linesize) \
+ (x * bpp / 8)); \
int col; \
const int RSS = 32 - (RSB + GSB + BSB); \
const int GSS = 32 - (GSB + BSB); \
const int BSS = 32 - (BSB); \
const uint32_t RSM = (~0U) << (32 - RSB); \
const uint32_t GSM = (~0U) << (32 - GSB); \
const uint32_t BSM = (~0U) << (32 - BSB); \
const int RDS = 32 - (RDB + GDB + BDB); \
const int GDS = 32 - (GDB + BDB); \
const int BDS = 32 - (BDB); \
const uint32_t RDM = (~0U) << (32 - RDB); \
const uint32_t GDM = (~0U) << (32 - GDB); \
const uint32_t BDM = (~0U) << (32 - BDB); \
for (col = x ; col < (x+w) ; col++) { \
uint32_t spix = *src; \
*dst = (((spix << RSS) & RSM & RDM) >> RDS) | \
(((spix << GSS) & GSM & GDM) >> GDS) | \
(((spix << BSS) & BSM & BDM) >> BDS); \
src = (SRC_T *) ((unsigned long) src + xenfb->depth / 8); \
dst = (DST_T *) ((unsigned long) dst + bpp / 8); \
} \
for (line = y ; line < (y+h) ; line++) { \
SRC_T *src = (SRC_T *)(xenfb->pixels \
+ xenfb->offset \
+ (line * xenfb->row_stride) \
+ (x * xenfb->depth / 8)); \
DST_T *dst = (DST_T *)(data \
+ (line * linesize) \
+ (x * bpp / 8)); \
int col; \
const int RSS = 32 - (RSB + GSB + BSB); \
const int GSS = 32 - (GSB + BSB); \
const int BSS = 32 - (BSB); \
const uint32_t RSM = (~0U) << (32 - RSB); \
const uint32_t GSM = (~0U) << (32 - GSB); \
const uint32_t BSM = (~0U) << (32 - BSB); \
const int RDS = 32 - (RDB + GDB + BDB); \
const int GDS = 32 - (GDB + BDB); \
const int BDS = 32 - (BDB); \
const uint32_t RDM = (~0U) << (32 - RDB); \
const uint32_t GDM = (~0U) << (32 - GDB); \
const uint32_t BDM = (~0U) << (32 - BDB); \
for (col = x ; col < (x+w) ; col++) { \
uint32_t spix = *src; \
*dst = (((spix << RSS) & RSM & RDM) >> RDS) | \
(((spix << GSS) & GSM & GDM) >> GDS) | \
(((spix << BSS) & BSM & BDM) >> BDS); \
src = (SRC_T *) ((unsigned long) src + xenfb->depth / 8); \
dst = (DST_T *) ((unsigned long) dst + bpp / 8); \
} \
}
@@ -657,7 +657,7 @@ static void xenfb_guest_copy(struct XenFB *xenfb, int x, int y, int w, int h)
break;
default:
oops = 1;
}
}
}
if (oops) /* should not happen */
xen_pv_printf(&xenfb->c.xendev, 0, "%s: oops: convert %d -> %d bpp?\n",
@@ -816,60 +816,60 @@ static void xenfb_handle_events(struct XenFB *xenfb)
if (prod - out_cons > XENFB_OUT_RING_LEN) {
return;
}
xen_rmb(); /* ensure we see ring contents up to prod */
xen_rmb(); /* ensure we see ring contents up to prod */
for (cons = out_cons; cons != prod; cons++) {
union xenfb_out_event *event = &XENFB_OUT_RING_REF(page, cons);
union xenfb_out_event *event = &XENFB_OUT_RING_REF(page, cons);
uint8_t type = event->type;
int x, y, w, h;
int x, y, w, h;
switch (type) {
case XENFB_TYPE_UPDATE:
if (xenfb->up_count == UP_QUEUE)
xenfb->up_fullscreen = 1;
if (xenfb->up_fullscreen)
break;
x = MAX(event->update.x, 0);
y = MAX(event->update.y, 0);
w = MIN(event->update.width, xenfb->width - x);
h = MIN(event->update.height, xenfb->height - y);
if (w < 0 || h < 0) {
switch (type) {
case XENFB_TYPE_UPDATE:
if (xenfb->up_count == UP_QUEUE)
xenfb->up_fullscreen = 1;
if (xenfb->up_fullscreen)
break;
x = MAX(event->update.x, 0);
y = MAX(event->update.y, 0);
w = MIN(event->update.width, xenfb->width - x);
h = MIN(event->update.height, xenfb->height - y);
if (w < 0 || h < 0) {
xen_pv_printf(&xenfb->c.xendev, 1, "bogus update ignored\n");
break;
}
if (x != event->update.x ||
break;
}
if (x != event->update.x ||
y != event->update.y ||
w != event->update.width ||
h != event->update.height) {
w != event->update.width ||
h != event->update.height) {
xen_pv_printf(&xenfb->c.xendev, 1, "bogus update clipped\n");
}
if (w == xenfb->width && h > xenfb->height / 2) {
/* scroll detector: updated more than 50% of the lines,
* don't bother keeping track of the rectangles then */
xenfb->up_fullscreen = 1;
} else {
xenfb->up_rects[xenfb->up_count].x = x;
xenfb->up_rects[xenfb->up_count].y = y;
xenfb->up_rects[xenfb->up_count].w = w;
xenfb->up_rects[xenfb->up_count].h = h;
xenfb->up_count++;
}
break;
}
if (w == xenfb->width && h > xenfb->height / 2) {
/* scroll detector: updated more than 50% of the lines,
* don't bother keeping track of the rectangles then */
xenfb->up_fullscreen = 1;
} else {
xenfb->up_rects[xenfb->up_count].x = x;
xenfb->up_rects[xenfb->up_count].y = y;
xenfb->up_rects[xenfb->up_count].w = w;
xenfb->up_rects[xenfb->up_count].h = h;
xenfb->up_count++;
}
break;
#ifdef XENFB_TYPE_RESIZE
case XENFB_TYPE_RESIZE:
if (xenfb_configure_fb(xenfb, xenfb->fb_len,
event->resize.width,
event->resize.height,
event->resize.depth,
xenfb->fb_len,
event->resize.offset,
event->resize.stride) < 0)
break;
xenfb_invalidate(xenfb);
break;
case XENFB_TYPE_RESIZE:
if (xenfb_configure_fb(xenfb, xenfb->fb_len,
event->resize.width,
event->resize.height,
event->resize.depth,
xenfb->fb_len,
event->resize.offset,
event->resize.stride) < 0)
break;
xenfb_invalidate(xenfb);
break;
#endif
}
}
}
xen_mb(); /* ensure we're done with ring contents */
xen_mb(); /* ensure we're done with ring contents */
page->out_cons = cons;
}
@@ -889,32 +889,32 @@ static int fb_initialise(struct XenLegacyDevice *xendev)
int rc;
if (xenstore_read_fe_int(xendev, "videoram", &videoram) == -1)
videoram = 0;
videoram = 0;
rc = common_bind(&fb->c);
if (rc != 0)
return rc;
return rc;
fb_page = fb->c.page;
rc = xenfb_configure_fb(fb, videoram * MiB,
fb_page->width, fb_page->height, fb_page->depth,
fb_page->mem_length, 0, fb_page->line_length);
fb_page->width, fb_page->height, fb_page->depth,
fb_page->mem_length, 0, fb_page->line_length);
if (rc != 0)
return rc;
return rc;
rc = xenfb_map_fb(fb);
if (rc != 0)
return rc;
return rc;
fb->con = graphic_console_init(NULL, 0, &xenfb_ops, fb);
if (xenstore_read_fe_int(xendev, "feature-update", &fb->feature_update) == -1)
fb->feature_update = 0;
fb->feature_update = 0;
if (fb->feature_update)
xenstore_write_be_int(xendev, "request-update", 1);
xenstore_write_be_int(xendev, "request-update", 1);
xen_pv_printf(xendev, 1, "feature-update=%d, videoram=%d\n",
fb->feature_update, videoram);
fb->feature_update, videoram);
return 0;
}