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linux-user: Move get_elf_hwcap to sh4/elfload.c
Change the return type to abi_ulong, and pass in the cpu. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
+1
-28
@@ -963,34 +963,7 @@ static inline void elf_core_copy_regs(target_elf_gregset_t *regs,
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#define USE_ELF_CORE_DUMP
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#define ELF_EXEC_PAGESIZE 4096
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enum {
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SH_CPU_HAS_FPU = 0x0001, /* Hardware FPU support */
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SH_CPU_HAS_P2_FLUSH_BUG = 0x0002, /* Need to flush the cache in P2 area */
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SH_CPU_HAS_MMU_PAGE_ASSOC = 0x0004, /* SH3: TLB way selection bit support */
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SH_CPU_HAS_DSP = 0x0008, /* SH-DSP: DSP support */
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SH_CPU_HAS_PERF_COUNTER = 0x0010, /* Hardware performance counters */
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SH_CPU_HAS_PTEA = 0x0020, /* PTEA register */
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SH_CPU_HAS_LLSC = 0x0040, /* movli.l/movco.l */
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SH_CPU_HAS_L2_CACHE = 0x0080, /* Secondary cache / URAM */
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SH_CPU_HAS_OP32 = 0x0100, /* 32-bit instruction support */
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SH_CPU_HAS_PTEAEX = 0x0200, /* PTE ASID Extension support */
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};
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#define ELF_HWCAP get_elf_hwcap()
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static uint32_t get_elf_hwcap(void)
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{
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SuperHCPU *cpu = SUPERH_CPU(thread_cpu);
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uint32_t hwcap = 0;
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hwcap |= SH_CPU_HAS_FPU;
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if (cpu->env.features & SH_FEATURE_SH4A) {
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hwcap |= SH_CPU_HAS_LLSC;
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}
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return hwcap;
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}
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#define ELF_HWCAP get_elf_hwcap(thread_cpu)
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#endif
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+2
-1
@@ -103,7 +103,8 @@ const char *get_elf_cpu_model(uint32_t eflags);
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#if defined(TARGET_I386) || defined(TARGET_X86_64) || defined(TARGET_ARM) \
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|| defined(TARGET_SPARC) || defined(TARGET_PPC) \
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|| defined(TARGET_LOONGARCH64) || defined(TARGET_MIPS)
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|| defined(TARGET_LOONGARCH64) || defined(TARGET_MIPS) \
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|| defined(TARGET_SH4)
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abi_ulong get_elf_hwcap(CPUState *cs);
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abi_ulong get_elf_hwcap2(CPUState *cs);
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#endif
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@@ -9,3 +9,30 @@ const char *get_elf_cpu_model(uint32_t eflags)
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{
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return "sh7785";
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}
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enum {
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SH_CPU_HAS_FPU = 0x0001, /* Hardware FPU support */
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SH_CPU_HAS_P2_FLUSH_BUG = 0x0002, /* Need to flush the cache in P2 area */
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SH_CPU_HAS_MMU_PAGE_ASSOC = 0x0004, /* SH3: TLB way selection bit support */
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SH_CPU_HAS_DSP = 0x0008, /* SH-DSP: DSP support */
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SH_CPU_HAS_PERF_COUNTER = 0x0010, /* Hardware performance counters */
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SH_CPU_HAS_PTEA = 0x0020, /* PTEA register */
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SH_CPU_HAS_LLSC = 0x0040, /* movli.l/movco.l */
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SH_CPU_HAS_L2_CACHE = 0x0080, /* Secondary cache / URAM */
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SH_CPU_HAS_OP32 = 0x0100, /* 32-bit instruction support */
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SH_CPU_HAS_PTEAEX = 0x0200, /* PTE ASID Extension support */
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};
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abi_ulong get_elf_hwcap(CPUState *cs)
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{
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SuperHCPU *cpu = SUPERH_CPU(cs);
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abi_ulong hwcap = 0;
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hwcap |= SH_CPU_HAS_FPU;
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if (cpu->env.features & SH_FEATURE_SH4A) {
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hwcap |= SH_CPU_HAS_LLSC;
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}
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return hwcap;
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}
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@@ -8,4 +8,6 @@
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#ifndef SH4_TARGET_ELF_H
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#define SH4_TARGET_ELF_H
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#define HAVE_ELF_HWCAP 1
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#endif
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