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https://github.com/izzy2lost/xemu.git
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target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro
Replace the boilerplate code to declare CPU QOM types and macros, and forward-declare the CPU instance type. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220214183144.27402-14-f4bug@amsat.org>
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@@ -55,6 +55,24 @@ typedef struct CPUClass CPUClass;
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DECLARE_CLASS_CHECKERS(CPUClass, CPU,
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TYPE_CPU)
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/**
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* OBJECT_DECLARE_CPU_TYPE:
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* @CpuInstanceType: instance struct name
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* @CpuClassType: class struct name
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* @CPU_MODULE_OBJ_NAME: the CPU name in uppercase with underscore separators
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*
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* This macro is typically used in "cpu-qom.h" header file, and will:
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*
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* - create the typedefs for the CPU object and class structs
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* - register the type for use with g_autoptr
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* - provide three standard type cast functions
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*
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* The object struct and class struct need to be declared manually.
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*/
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#define OBJECT_DECLARE_CPU_TYPE(CpuInstanceType, CpuClassType, CPU_MODULE_OBJ_NAME) \
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OBJECT_DECLARE_TYPE(CpuInstanceType, CpuClassType, CPU_MODULE_OBJ_NAME); \
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typedef CpuInstanceType ArchCPU;
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typedef enum MMUAccessType {
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MMU_DATA_LOAD = 0,
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MMU_DATA_STORE = 1,
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@@ -25,8 +25,7 @@
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#define TYPE_ALPHA_CPU "alpha-cpu"
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OBJECT_DECLARE_TYPE(AlphaCPU, AlphaCPUClass,
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ALPHA_CPU)
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OBJECT_DECLARE_CPU_TYPE(AlphaCPU, AlphaCPUClass, ALPHA_CPU)
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/**
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* AlphaCPUClass:
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@@ -283,8 +283,6 @@ int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
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#define cpu_list alpha_cpu_list
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typedef AlphaCPU ArchCPU;
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#include "exec/cpu-all.h"
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enum {
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@@ -27,8 +27,7 @@ struct arm_boot_info;
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#define TYPE_ARM_CPU "arm-cpu"
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OBJECT_DECLARE_TYPE(ARMCPU, ARMCPUClass,
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ARM_CPU)
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OBJECT_DECLARE_CPU_TYPE(ARMCPU, ARMCPUClass, ARM_CPU)
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#define TYPE_ARM_MAX_CPU "max-" TYPE_ARM_CPU
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@@ -3410,8 +3410,6 @@ static inline bool arm_cpu_data_is_big_endian(CPUARMState *env)
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}
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}
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typedef ARMCPU ArchCPU;
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#include "exec/cpu-all.h"
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/*
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@@ -26,8 +26,7 @@
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#define TYPE_AVR_CPU "avr-cpu"
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OBJECT_DECLARE_TYPE(AVRCPU, AVRCPUClass,
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AVR_CPU)
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OBJECT_DECLARE_CPU_TYPE(AVRCPU, AVRCPUClass, AVR_CPU)
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/**
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* AVRCPUClass:
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+2
-4
@@ -143,14 +143,14 @@ typedef struct CPUArchState {
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*
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* A AVR CPU.
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*/
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typedef struct AVRCPU {
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struct AVRCPU {
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/*< private >*/
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CPUState parent_obj;
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPUAVRState env;
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} AVRCPU;
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};
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extern const struct VMStateDescription vms_avr_cpu;
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@@ -245,8 +245,6 @@ bool avr_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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typedef AVRCPU ArchCPU;
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#include "exec/cpu-all.h"
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#endif /* !defined (QEMU_AVR_CPU_H) */
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@@ -25,8 +25,7 @@
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#define TYPE_CRIS_CPU "cris-cpu"
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OBJECT_DECLARE_TYPE(CRISCPU, CRISCPUClass,
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CRIS_CPU)
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OBJECT_DECLARE_CPU_TYPE(CRISCPU, CRISCPUClass, CRIS_CPU)
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/**
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* CRISCPUClass:
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@@ -265,8 +265,6 @@ static inline int cpu_mmu_index (CPUCRISState *env, bool ifetch)
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#define SFR_RW_MM_TLB_LO env->pregs[PR_SRS]][5
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#define SFR_RW_MM_TLB_HI env->pregs[PR_SRS]][6
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typedef CRISCPU ArchCPU;
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#include "exec/cpu-all.h"
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static inline void cpu_get_tb_cpu_state(CPUCRISState *env, target_ulong *pc,
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@@ -130,7 +130,7 @@ typedef struct CPUArchState {
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VTCMStoreLog vtcm_log;
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} CPUHexagonState;
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OBJECT_DECLARE_TYPE(HexagonCPU, HexagonCPUClass, HEXAGON_CPU)
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OBJECT_DECLARE_CPU_TYPE(HexagonCPU, HexagonCPUClass, HEXAGON_CPU)
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typedef struct HexagonCPUClass {
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/*< private >*/
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@@ -140,7 +140,7 @@ typedef struct HexagonCPUClass {
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DeviceReset parent_reset;
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} HexagonCPUClass;
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typedef struct HexagonCPU {
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struct HexagonCPU {
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/*< private >*/
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CPUState parent_obj;
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/*< public >*/
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@@ -149,7 +149,7 @@ typedef struct HexagonCPU {
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bool lldb_compat;
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target_ulong lldb_stack_adjust;
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} HexagonCPU;
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};
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#include "cpu_bits.h"
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@@ -25,8 +25,7 @@
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#define TYPE_HPPA_CPU "hppa-cpu"
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OBJECT_DECLARE_TYPE(HPPACPU, HPPACPUClass,
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HPPA_CPU)
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OBJECT_DECLARE_CPU_TYPE(HPPACPU, HPPACPUClass, HPPA_CPU)
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/**
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* HPPACPUClass:
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@@ -223,8 +223,6 @@ struct HPPACPU {
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QEMUTimer *alarm_timer;
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};
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typedef HPPACPU ArchCPU;
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#include "exec/cpu-all.h"
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static inline int cpu_mmu_index(CPUHPPAState *env, bool ifetch)
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@@ -30,8 +30,7 @@
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#define TYPE_X86_CPU "i386-cpu"
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#endif
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OBJECT_DECLARE_TYPE(X86CPU, X86CPUClass,
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X86_CPU)
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OBJECT_DECLARE_CPU_TYPE(X86CPU, X86CPUClass, X86_CPU)
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typedef struct X86CPUModel X86CPUModel;
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@@ -2074,8 +2074,6 @@ static inline int cpu_mmu_index_kernel(CPUX86State *env)
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#define CC_SRC2 (env->cc_src2)
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#define CC_OP (env->cc_op)
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typedef X86CPU ArchCPU;
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#include "exec/cpu-all.h"
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#include "svm.h"
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@@ -25,8 +25,7 @@
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#define TYPE_M68K_CPU "m68k-cpu"
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OBJECT_DECLARE_TYPE(M68kCPU, M68kCPUClass,
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M68K_CPU)
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OBJECT_DECLARE_CPU_TYPE(M68kCPU, M68kCPUClass, M68K_CPU)
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/*
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* M68kCPUClass:
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@@ -574,8 +574,6 @@ void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
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int mmu_idx, MemTxAttrs attrs,
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MemTxResult response, uintptr_t retaddr);
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typedef M68kCPU ArchCPU;
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#include "exec/cpu-all.h"
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/* TB flags */
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@@ -25,8 +25,7 @@
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#define TYPE_MICROBLAZE_CPU "microblaze-cpu"
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OBJECT_DECLARE_TYPE(MicroBlazeCPU, MicroBlazeCPUClass,
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MICROBLAZE_CPU)
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OBJECT_DECLARE_CPU_TYPE(MicroBlazeCPU, MicroBlazeCPUClass, MICROBLAZE_CPU)
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/**
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* MicroBlazeCPUClass:
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@@ -394,8 +394,6 @@ void mb_tcg_init(void);
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#define MMU_USER_IDX 2
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/* See NB_MMU_MODES further up the file. */
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typedef MicroBlazeCPU ArchCPU;
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#include "exec/cpu-all.h"
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/* Ensure there is no overlap between the two masks. */
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@@ -29,8 +29,7 @@
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#define TYPE_MIPS_CPU "mips-cpu"
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#endif
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OBJECT_DECLARE_TYPE(MIPSCPU, MIPSCPUClass,
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MIPS_CPU)
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OBJECT_DECLARE_CPU_TYPE(MIPSCPU, MIPSCPUClass, MIPS_CPU)
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/**
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* MIPSCPUClass:
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@@ -1217,8 +1217,6 @@ static inline int cpu_mmu_index(CPUMIPSState *env, bool ifetch)
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return hflags_mmu_index(env->hflags);
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}
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typedef MIPSCPU ArchCPU;
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#include "exec/cpu-all.h"
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/* Exceptions */
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