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target/arm: Add CP_REG_AA32_64BIT_{SHIFT,MASK}

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Give a name to the bit we're already using.

Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson
2025-09-25 15:42:34 +01:00
committed by Peter Maydell
parent 1e3c93b161
commit 8434f54f3e
1 changed files with 10 additions and 5 deletions
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target/arm/cpregs.h
+10 -5
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@@ -178,9 +178,14 @@ enum {
#define CP_REG_NS_SHIFT 29
#define CP_REG_NS_MASK (1 << CP_REG_NS_SHIFT)
/* Distinguish 32-bit and 64-bit views of AArch32 system registers. */
#define CP_REG_AA32_64BIT_SHIFT 15
#define CP_REG_AA32_64BIT_MASK (1 << CP_REG_AA32_64BIT_SHIFT)
#define ENCODE_CP_REG(cp, is64, ns, crn, crm, opc1, opc2) \
((ns) << CP_REG_NS_SHIFT | ((cp) << 16) | ((is64) << 15) | \
((crn) << 11) | ((crm) << 7) | ((opc1) << 3) | (opc2))
(((ns) << CP_REG_NS_SHIFT) | \
((is64) << CP_REG_AA32_64BIT_SHIFT) | \
((cp) << 16) | ((crn) << 11) | ((crm) << 7) | ((opc1) << 3) | (opc2))
#define ENCODE_AA64_CP_REG(cp, crn, crm, op0, op1, op2) \
(CP_REG_AA64_MASK | \
@@ -202,7 +207,7 @@ static inline uint32_t kvm_to_cpreg_id(uint64_t kvmid)
cpregid |= CP_REG_AA64_MASK;
} else {
if ((kvmid & CP_REG_SIZE_MASK) == CP_REG_SIZE_U64) {
cpregid |= (1 << 15);
cpregid |= CP_REG_AA32_64BIT_MASK;
}
/*
@@ -226,8 +231,8 @@ static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid)
kvmid = cpregid & ~CP_REG_AA64_MASK;
kvmid |= CP_REG_SIZE_U64 | CP_REG_ARM64;
} else {
kvmid = cpregid & ~(1 << 15);
if (cpregid & (1 << 15)) {
kvmid = cpregid & ~CP_REG_AA32_64BIT_MASK;
if (cpregid & CP_REG_AA32_64BIT_MASK) {
kvmid |= CP_REG_SIZE_U64 | CP_REG_ARM;
} else {
kvmid |= CP_REG_SIZE_U32 | CP_REG_ARM;