target-tricore: add opd trap generation

Browse Source

If an instruction uses a 64 bit register which consists of an even-odd pair
of 32 bit registers and if the register specifier in the instruction is
odd an opd trap is raised.

Reviewed-by: Richard Henderson  <rth@twiddle.net>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <1455889426-1923-5-git-send-email-kbastian@mail.uni-paderborn.de>

...

This commit is contained in:

Bastian Koppelmann

2016-02-25 12:54:50 +01:00

parent f678f671ba

commit 828066c78a

1 changed files with 277 additions and 8 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download Patch File Download Diff File Expand all files Collapse all files

target-tricore/translate.c

+277 -8

File diff suppressed because it is too large Load Diff