mirror of
https://github.com/izzy2lost/xemu.git
synced 2026-07-06 00:20:22 -07:00
Merge tag 'pull-request-2023-06-06' of https://gitlab.com/thuth/qemu into staging
* Fix emulated LCCB, LOCFHR, MXDB and MXDBR s390x instructions * Fix the malta machine on s390x (big endian) hosts * Emulate /proc/cpuinfo on s390x * Remove pointless QOM casts * Improve the inclusion logic for libkeyutils and ipmi-bt-test in meson.build # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmR+ycgRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbWXXw//WPz3ng50KLS+M1t3/ULEjO6XkGfP2LQZ # RsZq3hf9THFPZgcREk+6SQvttOSTuvHNfakfujS6U1Ou5thReWqLe4itFW6+hB5j # kQ+Sm6YJ+fpezkBnSefcUoL5nA9VVKZ6KE6kxq5CUBZNoIk1sSsfrU8y8wjzW0yg # 2nraOcG10aLpO2BfvKHVEAhJtwl9pHJsFANmHC2/h2wC9BZIAzdxiytzdcJ909gN # AAa0hIrLK/oFgJjkSSxu+QTaVGPARXqkx5WV546F/zmDMFUWd9nrXaegwqxjgPBN # m9Ua0SXll5hX2Z57vjJWlbTYkD+JUB22L0N7p5/xzhYRpLVSq1pdveo9psrzIC3E # Bt7chZB58acQepJHxxa3UHDOHcnfdfaN+Dd9wD29wHr7nK8lOcsen7/7V+5YXomc # qenkCtkpjKTl07OBxe6MDGZtPZYA8fK1CjEyYwHCe8QvxEzsyg96Bm3j4N2VPxQU # +f/sFPX7SgogZI4mB4wdoxOF1RmQ+DXQ2tnB970txZRkmFq2jJHpW86jkkbq2Jl1 # KIjgdIXjVgy+MPtuQzO5cT+jfhGQL7FQynGXHjv/UidBid5XD3TDVNa9AthN3Mng # +rPT90VJ7j9soMqvmNT1COSIRD+M49dQKBIQuq/gWplaTOHaAcJrCwYScwqe0u0P # zmjCNeuPVw8= # =dfJr # -----END PGP SIGNATURE----- # gpg: Signature made Mon 05 Jun 2023 10:53:12 PM PDT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [unknown] # gpg: aka "Thomas Huth <thuth@redhat.com>" [unknown] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2023-06-06' of https://gitlab.com/thuth/qemu: linux-user: Emulate /proc/cpuinfo on s390x linux-user/elfload: Introduce elf_hwcap_str() on s390x linux-user/elfload: Expose get_elf_hwcap() on s390x s390x/tcg: Fix CPU address returned by STIDP bulk: Remove pointless QOM casts scripts: Add qom-cast-macro-clean-cocci-gen.py hw/mips/malta: Fix the malta machine on big endian hosts gitlab-ci: Remove unused Python package tests/qtest: Run ipmi-bt-test only if CONFIG_IPMI_EXTERN is set tests/tcg/s390x: Test MXDB and MXDBR target/s390x: Fix MXDB and MXDBR Add conditional dependency for libkeyutils tests/tcg/s390x: Test single-stepping SVC linux-user/s390x: Fix single-stepping SVC tests/tcg/s390x: Test LOCFHR target/s390x: Fix LOCFHR taking the wrong half of R2 tests/tcg/s390x: Test LCBB target/s390x: Fix LCBB overwriting the top 32 bits Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
@@ -7,7 +7,6 @@
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before_script:
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- export TAG="$CI_REGISTRY_IMAGE/qemu/$NAME:latest"
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- export COMMON_TAG="$CI_REGISTRY/qemu-project/qemu/qemu/$NAME:latest"
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- apk add python3
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- docker login $CI_REGISTRY -u "$CI_REGISTRY_USER" -p "$CI_REGISTRY_PASSWORD"
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- until docker info; do sleep 1; done
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script:
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@@ -3046,6 +3046,7 @@ F: include/qom/
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F: qapi/qom.json
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F: qapi/qdev.json
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F: scripts/coccinelle/qom-parent-type.cocci
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F: scripts/qom-cast-macro-clean-cocci-gen.py
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F: softmmu/qdev-monitor.c
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F: stubs/qdev.c
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F: qom/
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+2
-2
@@ -397,7 +397,7 @@ static void coroutine_fn GRAPH_RDLOCK nbd_reconnect_attempt(BDRVNBDState *s)
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/* Finalize previous connection if any */
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if (s->ioc) {
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qio_channel_detach_aio_context(QIO_CHANNEL(s->ioc));
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qio_channel_detach_aio_context(s->ioc);
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yank_unregister_function(BLOCKDEV_YANK_INSTANCE(s->bs->node_name),
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nbd_yank, s->bs);
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object_unref(OBJECT(s->ioc));
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@@ -1455,7 +1455,7 @@ static void nbd_yank(void *opaque)
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BDRVNBDState *s = (BDRVNBDState *)bs->opaque;
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QEMU_LOCK_GUARD(&s->requests_lock);
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qio_channel_shutdown(QIO_CHANNEL(s->ioc), QIO_CHANNEL_SHUTDOWN_BOTH, NULL);
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qio_channel_shutdown(s->ioc, QIO_CHANNEL_SHUTDOWN_BOTH, NULL);
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s->state = NBD_CLIENT_QUIT;
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}
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+1
-1
@@ -334,7 +334,7 @@ static void char_pty_open(Chardev *chr,
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s = PTY_CHARDEV(chr);
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s->ioc = QIO_CHANNEL(qio_channel_file_new_fd(master_fd));
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name = g_strdup_printf("chardev-pty-%s", chr->label);
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qio_channel_set_name(QIO_CHANNEL(s->ioc), name);
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qio_channel_set_name(s->ioc, name);
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g_free(name);
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s->timer_src = NULL;
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*be_opened = false;
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+1
-1
@@ -1250,7 +1250,7 @@ static void musicpal_init(MachineState *machine)
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uart_orgate = DEVICE(object_new(TYPE_OR_IRQ));
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object_property_set_int(OBJECT(uart_orgate), "num-lines", 2, &error_fatal);
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qdev_realize_and_unref(uart_orgate, NULL, &error_fatal);
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qdev_connect_gpio_out(DEVICE(uart_orgate), 0,
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qdev_connect_gpio_out(uart_orgate, 0,
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qdev_get_gpio_in(pic, MP_UART_SHARED_IRQ));
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serial_mm_init(address_space_mem, MP_UART1_BASE, 2,
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@@ -327,7 +327,7 @@ static void versal_create_rtc(Versal *s, qemu_irq *pic)
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object_initialize_child(OBJECT(s), "rtc", &s->pmc.rtc,
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TYPE_XLNX_ZYNQMP_RTC);
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sbd = SYS_BUS_DEVICE(&s->pmc.rtc);
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sysbus_realize(SYS_BUS_DEVICE(sbd), &error_fatal);
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sysbus_realize(sbd, &error_fatal);
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mr = sysbus_mmio_get_region(sbd, 0);
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memory_region_add_subregion(&s->mr_ps, MM_PMC_RTC, mr);
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@@ -364,11 +364,11 @@ vhost_user_gpu_gl_flushed(VirtIOGPUBase *b)
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VhostUserGPU *g = VHOST_USER_GPU(b);
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if (g->backend_blocked) {
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vhost_user_gpu_unblock(VHOST_USER_GPU(g));
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vhost_user_gpu_unblock(g);
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g->backend_blocked = false;
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}
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vhost_user_gpu_update_blocked(VHOST_USER_GPU(g), false);
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vhost_user_gpu_update_blocked(g, false);
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}
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static bool
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@@ -276,7 +276,7 @@ static void loongarch_extioi_instance_init(Object *obj)
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int i, cpu, pin;
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for (i = 0; i < EXTIOI_IRQS; i++) {
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sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq[i]);
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sysbus_init_irq(dev, &s->irq[i]);
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}
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qdev_init_gpio_in(DEVICE(obj), extioi_setirq, EXTIOI_IRQS);
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@@ -284,14 +284,14 @@ static void loongarch_extioi_instance_init(Object *obj)
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for (cpu = 0; cpu < EXTIOI_CPUS; cpu++) {
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memory_region_init_io(&s->extioi_iocsr_mem[cpu], OBJECT(s), &extioi_ops,
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s, "extioi_iocsr", 0x900);
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sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->extioi_iocsr_mem[cpu]);
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sysbus_init_mmio(dev, &s->extioi_iocsr_mem[cpu]);
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for (pin = 0; pin < LS3A_INTC_IP; pin++) {
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qdev_init_gpio_out(DEVICE(obj), &s->parent_irq[cpu][pin], 1);
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}
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}
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memory_region_init_io(&s->extioi_system_mem, OBJECT(s), &extioi_ops,
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s, "extioi_system_mem", 0x900);
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sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->extioi_system_mem);
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sysbus_init_mmio(dev, &s->extioi_system_mem);
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}
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static void loongarch_extioi_class_init(ObjectClass *klass, void *data)
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+1
-1
@@ -525,7 +525,7 @@ static void q800_init(MachineState *machine)
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qdev_realize_and_unref(escc_orgate, NULL, &error_fatal);
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sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(escc_orgate, 0));
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sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(escc_orgate, 1));
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qdev_connect_gpio_out(DEVICE(escc_orgate), 0,
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qdev_connect_gpio_out(escc_orgate, 0,
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qdev_get_gpio_in(glue, GLUE_IRQ_IN_ESCC));
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sysbus_mmio_map(sysbus, 0, SCC_BASE);
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+2
-2
@@ -629,9 +629,9 @@ static void bl_setup_gt64120_jump_kernel(void **p, uint64_t run_addr,
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/* Bus endianess is always reversed */
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#if TARGET_BIG_ENDIAN
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#define cpu_to_gt32 cpu_to_le32
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#define cpu_to_gt32(x) (x)
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#else
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#define cpu_to_gt32 cpu_to_be32
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#define cpu_to_gt32(x) bswap32(x)
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#endif
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/* setup MEM-to-PCI0 mapping as done by YAMON */
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@@ -656,7 +656,7 @@ static void bonito_pci_realize(PCIDevice *dev, Error **errp)
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PCIBonitoState *s = PCI_BONITO(dev);
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SysBusDevice *sysbus = SYS_BUS_DEVICE(s->pcihost);
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PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
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BonitoState *bs = BONITO_PCI_HOST_BRIDGE(s->pcihost);
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BonitoState *bs = s->pcihost;
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MemoryRegion *pcimem_alias = g_new(MemoryRegion, 1);
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/*
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+1
-1
@@ -744,7 +744,7 @@ static void pnv_lpc_realize(DeviceState *dev, Error **errp)
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memory_region_add_subregion(&lpc->opb_mr, LPC_HC_REGS_OPB_ADDR,
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&lpc->lpc_hc_regs);
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qdev_init_gpio_out(DEVICE(dev), &lpc->psi_irq, 1);
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qdev_init_gpio_out(dev, &lpc->psi_irq, 1);
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}
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static void pnv_lpc_class_init(ObjectClass *klass, void *data)
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+1
-1
@@ -278,7 +278,7 @@ static void pnv_occ_realize(DeviceState *dev, Error **errp)
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occ, "occ-common-area",
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PNV_OCC_SENSOR_DATA_BLOCK_SIZE);
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qdev_init_gpio_out(DEVICE(dev), &occ->psi_irq, 1);
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qdev_init_gpio_out(dev, &occ->psi_irq, 1);
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}
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static void pnv_occ_class_init(ObjectClass *klass, void *data)
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+1
-1
@@ -381,7 +381,7 @@ static void pnv_sbe_realize(DeviceState *dev, Error **errp)
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psc->xscom_mbox_ops, sbe, "xscom-sbe-mbox",
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psc->xscom_mbox_size);
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||||
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qdev_init_gpio_out(DEVICE(dev), &sbe->psi_irq, 1);
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qdev_init_gpio_out(dev, &sbe->psi_irq, 1);
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sbe->timer = timer_new_us(QEMU_CLOCK_VIRTUAL, sbe_timer, sbe);
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}
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+5
-5
@@ -1488,7 +1488,7 @@ static void virt_machine_init(MachineState *machine)
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for (i = 0; i < VIRTIO_COUNT; i++) {
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sysbus_create_simple("virtio-mmio",
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memmap[VIRT_VIRTIO].base + i * memmap[VIRT_VIRTIO].size,
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qdev_get_gpio_in(DEVICE(virtio_irqchip), VIRTIO_IRQ + i));
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qdev_get_gpio_in(virtio_irqchip, VIRTIO_IRQ + i));
|
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}
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gpex_pcie_init(system_memory,
|
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@@ -1499,16 +1499,16 @@ static void virt_machine_init(MachineState *machine)
|
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virt_high_pcie_memmap.base,
|
||||
virt_high_pcie_memmap.size,
|
||||
memmap[VIRT_PCIE_PIO].base,
|
||||
DEVICE(pcie_irqchip));
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||||
pcie_irqchip);
|
||||
|
||||
create_platform_bus(s, DEVICE(mmio_irqchip));
|
||||
create_platform_bus(s, mmio_irqchip);
|
||||
|
||||
serial_mm_init(system_memory, memmap[VIRT_UART0].base,
|
||||
0, qdev_get_gpio_in(DEVICE(mmio_irqchip), UART0_IRQ), 399193,
|
||||
0, qdev_get_gpio_in(mmio_irqchip, UART0_IRQ), 399193,
|
||||
serial_hd(0), DEVICE_LITTLE_ENDIAN);
|
||||
|
||||
sysbus_create_simple("goldfish_rtc", memmap[VIRT_RTC].base,
|
||||
qdev_get_gpio_in(DEVICE(mmio_irqchip), RTC_IRQ));
|
||||
qdev_get_gpio_in(mmio_irqchip, RTC_IRQ));
|
||||
|
||||
virt_flash_create(s);
|
||||
|
||||
|
||||
+1
-1
@@ -154,7 +154,7 @@ static void register_icu(RX62NState *s)
|
||||
sysbus_connect_irq(icu, 0, qdev_get_gpio_in(DEVICE(&s->cpu), RX_CPU_IRQ));
|
||||
sysbus_connect_irq(icu, 1, qdev_get_gpio_in(DEVICE(&s->cpu), RX_CPU_FIR));
|
||||
sysbus_connect_irq(icu, 2, s->irq[SWI]);
|
||||
sysbus_mmio_map(SYS_BUS_DEVICE(icu), 0, RX62N_ICU_BASE);
|
||||
sysbus_mmio_map(icu, 0, RX62N_ICU_BASE);
|
||||
}
|
||||
|
||||
static void register_tmr(RX62NState *s, int unit)
|
||||
|
||||
+9
-9
@@ -79,7 +79,7 @@ struct PCIESPState {
|
||||
|
||||
static void esp_pci_handle_idle(PCIESPState *pci, uint32_t val)
|
||||
{
|
||||
ESPState *s = ESP(&pci->esp);
|
||||
ESPState *s = &pci->esp;
|
||||
|
||||
trace_esp_pci_dma_idle(val);
|
||||
esp_dma_enable(s, 0, 0);
|
||||
@@ -93,7 +93,7 @@ static void esp_pci_handle_blast(PCIESPState *pci, uint32_t val)
|
||||
|
||||
static void esp_pci_handle_abort(PCIESPState *pci, uint32_t val)
|
||||
{
|
||||
ESPState *s = ESP(&pci->esp);
|
||||
ESPState *s = &pci->esp;
|
||||
|
||||
trace_esp_pci_dma_abort(val);
|
||||
if (s->current_req) {
|
||||
@@ -103,7 +103,7 @@ static void esp_pci_handle_abort(PCIESPState *pci, uint32_t val)
|
||||
|
||||
static void esp_pci_handle_start(PCIESPState *pci, uint32_t val)
|
||||
{
|
||||
ESPState *s = ESP(&pci->esp);
|
||||
ESPState *s = &pci->esp;
|
||||
|
||||
trace_esp_pci_dma_start(val);
|
||||
|
||||
@@ -161,7 +161,7 @@ static void esp_pci_dma_write(PCIESPState *pci, uint32_t saddr, uint32_t val)
|
||||
|
||||
static uint32_t esp_pci_dma_read(PCIESPState *pci, uint32_t saddr)
|
||||
{
|
||||
ESPState *s = ESP(&pci->esp);
|
||||
ESPState *s = &pci->esp;
|
||||
uint32_t val;
|
||||
|
||||
val = pci->dma_regs[saddr];
|
||||
@@ -183,7 +183,7 @@ static void esp_pci_io_write(void *opaque, hwaddr addr,
|
||||
uint64_t val, unsigned int size)
|
||||
{
|
||||
PCIESPState *pci = opaque;
|
||||
ESPState *s = ESP(&pci->esp);
|
||||
ESPState *s = &pci->esp;
|
||||
|
||||
if (size < 4 || addr & 3) {
|
||||
/* need to upgrade request: we only support 4-bytes accesses */
|
||||
@@ -228,7 +228,7 @@ static uint64_t esp_pci_io_read(void *opaque, hwaddr addr,
|
||||
unsigned int size)
|
||||
{
|
||||
PCIESPState *pci = opaque;
|
||||
ESPState *s = ESP(&pci->esp);
|
||||
ESPState *s = &pci->esp;
|
||||
uint32_t ret;
|
||||
|
||||
if (addr < 0x40) {
|
||||
@@ -315,7 +315,7 @@ static const MemoryRegionOps esp_pci_io_ops = {
|
||||
static void esp_pci_hard_reset(DeviceState *dev)
|
||||
{
|
||||
PCIESPState *pci = PCI_ESP(dev);
|
||||
ESPState *s = ESP(&pci->esp);
|
||||
ESPState *s = &pci->esp;
|
||||
|
||||
esp_hard_reset(s);
|
||||
pci->dma_regs[DMA_CMD] &= ~(DMA_CMD_DIR | DMA_CMD_INTE_D | DMA_CMD_INTE_P
|
||||
@@ -366,7 +366,7 @@ static void esp_pci_scsi_realize(PCIDevice *dev, Error **errp)
|
||||
{
|
||||
PCIESPState *pci = PCI_ESP(dev);
|
||||
DeviceState *d = DEVICE(dev);
|
||||
ESPState *s = ESP(&pci->esp);
|
||||
ESPState *s = &pci->esp;
|
||||
uint8_t *pci_conf;
|
||||
|
||||
if (!qdev_realize(DEVICE(s), NULL, errp)) {
|
||||
@@ -394,7 +394,7 @@ static void esp_pci_scsi_realize(PCIDevice *dev, Error **errp)
|
||||
static void esp_pci_scsi_exit(PCIDevice *d)
|
||||
{
|
||||
PCIESPState *pci = PCI_ESP(d);
|
||||
ESPState *s = ESP(&pci->esp);
|
||||
ESPState *s = &pci->esp;
|
||||
|
||||
qemu_free_irq(s->irq);
|
||||
}
|
||||
|
||||
+2
-2
@@ -982,7 +982,7 @@ static void sun4m_hw_init(MachineState *machine)
|
||||
qdev_realize_and_unref(ms_kb_orgate, NULL, &error_fatal);
|
||||
sysbus_connect_irq(s, 0, qdev_get_gpio_in(ms_kb_orgate, 0));
|
||||
sysbus_connect_irq(s, 1, qdev_get_gpio_in(ms_kb_orgate, 1));
|
||||
qdev_connect_gpio_out(DEVICE(ms_kb_orgate), 0, slavio_irq[14]);
|
||||
qdev_connect_gpio_out(ms_kb_orgate, 0, slavio_irq[14]);
|
||||
|
||||
dev = qdev_new(TYPE_ESCC);
|
||||
qdev_prop_set_uint32(dev, "disabled", 0);
|
||||
@@ -1004,7 +1004,7 @@ static void sun4m_hw_init(MachineState *machine)
|
||||
qdev_realize_and_unref(serial_orgate, NULL, &error_fatal);
|
||||
sysbus_connect_irq(s, 0, qdev_get_gpio_in(serial_orgate, 0));
|
||||
sysbus_connect_irq(s, 1, qdev_get_gpio_in(serial_orgate, 1));
|
||||
qdev_connect_gpio_out(DEVICE(serial_orgate), 0, slavio_irq[15]);
|
||||
qdev_connect_gpio_out(serial_orgate, 0, slavio_irq[15]);
|
||||
|
||||
if (hwdef->apc_base) {
|
||||
apc_init(hwdef->apc_base, qemu_allocate_irq(cpu_halt_signal, NULL, 0));
|
||||
|
||||
@@ -42,7 +42,7 @@ static MemoryRegion *virtio_mem_pci_get_memory_region(MemoryDeviceState *md,
|
||||
Error **errp)
|
||||
{
|
||||
VirtIOMEMPCI *pci_mem = VIRTIO_MEM_PCI(md);
|
||||
VirtIOMEM *vmem = VIRTIO_MEM(&pci_mem->vdev);
|
||||
VirtIOMEM *vmem = &pci_mem->vdev;
|
||||
VirtIOMEMClass *vmc = VIRTIO_MEM_GET_CLASS(vmem);
|
||||
|
||||
return vmc->get_memory_region(vmem, errp);
|
||||
@@ -60,7 +60,7 @@ static void virtio_mem_pci_fill_device_info(const MemoryDeviceState *md,
|
||||
{
|
||||
VirtioMEMDeviceInfo *vi = g_new0(VirtioMEMDeviceInfo, 1);
|
||||
VirtIOMEMPCI *pci_mem = VIRTIO_MEM_PCI(md);
|
||||
VirtIOMEM *vmem = VIRTIO_MEM(&pci_mem->vdev);
|
||||
VirtIOMEM *vmem = &pci_mem->vdev;
|
||||
VirtIOMEMClass *vpc = VIRTIO_MEM_GET_CLASS(vmem);
|
||||
DeviceState *dev = DEVICE(md);
|
||||
|
||||
@@ -123,7 +123,7 @@ static void virtio_mem_pci_instance_init(Object *obj)
|
||||
TYPE_VIRTIO_MEM);
|
||||
|
||||
dev->size_change_notifier.notify = virtio_mem_pci_size_change_notify;
|
||||
vmem = VIRTIO_MEM(&dev->vdev);
|
||||
vmem = &dev->vdev;
|
||||
vmc = VIRTIO_MEM_GET_CLASS(vmem);
|
||||
/*
|
||||
* We never remove the notifier again, as we expect both devices to
|
||||
|
||||
@@ -42,7 +42,7 @@ static MemoryRegion *virtio_pmem_pci_get_memory_region(MemoryDeviceState *md,
|
||||
Error **errp)
|
||||
{
|
||||
VirtIOPMEMPCI *pci_pmem = VIRTIO_PMEM_PCI(md);
|
||||
VirtIOPMEM *pmem = VIRTIO_PMEM(&pci_pmem->vdev);
|
||||
VirtIOPMEM *pmem = &pci_pmem->vdev;
|
||||
VirtIOPMEMClass *vpc = VIRTIO_PMEM_GET_CLASS(pmem);
|
||||
|
||||
return vpc->get_memory_region(pmem, errp);
|
||||
@@ -52,7 +52,7 @@ static uint64_t virtio_pmem_pci_get_plugged_size(const MemoryDeviceState *md,
|
||||
Error **errp)
|
||||
{
|
||||
VirtIOPMEMPCI *pci_pmem = VIRTIO_PMEM_PCI(md);
|
||||
VirtIOPMEM *pmem = VIRTIO_PMEM(&pci_pmem->vdev);
|
||||
VirtIOPMEM *pmem = &pci_pmem->vdev;
|
||||
VirtIOPMEMClass *vpc = VIRTIO_PMEM_GET_CLASS(pmem);
|
||||
MemoryRegion *mr = vpc->get_memory_region(pmem, errp);
|
||||
|
||||
@@ -65,7 +65,7 @@ static void virtio_pmem_pci_fill_device_info(const MemoryDeviceState *md,
|
||||
{
|
||||
VirtioPMEMDeviceInfo *vi = g_new0(VirtioPMEMDeviceInfo, 1);
|
||||
VirtIOPMEMPCI *pci_pmem = VIRTIO_PMEM_PCI(md);
|
||||
VirtIOPMEM *pmem = VIRTIO_PMEM(&pci_pmem->vdev);
|
||||
VirtIOPMEM *pmem = &pci_pmem->vdev;
|
||||
VirtIOPMEMClass *vpc = VIRTIO_PMEM_GET_CLASS(pmem);
|
||||
DeviceState *dev = DEVICE(md);
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user