mirror of
https://github.com/izzy2lost/xemu.git
synced 2026-07-06 00:20:22 -07:00
Merge remote-tracking branch 'qemu-kvm/memory/core' into staging
* qemu-kvm/memory/core: memory: get rid of cpu_register_io_memory() memory: dispatch directly via MemoryRegion exec: fix code tlb entry misused as iotlb in get_page_addr_code() memory: store section indices in iotlb instead of io indices memory: make phys_page_find() return an unadjusted section
This commit is contained in:
@@ -498,14 +498,6 @@ extern RAMList ram_list;
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extern const char *mem_path;
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extern int mem_prealloc;
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/* physical memory access */
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/* MMIO pages are identified by a combination of an IO device index and
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3 flags. The ROMD code stores the page ram offset in iotlb entry,
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so only a limited number of ids are avaiable. */
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#define IO_MEM_NB_ENTRIES (1 << TARGET_PAGE_BITS)
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/* Flags stored in the low bits of the TLB virtual address. These are
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defined so that fast path ram access is all zeros. */
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/* Zero if TLB entry is valid. */
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+5
-4
@@ -299,10 +299,11 @@ extern void *tci_tb_ptr;
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#if !defined(CONFIG_USER_ONLY)
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uint64_t io_mem_read(int index, target_phys_addr_t addr, unsigned size);
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void io_mem_write(int index, target_phys_addr_t addr, uint64_t value,
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unsigned size);
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extern struct MemoryRegion *io_mem_region[IO_MEM_NB_ENTRIES];
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struct MemoryRegion *iotlb_to_region(target_phys_addr_t index);
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uint64_t io_mem_read(struct MemoryRegion *mr, target_phys_addr_t addr,
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unsigned size);
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void io_mem_write(struct MemoryRegion *mr, target_phys_addr_t addr,
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uint64_t value, unsigned size);
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void tlb_fill(CPUState *env1, target_ulong addr, int is_write, int mmu_idx,
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void *retaddr);
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@@ -32,9 +32,6 @@ void qemu_ram_free(ram_addr_t addr);
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void qemu_ram_free_from_ptr(ram_addr_t addr);
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struct MemoryRegion;
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int cpu_register_io_memory(MemoryRegion *mr);
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void cpu_unregister_io_memory(int table_address);
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struct MemoryRegionSection;
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void cpu_register_physical_memory_log(struct MemoryRegionSection *section,
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bool readonly);
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@@ -781,13 +781,11 @@ static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
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static void memory_region_destructor_iomem(MemoryRegion *mr)
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{
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cpu_unregister_io_memory(mr->ram_addr);
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}
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static void memory_region_destructor_rom_device(MemoryRegion *mr)
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{
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qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
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cpu_unregister_io_memory(mr->ram_addr & ~TARGET_PAGE_MASK);
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}
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static bool memory_region_wrong_endianness(MemoryRegion *mr)
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@@ -942,7 +940,7 @@ void memory_region_init_io(MemoryRegion *mr,
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mr->opaque = opaque;
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mr->terminates = true;
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mr->destructor = memory_region_destructor_iomem;
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mr->ram_addr = cpu_register_io_memory(mr);
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mr->ram_addr = ~(ram_addr_t)0;
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}
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void memory_region_init_ram(MemoryRegion *mr,
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@@ -992,7 +990,6 @@ void memory_region_init_rom_device(MemoryRegion *mr,
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mr->rom_device = true;
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mr->destructor = memory_region_destructor_rom_device;
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mr->ram_addr = qemu_ram_alloc(size, mr);
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mr->ram_addr |= cpu_register_io_memory(mr);
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}
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static uint64_t invalid_read(void *opaque, target_phys_addr_t addr,
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@@ -1501,15 +1498,15 @@ void set_system_io_map(MemoryRegion *mr)
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memory_region_update_topology(NULL);
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}
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uint64_t io_mem_read(int io_index, target_phys_addr_t addr, unsigned size)
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uint64_t io_mem_read(MemoryRegion *mr, target_phys_addr_t addr, unsigned size)
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{
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return memory_region_dispatch_read(io_mem_region[io_index], addr, size);
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return memory_region_dispatch_read(mr, addr, size);
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}
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void io_mem_write(int io_index, target_phys_addr_t addr,
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void io_mem_write(MemoryRegion *mr, target_phys_addr_t addr,
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uint64_t val, unsigned size)
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{
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memory_region_dispatch_write(io_mem_region[io_index], addr, val, size);
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memory_region_dispatch_write(mr, addr, val, size);
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}
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typedef struct MemoryRegionList MemoryRegionList;
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+20
-20
@@ -62,27 +62,27 @@ static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr,
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void *retaddr)
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{
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DATA_TYPE res;
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int index;
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index = physaddr & (IO_MEM_NB_ENTRIES - 1);
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MemoryRegion *mr = iotlb_to_region(physaddr);
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physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
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env->mem_io_pc = (unsigned long)retaddr;
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if (index != io_mem_ram.ram_addr && index != io_mem_rom.ram_addr
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&& index != io_mem_unassigned.ram_addr
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&& index != io_mem_notdirty.ram_addr
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if (mr != &io_mem_ram && mr != &io_mem_rom
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&& mr != &io_mem_unassigned
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&& mr != &io_mem_notdirty
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&& !can_do_io(env)) {
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cpu_io_recompile(env, retaddr);
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}
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env->mem_io_vaddr = addr;
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#if SHIFT <= 2
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res = io_mem_read(index, physaddr, 1 << SHIFT);
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res = io_mem_read(mr, physaddr, 1 << SHIFT);
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#else
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#ifdef TARGET_WORDS_BIGENDIAN
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res = io_mem_read(index, physaddr, 4) << 32;
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res |= io_mem_read(index, physaddr + 4, 4);
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res = io_mem_read(mr, physaddr, 4) << 32;
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res |= io_mem_read(mr, physaddr + 4, 4);
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#else
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res = io_mem_read(index, physaddr, 4);
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res |= io_mem_read(index, physaddr + 4, 4) << 32;
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res = io_mem_read(mr, physaddr, 4);
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res |= io_mem_read(mr, physaddr + 4, 4) << 32;
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#endif
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#endif /* SHIFT > 2 */
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return res;
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@@ -207,12 +207,12 @@ static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr,
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target_ulong addr,
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void *retaddr)
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{
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int index;
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index = physaddr & (IO_MEM_NB_ENTRIES - 1);
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MemoryRegion *mr = iotlb_to_region(physaddr);
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physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
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if (index != io_mem_ram.ram_addr && index != io_mem_rom.ram_addr
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&& index != io_mem_unassigned.ram_addr
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&& index != io_mem_notdirty.ram_addr
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if (mr != &io_mem_ram && mr != &io_mem_rom
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&& mr != &io_mem_unassigned
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&& mr != &io_mem_notdirty
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&& !can_do_io(env)) {
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cpu_io_recompile(env, retaddr);
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}
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@@ -220,14 +220,14 @@ static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr,
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env->mem_io_vaddr = addr;
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env->mem_io_pc = (unsigned long)retaddr;
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#if SHIFT <= 2
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io_mem_write(index, physaddr, val, 1 << SHIFT);
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io_mem_write(mr, physaddr, val, 1 << SHIFT);
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#else
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#ifdef TARGET_WORDS_BIGENDIAN
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io_mem_write(index, physaddr, (val >> 32), 4);
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io_mem_write(index, physaddr + 4, (uint32_t)val, 4);
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io_mem_write(mr, physaddr, (val >> 32), 4);
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io_mem_write(mr, physaddr + 4, (uint32_t)val, 4);
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#else
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io_mem_write(index, physaddr, (uint32_t)val, 4);
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io_mem_write(index, physaddr + 4, val >> 32, 4);
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io_mem_write(mr, physaddr, (uint32_t)val, 4);
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io_mem_write(mr, physaddr + 4, val >> 32, 4);
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#endif
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#endif /* SHIFT > 2 */
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}
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