mirror of
https://github.com/izzy2lost/xemu.git
synced 2026-07-06 00:20:22 -07:00
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: features, cleanups, fixes more memslots support in libvhost-user support PCIe Gen5/Gen6 link speeds in pcie more traces in vdpa network simulation devices support in vdpa SMBIOS type 9 descriptor implementation Bump max_cpus to 4096 vcpus in q35 aw-bits and granule options in VIRTIO-IOMMU Support report NUMA nodes for device memory using GI in acpi Beginning of shutdown event support in pvpanic fixes, cleanups all over the place. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmXw0TMPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRp8x4H+gLMoGwaGAX7gDGPgn2Ix4j/3kO77ZJ9X9k/ # 1KqZu/9eMS1j2Ei+vZqf05w7qRjxxhwDq3ilEXF/+UFqgAehLqpRRB8j5inqvzYt # +jv0DbL11PBp/oFjWcytm5CbiVsvq8KlqCF29VNzc162XdtcduUOWagL96y8lJfZ # uPrOoyeR7SMH9lp3LLLHWgu+9W4nOS03RroZ6Umj40y5B7yR0Rrppz8lMw5AoQtr # 0gMRnFhYXeiW6CXdz+Tzcr7XfvkkYDi/j7ibiNSURLBfOpZa6Y8+kJGKxz5H1K1G # 6ZY4PBcOpQzl+NMrktPHogczgJgOK10t+1i/R3bGZYw2Qn/93Eg= # =C0UU # -----END PGP SIGNATURE----- # gpg: Signature made Tue 12 Mar 2024 22:03:31 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (68 commits) docs/specs/pvpanic: document shutdown event hw/cxl: Fix missing reserved data in CXL Device DVSEC hmat acpi: Fix out of bounds access due to missing use of indirection hmat acpi: Do not add Memory Proximity Domain Attributes Structure targetting non existent memory. qemu-options.hx: Document the virtio-iommu-pci aw-bits option hw/arm/virt: Set virtio-iommu aw-bits default value to 48 hw/i386/q35: Set virtio-iommu aw-bits default value to 39 virtio-iommu: Add an option to define the input range width virtio-iommu: Trace domain range limits as unsigned int qemu-options.hx: Document the virtio-iommu-pci granule option virtio-iommu: Change the default granule to the host page size virtio-iommu: Add a granule property hw/i386/acpi-build: Add support for SRAT Generic Initiator structures hw/acpi: Implement the SRAT GI affinity structure qom: new object to associate device to NUMA node hw/i386/pc: Inline pc_cmos_init() into pc_cmos_init_late() and remove it hw/i386/pc: Set "normal" boot device order in pc_basic_device_init() hw/i386/pc: Avoid one use of the current_machine global hw/i386/pc: Remove "rtc_state" link again Revert "hw/i386/pc: Confine system flash handling to pc_sysfw" ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # hw/core/machine.c
This commit is contained in:
Peter Maydell
@@ -2370,6 +2370,11 @@ F: hw/virtio/vhost-user-scmi*
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F: include/hw/virtio/vhost-user-scmi.h
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F: tests/qtest/libqos/virtio-scmi.*
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vdpa-net
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M: Hao Chen <chenh@yusur.tech>
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S: Maintained
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F: docs/system/devices/vdpa-net.rst
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virtio-crypto
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M: Gonglei <arei.gonglei@huawei.com>
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S: Supported
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@@ -1839,7 +1839,9 @@ is sent by the front-end.
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When the ``VHOST_USER_PROTOCOL_F_SHARED_OBJECT`` protocol
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feature has been successfully negotiated, this message can be submitted
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by the backend to remove themselves from to the virtio-dmabuf shared
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table API. The shared table will remove the back-end device associated with
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table API. Only the back-end owning the entry (i.e., the one that first added
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it) will have permission to remove it. Otherwise, the message is ignored.
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The shared table will remove the back-end device associated with
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the UUID. If ``VHOST_USER_PROTOCOL_F_REPLY_ACK`` is negotiated, and the
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back-end sets the ``VHOST_USER_NEED_REPLY`` flag, the front-end must respond
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with zero when operation is successfully completed, or non-zero otherwise.
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@@ -29,6 +29,8 @@ bit 1
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a guest panic has happened and will be handled by the guest;
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the host should record it or report it, but should not affect
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the execution of the guest.
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bit 2
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a regular guest shutdown has happened and should be processed by the host
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PCI Interface
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-------------
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@@ -99,3 +99,4 @@ Emulated Devices
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devices/canokey.rst
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devices/usb-u2f.rst
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devices/igb.rst
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devices/vdpa-net.rst
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@@ -0,0 +1,121 @@
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vdpa net
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============
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This document explains the setup and usage of the vdpa network device.
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The vdpa network device is a paravirtualized vdpa emulate device.
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Description
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-----------
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VDPA net devices support dirty page bitmap mark and vring state saving and recovery.
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Users can use this VDPA device for live migration simulation testing in a nested virtualization environment.
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Registers layout
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----------------
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The vdpa device add live migrate registers layout as follow::
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Offset Register Name Bitwidth Associated vq
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0x0 LM_LOGGING_CTRL 4bits
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0x10 LM_BASE_ADDR_LOW 32bits
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0x14 LM_BASE_ADDR_HIGH 32bits
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0x18 LM_END_ADDR_LOW 32bits
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0x1c LM_END_ADDR_HIGH 32bits
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0x20 LM_RING_STATE_OFFSET 32bits vq0
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0x24 LM_RING_STATE_OFFSET 32bits vq1
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0x28 LM_RING_STATE_OFFSET 32bits vq2
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......
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0x20+1023*4 LM_RING_STATE_OFFSET 32bits vq1023
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These registers are extended at the end of the notify bar space.
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Architecture diagram
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--------------------
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::
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|------------------------------------------------------------------------|
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| guest-L1-user-space |
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| |
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| |----------------------------------------|
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| | [virtio-net driver] |
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| | ^ guest-L2-src(iommu=on) |
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| |--------------|-------------------------|
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| | | qemu-L2-src(viommu) |
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| [dpdk-vdpa]<->[vhost socket]<-+->[vhost-user backend(iommu=on)] |
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--------------------------------------------------------------------------
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--------------------------------------------------------------------------
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| ^ guest-L1-kernel-space |
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| | |
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| [VFIO] |
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| ^ |
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| | guest-L1-src(iommu=on) |
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--------|-----------------------------------------------------------------
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--------|-----------------------------------------------------------------
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| [vdpa net device(iommu=on)] [manager nic device] |
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| | | |
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| | | |
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| [tap device] qemu-L1-src(viommu) | |
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------------------------------------------------+-------------------------
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|
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|
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--------------------- |
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| kernel net bridge |<-----
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| virbr0 |<----------------------------------
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--------------------- |
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|
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|
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-------------------------------------------------------------------------- |
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| guest-L1-user-space | |
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| | |
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| |----------------------------------------| |
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| | [virtio-net driver] | |
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| | ^ guest-L2-dst(iommu=on) | |
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| |--------------|-------------------------| |
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| | | qemu-L2-dst(viommu) | |
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| [dpdk-vdpa]<->[vhost socket]<-+->[vhost-user backend(iommu=on)] | |
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-------------------------------------------------------------------------- |
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-------------------------------------------------------------------------- |
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| ^ guest-L1-kernel-space | |
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| | | |
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| [VFIO] | |
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| ^ | |
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| | guest-L1-dst(iommu=on) | |
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--------|----------------------------------------------------------------- |
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--------|----------------------------------------------------------------- |
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| [vdpa net device(iommu=on)] [manager nic device]----------------+----
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| | |
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| | |
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| [tap device] qemu-L1-dst(viommu) |
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--------------------------------------------------------------------------
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Device properties
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-----------------
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The Virtio vdpa device can be configured with the following properties:
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* ``vdpa=on`` open vdpa device emulated.
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Usages
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--------
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This patch add virtio sriov support and vdpa live migrate support.
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You can open vdpa by set xml file as follow::
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<qemu:commandline xmlns:qemu='http://libvirt.org/schemas/domain/qemu/1.0'>
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<qemu:arg value='-device'/>
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<qemu:arg value='intel-iommu,intremap=on,device-iotlb=on,aw-bits=48'/>
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<qemu:arg value='-netdev'/>
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<qemu:arg value='tap,id=hostnet1,script=no,downscript=no,vhost=off'/>
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<qemu:arg value='-device'/>
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<qemu:arg value='virtio-net-pci,netdev=hostnet1,id=net1,mac=56:4a:b7:4f:4d:a9,bus=pci.6,addr=0x0,iommu_platform=on,ats=on,vdpa=on'/>
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</qemu:commandline>
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Limitations
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-----------
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1. Dependent on tap device with param ``vhost=off``.
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2. Nested virtualization environment only supports ``q35`` machines.
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3. Current only support split vring live migrate.
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@@ -0,0 +1,148 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved
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*/
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#include "qemu/osdep.h"
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#include "hw/acpi/acpi_generic_initiator.h"
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#include "hw/acpi/aml-build.h"
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#include "hw/boards.h"
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#include "hw/pci/pci_device.h"
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#include "qemu/error-report.h"
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typedef struct AcpiGenericInitiatorClass {
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ObjectClass parent_class;
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} AcpiGenericInitiatorClass;
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OBJECT_DEFINE_TYPE_WITH_INTERFACES(AcpiGenericInitiator, acpi_generic_initiator,
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ACPI_GENERIC_INITIATOR, OBJECT,
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{ TYPE_USER_CREATABLE },
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{ NULL })
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OBJECT_DECLARE_SIMPLE_TYPE(AcpiGenericInitiator, ACPI_GENERIC_INITIATOR)
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static void acpi_generic_initiator_init(Object *obj)
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{
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AcpiGenericInitiator *gi = ACPI_GENERIC_INITIATOR(obj);
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gi->node = MAX_NODES;
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gi->pci_dev = NULL;
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}
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static void acpi_generic_initiator_finalize(Object *obj)
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{
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AcpiGenericInitiator *gi = ACPI_GENERIC_INITIATOR(obj);
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g_free(gi->pci_dev);
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}
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static void acpi_generic_initiator_set_pci_device(Object *obj, const char *val,
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Error **errp)
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{
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AcpiGenericInitiator *gi = ACPI_GENERIC_INITIATOR(obj);
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gi->pci_dev = g_strdup(val);
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}
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static void acpi_generic_initiator_set_node(Object *obj, Visitor *v,
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const char *name, void *opaque,
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Error **errp)
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{
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AcpiGenericInitiator *gi = ACPI_GENERIC_INITIATOR(obj);
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MachineState *ms = MACHINE(qdev_get_machine());
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uint32_t value;
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if (!visit_type_uint32(v, name, &value, errp)) {
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return;
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}
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if (value >= MAX_NODES) {
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error_printf("%s: Invalid NUMA node specified\n",
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TYPE_ACPI_GENERIC_INITIATOR);
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exit(1);
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}
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gi->node = value;
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ms->numa_state->nodes[gi->node].has_gi = true;
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}
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static void acpi_generic_initiator_class_init(ObjectClass *oc, void *data)
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{
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object_class_property_add_str(oc, "pci-dev", NULL,
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acpi_generic_initiator_set_pci_device);
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object_class_property_add(oc, "node", "int", NULL,
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acpi_generic_initiator_set_node, NULL, NULL);
|
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}
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/*
|
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* ACPI 6.3:
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* Table 5-78 Generic Initiator Affinity Structure
|
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*/
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static void
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build_srat_generic_pci_initiator_affinity(GArray *table_data, int node,
|
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PCIDeviceHandle *handle)
|
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{
|
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uint8_t index;
|
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build_append_int_noprefix(table_data, 5, 1); /* Type */
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build_append_int_noprefix(table_data, 32, 1); /* Length */
|
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build_append_int_noprefix(table_data, 0, 1); /* Reserved */
|
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build_append_int_noprefix(table_data, 1, 1); /* Device Handle Type: PCI */
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build_append_int_noprefix(table_data, node, 4); /* Proximity Domain */
|
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/* Device Handle - PCI */
|
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build_append_int_noprefix(table_data, handle->segment, 2);
|
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build_append_int_noprefix(table_data, handle->bdf, 2);
|
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for (index = 0; index < 12; index++) {
|
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build_append_int_noprefix(table_data, 0, 1);
|
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}
|
||||
|
||||
build_append_int_noprefix(table_data, GEN_AFFINITY_ENABLED, 4); /* Flags */
|
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build_append_int_noprefix(table_data, 0, 4); /* Reserved */
|
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}
|
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|
||||
static int build_all_acpi_generic_initiators(Object *obj, void *opaque)
|
||||
{
|
||||
MachineState *ms = MACHINE(qdev_get_machine());
|
||||
AcpiGenericInitiator *gi;
|
||||
GArray *table_data = opaque;
|
||||
PCIDeviceHandle dev_handle;
|
||||
PCIDevice *pci_dev;
|
||||
Object *o;
|
||||
|
||||
if (!object_dynamic_cast(obj, TYPE_ACPI_GENERIC_INITIATOR)) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
gi = ACPI_GENERIC_INITIATOR(obj);
|
||||
if (gi->node >= ms->numa_state->num_nodes) {
|
||||
error_printf("%s: Specified node %d is invalid.\n",
|
||||
TYPE_ACPI_GENERIC_INITIATOR, gi->node);
|
||||
exit(1);
|
||||
}
|
||||
|
||||
o = object_resolve_path_type(gi->pci_dev, TYPE_PCI_DEVICE, NULL);
|
||||
if (!o) {
|
||||
error_printf("%s: Specified device must be a PCI device.\n",
|
||||
TYPE_ACPI_GENERIC_INITIATOR);
|
||||
exit(1);
|
||||
}
|
||||
|
||||
pci_dev = PCI_DEVICE(o);
|
||||
|
||||
dev_handle.segment = 0;
|
||||
dev_handle.bdf = PCI_BUILD_BDF(pci_bus_num(pci_get_bus(pci_dev)),
|
||||
pci_dev->devfn);
|
||||
|
||||
build_srat_generic_pci_initiator_affinity(table_data,
|
||||
gi->node, &dev_handle);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void build_srat_generic_pci_initiator(GArray *table_data)
|
||||
{
|
||||
object_child_foreach_recursive(object_get_root(),
|
||||
build_all_acpi_generic_initiators,
|
||||
table_data);
|
||||
}
|
||||
+13
-2
@@ -78,6 +78,7 @@ static void build_hmat_lb(GArray *table_data, HMAT_LB_Info *hmat_lb,
|
||||
uint32_t *initiator_list)
|
||||
{
|
||||
int i, index;
|
||||
uint32_t initiator_to_index[MAX_NODES] = {};
|
||||
HMAT_LB_Data *lb_data;
|
||||
uint16_t *entry_list;
|
||||
uint32_t base;
|
||||
@@ -121,6 +122,8 @@ static void build_hmat_lb(GArray *table_data, HMAT_LB_Info *hmat_lb,
|
||||
/* Initiator Proximity Domain List */
|
||||
for (i = 0; i < num_initiator; i++) {
|
||||
build_append_int_noprefix(table_data, initiator_list[i], 4);
|
||||
/* Reverse mapping for array possitions */
|
||||
initiator_to_index[initiator_list[i]] = i;
|
||||
}
|
||||
|
||||
/* Target Proximity Domain List */
|
||||
@@ -132,7 +135,8 @@ static void build_hmat_lb(GArray *table_data, HMAT_LB_Info *hmat_lb,
|
||||
entry_list = g_new0(uint16_t, num_initiator * num_target);
|
||||
for (i = 0; i < hmat_lb->list->len; i++) {
|
||||
lb_data = &g_array_index(hmat_lb->list, HMAT_LB_Data, i);
|
||||
index = lb_data->initiator * num_target + lb_data->target;
|
||||
index = initiator_to_index[lb_data->initiator] * num_target +
|
||||
lb_data->target;
|
||||
|
||||
entry_list[index] = (uint16_t)(lb_data->data / hmat_lb->base);
|
||||
}
|
||||
@@ -204,6 +208,13 @@ static void hmat_build_table_structs(GArray *table_data, NumaState *numa_state)
|
||||
build_append_int_noprefix(table_data, 0, 4); /* Reserved */
|
||||
|
||||
for (i = 0; i < numa_state->num_nodes; i++) {
|
||||
/*
|
||||
* Linux rejects whole HMAT table if a node with no memory
|
||||
* has one of these structures listing it as a target.
|
||||
*/
|
||||
if (!numa_state->nodes[i].node_mem) {
|
||||
continue;
|
||||
}
|
||||
flags = 0;
|
||||
|
||||
if (numa_state->nodes[i].initiator < MAX_NODES) {
|
||||
@@ -214,7 +225,7 @@ static void hmat_build_table_structs(GArray *table_data, NumaState *numa_state)
|
||||
}
|
||||
|
||||
for (i = 0; i < numa_state->num_nodes; i++) {
|
||||
if (numa_state->nodes[i].has_cpu) {
|
||||
if (numa_state->nodes[i].has_cpu || numa_state->nodes[i].has_gi) {
|
||||
initiator_list[num_initiator++] = i;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1,5 +1,6 @@
|
||||
acpi_ss = ss.source_set()
|
||||
acpi_ss.add(files(
|
||||
'acpi_generic_initiator.c',
|
||||
'acpi_interface.c',
|
||||
'aml-build.c',
|
||||
'bios-linker-loader.c',
|
||||
|
||||
@@ -57,6 +57,7 @@
|
||||
#include "migration/vmstate.h"
|
||||
#include "hw/acpi/ghes.h"
|
||||
#include "hw/acpi/viot.h"
|
||||
#include "hw/acpi/acpi_generic_initiator.h"
|
||||
#include "hw/virtio/virtio-acpi.h"
|
||||
#include "target/arm/multiprocessing.h"
|
||||
|
||||
@@ -504,6 +505,8 @@ build_srat(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
|
||||
}
|
||||
}
|
||||
|
||||
build_srat_generic_pci_initiator(table_data);
|
||||
|
||||
if (ms->nvdimms_state->is_enabled) {
|
||||
nvdimm_build_srat(table_data);
|
||||
}
|
||||
|
||||
@@ -85,11 +85,28 @@
|
||||
#include "hw/char/pl011.h"
|
||||
#include "qemu/guest-random.h"
|
||||
|
||||
static GlobalProperty arm_virt_compat[] = {
|
||||
{ TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "48" },
|
||||
};
|
||||
static const size_t arm_virt_compat_len = G_N_ELEMENTS(arm_virt_compat);
|
||||
|
||||
/*
|
||||
* This cannot be called from the virt_machine_class_init() because
|
||||
* TYPE_VIRT_MACHINE is abstract and mc->compat_props g_ptr_array_new()
|
||||
* only is called on virt non abstract class init.
|
||||
*/
|
||||
static void arm_virt_compat_set(MachineClass *mc)
|
||||
{
|
||||
compat_props_add(mc->compat_props, arm_virt_compat,
|
||||
arm_virt_compat_len);
|
||||
}
|
||||
|
||||
#define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
|
||||
static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
|
||||
void *data) \
|
||||
{ \
|
||||
MachineClass *mc = MACHINE_CLASS(oc); \
|
||||
arm_virt_compat_set(mc); \
|
||||
virt_machine_##major##_##minor##_options(mc); \
|
||||
mc->desc = "QEMU " # major "." # minor " ARM Virtual Machine"; \
|
||||
if (latest) { \
|
||||
|
||||
@@ -243,12 +243,13 @@ static void virtio_snd_handle_pcm_info(VirtIOSound *s,
|
||||
memset(&pcm_info[i].padding, 0, 5);
|
||||
}
|
||||
|
||||
cmd->payload_size = sizeof(virtio_snd_pcm_info) * count;
|
||||
cmd->resp.code = cpu_to_le32(VIRTIO_SND_S_OK);
|
||||
iov_from_buf(cmd->elem->in_sg,
|
||||
cmd->elem->in_num,
|
||||
sizeof(virtio_snd_hdr),
|
||||
pcm_info,
|
||||
sizeof(virtio_snd_pcm_info) * count);
|
||||
cmd->payload_size);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -749,7 +750,8 @@ process_cmd(VirtIOSound *s, virtio_snd_ctrl_command *cmd)
|
||||
0,
|
||||
&cmd->resp,
|
||||
sizeof(virtio_snd_hdr));
|
||||
virtqueue_push(cmd->vq, cmd->elem, sizeof(virtio_snd_hdr));
|
||||
virtqueue_push(cmd->vq, cmd->elem,
|
||||
sizeof(virtio_snd_hdr) + cmd->payload_size);
|
||||
virtio_notify(VIRTIO_DEVICE(s), cmd->vq);
|
||||
}
|
||||
|
||||
@@ -808,6 +810,7 @@ static void virtio_snd_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq)
|
||||
cmd->elem = elem;
|
||||
cmd->vq = vq;
|
||||
cmd->resp.code = cpu_to_le32(VIRTIO_SND_S_OK);
|
||||
/* implicit cmd->payload_size = 0; */
|
||||
QTAILQ_INSERT_TAIL(&s->cmdq, cmd, next);
|
||||
elem = virtqueue_pop(vq, sizeof(VirtQueueElement));
|
||||
}
|
||||
|
||||
@@ -30,10 +30,13 @@
|
||||
#include "exec/confidential-guest-support.h"
|
||||
#include "hw/virtio/virtio-pci.h"
|
||||
#include "hw/virtio/virtio-net.h"
|
||||
#include "hw/virtio/virtio-iommu.h"
|
||||
#include "audio/audio.h"
|
||||
|
||||
GlobalProperty hw_compat_8_2[] = {
|
||||
{ "migration", "zero-page-detection", "legacy"},
|
||||
{ TYPE_VIRTIO_IOMMU_PCI, "granule", "4k" },
|
||||
{ TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "64" },
|
||||
};
|
||||
const size_t hw_compat_8_2_len = G_N_ELEMENTS(hw_compat_8_2);
|
||||
|
||||
|
||||
+2
-1
@@ -227,7 +227,8 @@ void parse_numa_hmat_lb(NumaState *numa_state, NumaHmatLBOptions *node,
|
||||
node->target, numa_state->num_nodes);
|
||||
return;
|
||||
}
|
||||
if (!numa_info[node->initiator].has_cpu) {
|
||||
if (!numa_info[node->initiator].has_cpu &&
|
||||
!numa_info[node->initiator].has_gi) {
|
||||
error_setg(errp, "Invalid initiator=%d, it isn't an "
|
||||
"initiator proximity domain", node->initiator);
|
||||
return;
|
||||
|
||||
@@ -966,7 +966,7 @@ const PropertyInfo qdev_prop_off_auto_pcibar = {
|
||||
.set_default_value = qdev_propinfo_set_default_value_enum,
|
||||
};
|
||||
|
||||
/* --- PCIELinkSpeed 2_5/5/8/16 -- */
|
||||
/* --- PCIELinkSpeed 2_5/5/8/16/32/64 -- */
|
||||
|
||||
static void get_prop_pcielinkspeed(Object *obj, Visitor *v, const char *name,
|
||||
void *opaque, Error **errp)
|
||||
@@ -988,6 +988,12 @@ static void get_prop_pcielinkspeed(Object *obj, Visitor *v, const char *name,
|
||||
case QEMU_PCI_EXP_LNK_16GT:
|
||||
speed = PCIE_LINK_SPEED_16;
|
||||
break;
|
||||
case QEMU_PCI_EXP_LNK_32GT:
|
||||
speed = PCIE_LINK_SPEED_32;
|
||||
break;
|
||||
case QEMU_PCI_EXP_LNK_64GT:
|
||||
speed = PCIE_LINK_SPEED_64;
|
||||
break;
|
||||
default:
|
||||
/* Unreachable */
|
||||
abort();
|
||||
@@ -1021,6 +1027,12 @@ static void set_prop_pcielinkspeed(Object *obj, Visitor *v, const char *name,
|
||||
case PCIE_LINK_SPEED_16:
|
||||
*p = QEMU_PCI_EXP_LNK_16GT;
|
||||
break;
|
||||
case PCIE_LINK_SPEED_32:
|
||||
*p = QEMU_PCI_EXP_LNK_32GT;
|
||||
break;
|
||||
case PCIE_LINK_SPEED_64:
|
||||
*p = QEMU_PCI_EXP_LNK_64GT;
|
||||
break;
|
||||
default:
|
||||
/* Unreachable */
|
||||
abort();
|
||||
@@ -1029,7 +1041,7 @@ static void set_prop_pcielinkspeed(Object *obj, Visitor *v, const char *name,
|
||||
|
||||
const PropertyInfo qdev_prop_pcie_link_speed = {
|
||||
.name = "PCIELinkSpeed",
|
||||
.description = "2_5/5/8/16",
|
||||
.description = "2_5/5/8/16/32/64",
|
||||
.enum_table = &PCIELinkSpeed_lookup,
|
||||
.get = get_prop_pcielinkspeed,
|
||||
.set = set_prop_pcielinkspeed,
|
||||
|
||||
@@ -297,6 +297,7 @@ void cxl_component_register_init_common(uint32_t *reg_state,
|
||||
caps = 3;
|
||||
break;
|
||||
case CXL2_ROOT_PORT:
|
||||
case CXL2_RC:
|
||||
/* + Extended Security, + Snoop */
|
||||
caps = 5;
|
||||
break;
|
||||
@@ -326,8 +327,19 @@ void cxl_component_register_init_common(uint32_t *reg_state,
|
||||
CXL_##reg##_REGISTERS_OFFSET); \
|
||||
} while (0)
|
||||
|
||||
switch (type) {
|
||||
case CXL2_DEVICE:
|
||||
case CXL2_TYPE3_DEVICE:
|
||||
case CXL2_LOGICAL_DEVICE:
|
||||
case CXL2_ROOT_PORT:
|
||||
case CXL2_UPSTREAM_PORT:
|
||||
case CXL2_DOWNSTREAM_PORT:
|
||||
init_cap_reg(RAS, 2, CXL_RAS_CAPABILITY_VERSION);
|
||||
ras_init_common(reg_state, write_msk);
|
||||
ras_init_common(reg_state, write_msk);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
init_cap_reg(LINK, 4, CXL_LINK_CAPABILITY_VERSION);
|
||||
|
||||
@@ -335,9 +347,10 @@ void cxl_component_register_init_common(uint32_t *reg_state,
|
||||
return;
|
||||
}
|
||||
|
||||
init_cap_reg(HDM, 5, CXL_HDM_CAPABILITY_VERSION);
|
||||
hdm_init_common(reg_state, write_msk, type);
|
||||
|
||||
if (type != CXL2_ROOT_PORT) {
|
||||
init_cap_reg(HDM, 5, CXL_HDM_CAPABILITY_VERSION);
|
||||
hdm_init_common(reg_state, write_msk, type);
|
||||
}
|
||||
if (caps < 5) {
|
||||
return;
|
||||
}
|
||||
|
||||
@@ -68,6 +68,7 @@
|
||||
#include "hw/acpi/utils.h"
|
||||
#include "hw/acpi/pci.h"
|
||||
#include "hw/acpi/cxl.h"
|
||||
#include "hw/acpi/acpi_generic_initiator.h"
|
||||
|
||||
#include "qom/qom-qobject.h"
|
||||
#include "hw/i386/amd_iommu.h"
|
||||
@@ -2046,6 +2047,8 @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
|
||||
build_srat_memory(table_data, 0, 0, 0, MEM_AFFINITY_NOFLAGS);
|
||||
}
|
||||
|
||||
build_srat_generic_pci_initiator(table_data);
|
||||
|
||||
/*
|
||||
* Entry is required for Windows to enable memory hotplug in OS
|
||||
* and for Linux to enable SWIOTLB when booted with less than
|
||||
|
||||
+7
-23
@@ -425,9 +425,10 @@ static void set_boot_dev(PCMachineState *pcms, MC146818RtcState *s,
|
||||
|
||||
static void pc_boot_set(void *opaque, const char *boot_device, Error **errp)
|
||||
{
|
||||
PCMachineState *pcms = PC_MACHINE(current_machine);
|
||||
PCMachineState *pcms = opaque;
|
||||
X86MachineState *x86ms = X86_MACHINE(pcms);
|
||||
|
||||
set_boot_dev(pcms, opaque, boot_device, errp);
|
||||
set_boot_dev(pcms, MC146818_RTC(x86ms->rtc), boot_device, errp);
|
||||
}
|
||||
|
||||
static void pc_cmos_init_floppy(MC146818RtcState *rtc_state, ISADevice *floppy)
|
||||
@@ -569,14 +570,6 @@ static void pc_cmos_init_late(PCMachineState *pcms)
|
||||
mc146818rtc_set_cmos_data(s, 0x39, val);
|
||||
|
||||
pc_cmos_init_floppy(s, pc_find_fdc0());
|
||||
}
|
||||
|
||||
void pc_cmos_init(PCMachineState *pcms,
|
||||
ISADevice *rtc)
|
||||
{
|
||||
int val;
|
||||
X86MachineState *x86ms = X86_MACHINE(pcms);
|
||||
MC146818RtcState *s = MC146818_RTC(rtc);
|
||||
|
||||
/* various important CMOS locations needed by PC/Bochs bios */
|
||||
|
||||
@@ -613,22 +606,10 @@ void pc_cmos_init(PCMachineState *pcms,
|
||||
mc146818rtc_set_cmos_data(s, 0x5c, val >> 8);
|
||||
mc146818rtc_set_cmos_data(s, 0x5d, val >> 16);
|
||||
|
||||
object_property_add_link(OBJECT(pcms), "rtc_state",
|
||||
TYPE_ISA_DEVICE,
|
||||
(Object **)&x86ms->rtc,
|
||||
object_property_allow_set_link,
|
||||
OBJ_PROP_LINK_STRONG);
|
||||
object_property_set_link(OBJECT(pcms), "rtc_state", OBJECT(s),
|
||||
&error_abort);
|
||||
|
||||
set_boot_dev(pcms, s, MACHINE(pcms)->boot_config.order, &error_fatal);
|
||||
|
||||
val = 0;
|
||||
val |= 0x02; /* FPU is there */
|
||||
val |= 0x04; /* PS/2 mouse installed */
|
||||
mc146818rtc_set_cmos_data(s, REG_EQUIPMENT_BYTE, val);
|
||||
|
||||
/* hard drives and FDC are handled by pc_cmos_init_late() */
|
||||
}
|
||||
|
||||
static void handle_a20_line_change(void *opaque, int irq, int level)
|
||||
@@ -1261,7 +1242,9 @@ void pc_basic_device_init(struct PCMachineState *pcms,
|
||||
}
|
||||
#endif
|
||||
|
||||
qemu_register_boot_set(pc_boot_set, rtc_state);
|
||||
qemu_register_boot_set(pc_boot_set, pcms);
|
||||
set_boot_dev(pcms, MC146818_RTC(rtc_state),
|
||||
MACHINE(pcms)->boot_config.order, &error_fatal);
|
||||
|
||||
if (!xen_enabled() &&
|
||||
(x86ms->pit == ON_OFF_AUTO_AUTO || x86ms->pit == ON_OFF_AUTO_ON)) {
|
||||
@@ -1751,6 +1734,7 @@ static void pc_machine_initfn(Object *obj)
|
||||
pcms->fd_bootchk = true;
|
||||
pcms->default_bus_bypass_iommu = false;
|
||||
|
||||
pc_system_flash_create(pcms);
|
||||
pcms->pcspk = isa_new(TYPE_PC_SPEAKER);
|
||||
object_property_add_alias(OBJECT(pcms), "pcspk-audiodev",
|
||||
OBJECT(pcms->pcspk), "audiodev");
|
||||
|
||||
+1
-2
@@ -228,6 +228,7 @@ static void pc_init1(MachineState *machine, const char *pci_type)
|
||||
assert(machine->ram_size == x86ms->below_4g_mem_size +
|
||||
x86ms->above_4g_mem_size);
|
||||
|
||||
pc_system_flash_cleanup_unused(pcms);
|
||||
if (machine->kernel_filename != NULL) {
|
||||
/* For xen HVM direct kernel boot, load linux here */
|
||||
xen_load_linux(pcms);
|
||||
@@ -343,8 +344,6 @@ static void pc_init1(MachineState *machine, const char *pci_type)
|
||||
}
|
||||
#endif
|
||||
|
||||
pc_cmos_init(pcms, x86ms->rtc);
|
||||
|
||||
if (piix4_pm) {
|
||||
smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
|
||||
|
||||
|
||||
+11
-3
@@ -45,6 +45,7 @@
|
||||
#include "hw/i386/pc.h"
|
||||
#include "hw/i386/amd_iommu.h"
|
||||
#include "hw/i386/intel_iommu.h"
|
||||
#include "hw/virtio/virtio-iommu.h"
|
||||
#include "hw/display/ramfb.h"
|
||||
#include "hw/ide/pci.h"
|
||||
#include "hw/ide/ahci-pci.h"
|
||||
@@ -63,6 +64,12 @@
|
||||
/* ICH9 AHCI has 6 ports */
|
||||
#define MAX_SATA_PORTS 6
|
||||
|
||||
static GlobalProperty pc_q35_compat_defaults[] = {
|
||||
{ TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "39" },
|
||||
};
|
||||
static const size_t pc_q35_compat_defaults_len =
|
||||
G_N_ELEMENTS(pc_q35_compat_defaults);
|
||||
|
||||
struct ehci_companions {
|
||||
const char *name;
|
||||
int func;
|
||||
@@ -311,8 +318,6 @@ static void pc_q35_init(MachineState *machine)
|
||||
smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
|
||||
}
|
||||
|
||||
pc_cmos_init(pcms, x86ms->rtc);
|
||||
|
||||
/* the rest devices to which pci devfn is automatically assigned */
|
||||
pc_vga_init(isa_bus, pcms->pcibus);
|
||||
pc_nic_init(pcmc, isa_bus, pcms->pcibus);
|
||||
@@ -350,12 +355,14 @@ static void pc_q35_machine_options(MachineClass *m)
|
||||
m->default_nic = "e1000e";
|
||||
m->default_kernel_irqchip_split = false;
|
||||
m->no_floppy = 1;
|
||||
m->max_cpus = 1024;
|
||||
m->max_cpus = 4096;
|
||||
m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL);
|
||||
machine_class_allow_dynamic_sysbus_dev(m, TYPE_AMD_IOMMU_DEVICE);
|
||||
machine_class_allow_dynamic_sysbus_dev(m, TYPE_INTEL_IOMMU_DEVICE);
|
||||
machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
|
||||
machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE);
|
||||
compat_props_add(m->compat_props,
|
||||
pc_q35_compat_defaults, pc_q35_compat_defaults_len);
|
||||
}
|
||||
|
||||
static void pc_q35_9_0_machine_options(MachineClass *m)
|
||||
@@ -371,6 +378,7 @@ static void pc_q35_8_2_machine_options(MachineClass *m)
|
||||
{
|
||||
pc_q35_9_0_machine_options(m);
|
||||
m->alias = NULL;
|
||||
m->max_cpus = 1024;
|
||||
compat_props_add(m->compat_props, hw_compat_8_2, hw_compat_8_2_len);
|
||||
compat_props_add(m->compat_props, pc_compat_8_2, pc_compat_8_2_len);
|
||||
}
|
||||
|
||||
+13
-4
@@ -91,7 +91,19 @@ static PFlashCFI01 *pc_pflash_create(PCMachineState *pcms,
|
||||
return PFLASH_CFI01(dev);
|
||||
}
|
||||
|
||||
static void pc_system_flash_cleanup_unused(PCMachineState *pcms)
|
||||
void pc_system_flash_create(PCMachineState *pcms)
|
||||
{
|
||||
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
|
||||
|
||||
if (pcmc->pci_enabled) {
|
||||
pcms->flash[0] = pc_pflash_create(pcms, "system.flash0",
|
||||
"pflash0");
|
||||
pcms->flash[1] = pc_pflash_create(pcms, "system.flash1",
|
||||
"pflash1");
|
||||
}
|
||||
}
|
||||
|
||||
void pc_system_flash_cleanup_unused(PCMachineState *pcms)
|
||||
{
|
||||
char *prop_name;
|
||||
int i;
|
||||
@@ -198,9 +210,6 @@ void pc_system_firmware_init(PCMachineState *pcms,
|
||||
return;
|
||||
}
|
||||
|
||||
pcms->flash[0] = pc_pflash_create(pcms, "system.flash0", "pflash0");
|
||||
pcms->flash[1] = pc_pflash_create(pcms, "system.flash1", "pflash1");
|
||||
|
||||
/* Map legacy -drive if=pflash to machine properties */
|
||||
for (i = 0; i < ARRAY_SIZE(pcms->flash); i++) {
|
||||
pflash_cfi01_legacy_drive(pcms->flash[i],
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user