izzy/xemu
0
0
Fork 0
mirror of https://github.com/izzy2lost/xemu.git synced 2026-07-06 00:20:22 -07:00
Code Issues Packages Projects Releases Wiki Activity

Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jul-15-2019' into staging

Browse Source 
MIPS queue for July 15th, 2019

# gpg: Signature made Mon 15 Jul 2019 21:23:24 BST
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-jul-15-2019:
  target/mips: Add missing 'break' for certain cases of MTTR handling
  target/mips: Add missing 'break' for certain cases of MFTR handling
  target/mips: Add missing 'break' for a case of MTHC0 handling

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
2019-07-16 10:51:59 +01:00
parent 5ea8ec2fcf 0d0304f2c4
commit 6ed8682d9c
1 changed files with 5 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
target/mips/translate.c
+5
View File
@@ -6745,6 +6745,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
default:
goto cp0_unimplemented;
}
break;
case CP0_REGISTER_17:
switch (sel) {
case 0:
@@ -9825,6 +9826,7 @@ static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
gen_mfc0(ctx, t0, rt, sel);
break;
}
break;
case 12:
switch (sel) {
case 0:
@@ -9834,6 +9836,7 @@ static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
gen_mfc0(ctx, t0, rt, sel);
break;
}
break;
case 13:
switch (sel) {
case 0:
@@ -10052,6 +10055,7 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
gen_mtc0(ctx, t0, rd, sel);
break;
}
break;
case 12:
switch (sel) {
case 0:
@@ -10061,6 +10065,7 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
gen_mtc0(ctx, t0, rd, sel);
break;
}
break;
case 13:
switch (sel) {
case 0: