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Merge tag 'hw-misc-20251021' of https://github.com/philmd/qemu into staging

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Misc HW patches

- Replace compile-time checks by runtime ones to build virtio-mem.c once
- Cleanups in Raven PCI host bridge, audio and PC devices
- Allow machine dynamic registration of valid CPU types
- Introduce DEFINE_MACHINE_WITH_INTERFACE[_ARRAY]() macros
- Set DDR2 minimum write recovery time in EEPROM SPD
- Have PPCe500 machines abort gracefully when using invalid CPU
- Prevent buffer overflow in openrisc_sim_init()
- Pass PCI domain to Xen xc_physdev_map_pirq_msi()
- Fix register API leaks
- Simplify Xilinx CANFD model
- Unconditionally create System I/O on PReP machine
- Update documentation around '-soundhw' command line option

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# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'hw-misc-20251021' of https://github.com/philmd/qemu: (45 commits)
  docs: Update mentions of removed '-soundhw' command line option
  docs: update -soundhw -> -device list
  MAINTAINERS: Add missing machine name in the Alpha section
  qemu/target-info: Include missing 'qapi-types-common.h' header
  hw/ppc/spapr: Rename resize_hpt_err to errp
  hw/audio: replace AUD_log() usage
  hw/pcspk: check the "pit" is set
  hw/pcspk: make 'pit' a class property
  hw/pcspk: use explicitly the required PIT types
  hw/audio: remove global pcspk
  hw/audio: rename model list function
  hw/audio: improve error reports
  tests/qtest/ds1338: Reuse from_bcd()
  hw/intc/apic: Pass APICCommonState to apic_register_{read,write}
  hw/i386/apic: Ensure own APIC use in apic_msr_{read,write}
  hw/i386/apic: Prefer APICCommonState over DeviceState
  hw/ide/ide-internal: Move dma_buf_commit() into ide "namespace"
  hw/rtc/mc146818rtc: Assert correct usage of mc146818rtc_set_cmos_data()
  hw/rtc/mc146818rtc: Use ARRAY_SIZE macro
  hw/rtc/mc146818rtc: Convert CMOS_DPRINTF() into trace events
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
2025-10-22 07:59:41 -05:00
parent 3c0b42c68f 274d906066
commit 6ba4667ffd
72 changed files with 760 additions and 927 deletions
Download Patch File Download Diff File Expand all files Collapse all files
MAINTAINERS
+1
View File
@@ -671,6 +671,7 @@ F: tests/docker/dockerfiles/emsdk-wasm32-cross.docker
Alpha Machines
--------------
Clipper
M: Richard Henderson <richard.henderson@linaro.org>
S: Maintained
F: hw/alpha/
docs/qdev-device-use.txt
+6 -4
View File
@@ -311,9 +311,9 @@ constraints.
Host and guest part of audio devices have always been separate.
The old way to define guest audio devices is -soundhw C1,...
The old way to define guest audio devices was -soundhw C1,...
The new way is to define each guest audio device separately with
The current way is to define each guest audio device separately with
-device.
Map from -soundhw sound card name to -device:
@@ -324,8 +324,10 @@ Map from -soundhw sound card name to -device:
gus -device gus,iobase=IOADDR,irq=IRQ,dma=DMA,freq=F
hda -device intel-hda,msi=MSI -device hda-duplex
sb16 -device sb16,iobase=IOADDR,irq=IRQ,dma=DMA,dma16=DMA16,version=V
adlib not yet available with -device
pcspk not yet available with -device
adlib -device adlib,iobase=IOADDR,freq=F
pcspk Not available with -device,
but audiodev can be set with -machine pcspk-audiodev=<name>
For PCI devices, you can add bus=PCI-BUS,addr=DEVFN to control the PCI
device address, as usual.
hw/audio/ac97.c
+63 -61
View File
@@ -26,6 +26,7 @@
#include "qemu/module.h"
#include "system/dma.h"
#include "qom/object.h"
#include "qemu/error-report.h"
#include "ac97.h"
#define SOFT_VOLUME
@@ -141,11 +142,12 @@ enum {
BUP_LAST = 2
};
#ifdef DEBUG_AC97
#define dolog(...) AUD_log("ac97", __VA_ARGS__)
#else
#define dolog(...)
#endif
#define DEBUG_AC97 0
#define dolog(fmt, ...) do { \
if (DEBUG_AC97) { \
error_report("ac97: " fmt, ##__VA_ARGS__); \
} \
} while (0)
#define MKREGS(prefix, start) \
enum { \
@@ -190,7 +192,7 @@ static void fetch_bd(AC97LinkState *s, AC97BusMasterRegs *r)
r->bd.addr = le32_to_cpu(*(uint32_t *) &b[0]) & ~3;
r->bd.ctl_len = le32_to_cpu(*(uint32_t *) &b[4]);
r->picb = r->bd.ctl_len & 0xffff;
dolog("bd %2d addr=0x%x ctl=0x%06x len=0x%x(%d bytes)\n",
dolog("bd %2d addr=0x%x ctl=0x%06x len=0x%x(%d bytes)",
r->civ, r->bd.addr, r->bd.ctl_len >> 16,
r->bd.ctl_len & 0xffff, (r->bd.ctl_len & 0xffff) << 1);
}
@@ -222,7 +224,7 @@ static void update_sr(AC97LinkState *s, AC97BusMasterRegs *r, uint32_t new_sr)
r->sr = new_sr;
dolog("IOC%d LVB%d sr=0x%x event=%d level=%d\n",
dolog("IOC%d LVB%d sr=0x%x event=%d level=%d",
r->sr & SR_BCIS, r->sr & SR_LVBCI, r->sr, event, level);
if (!event) {
@@ -231,11 +233,11 @@ static void update_sr(AC97LinkState *s, AC97BusMasterRegs *r, uint32_t new_sr)
if (level) {
s->glob_sta |= masks[r - s->bm_regs];
dolog("set irq level=1\n");
dolog("set irq level=1");
pci_irq_assert(&s->dev);
} else {
s->glob_sta &= ~masks[r - s->bm_regs];
dolog("set irq level=0\n");
dolog("set irq level=0");
pci_irq_deassert(&s->dev);
}
}
@@ -256,14 +258,14 @@ static void voice_set_active(AC97LinkState *s, int bm_index, int on)
break;
default:
AUD_log("ac97", "invalid bm_index(%d) in voice_set_active", bm_index);
error_report("ac97: invalid bm_index(%d) in voice_set_active", bm_index);
break;
}
}
static void reset_bm_regs(AC97LinkState *s, AC97BusMasterRegs *r)
{
dolog("reset_bm_regs\n");
dolog("reset_bm_regs");
r->bdbar = 0;
r->civ = 0;
r->lvi = 0;
@@ -281,7 +283,7 @@ static void reset_bm_regs(AC97LinkState *s, AC97BusMasterRegs *r)
static void mixer_store(AC97LinkState *s, uint32_t i, uint16_t v)
{
if (i + 2 > sizeof(s->mixer_data)) {
dolog("mixer_store: index %d out of bounds %zd\n",
dolog("mixer_store: index %d out of bounds %zd",
i, sizeof(s->mixer_data));
return;
}
@@ -295,7 +297,7 @@ static uint16_t mixer_load(AC97LinkState *s, uint32_t i)
uint16_t val = 0xffff;
if (i + 2 > sizeof(s->mixer_data)) {
dolog("mixer_load: index %d out of bounds %zd\n",
dolog("mixer_load: index %d out of bounds %zd",
i, sizeof(s->mixer_data));
} else {
val = s->mixer_data[i + 0] | (s->mixer_data[i + 1] << 8);
@@ -460,7 +462,7 @@ static void mixer_reset(AC97LinkState *s)
{
uint8_t active[LAST_INDEX];
dolog("mixer_reset\n");
dolog("mixer_reset");
memset(s->mixer_data, 0, sizeof(s->mixer_data));
memset(active, 0, sizeof(active));
mixer_store(s, AC97_Reset, 0x0000); /* 6940 */
@@ -508,7 +510,7 @@ static void mixer_reset(AC97LinkState *s)
static uint32_t nam_readb(void *opaque, uint32_t addr)
{
AC97LinkState *s = opaque;
dolog("U nam readb 0x%x\n", addr);
dolog("U nam readb 0x%x", addr);
s->cas = 0;
return ~0U;
}
@@ -523,7 +525,7 @@ static uint32_t nam_readw(void *opaque, uint32_t addr)
static uint32_t nam_readl(void *opaque, uint32_t addr)
{
AC97LinkState *s = opaque;
dolog("U nam readl 0x%x\n", addr);
dolog("U nam readl 0x%x", addr);
s->cas = 0;
return ~0U;
}
@@ -535,7 +537,7 @@ static uint32_t nam_readl(void *opaque, uint32_t addr)
static void nam_writeb(void *opaque, uint32_t addr, uint32_t val)
{
AC97LinkState *s = opaque;
dolog("U nam writeb 0x%x <- 0x%x\n", addr, val);
dolog("U nam writeb 0x%x <- 0x%x", addr, val);
s->cas = 0;
}
@@ -563,10 +565,10 @@ static void nam_writew(void *opaque, uint32_t addr, uint32_t val)
break;
case AC97_Vendor_ID1:
case AC97_Vendor_ID2:
dolog("Attempt to write vendor ID to 0x%x\n", val);
dolog("Attempt to write vendor ID to 0x%x", val);
break;
case AC97_Extended_Audio_ID:
dolog("Attempt to write extended audio ID to 0x%x\n", val);
dolog("Attempt to write extended audio ID to 0x%x", val);
break;
case AC97_Extended_Audio_Ctrl_Stat:
if (!(val & EACS_VRA)) {
@@ -579,36 +581,36 @@ static void nam_writew(void *opaque, uint32_t addr, uint32_t val)
mixer_store(s, AC97_MIC_ADC_Rate, 0xbb80);
open_voice(s, MC_INDEX, 48000);
}
dolog("Setting extended audio control to 0x%x\n", val);
dolog("Setting extended audio control to 0x%x", val);
mixer_store(s, AC97_Extended_Audio_Ctrl_Stat, val);
break;
case AC97_PCM_Front_DAC_Rate:
if (mixer_load(s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA) {
mixer_store(s, addr, val);
dolog("Set front DAC rate to %d\n", val);
dolog("Set front DAC rate to %d", val);
open_voice(s, PO_INDEX, val);
} else {
dolog("Attempt to set front DAC rate to %d, but VRA is not set\n",
dolog("Attempt to set front DAC rate to %d, but VRA is not set",
val);
}
break;
case AC97_MIC_ADC_Rate:
if (mixer_load(s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRM) {
mixer_store(s, addr, val);
dolog("Set MIC ADC rate to %d\n", val);
dolog("Set MIC ADC rate to %d", val);
open_voice(s, MC_INDEX, val);
} else {
dolog("Attempt to set MIC ADC rate to %d, but VRM is not set\n",
dolog("Attempt to set MIC ADC rate to %d, but VRM is not set",
val);
}
break;
case AC97_PCM_LR_ADC_Rate:
if (mixer_load(s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA) {
mixer_store(s, addr, val);
dolog("Set front LR ADC rate to %d\n", val);
dolog("Set front LR ADC rate to %d", val);
open_voice(s, PI_INDEX, val);
} else {
dolog("Attempt to set LR ADC rate to %d, but VRA is not set\n",
dolog("Attempt to set LR ADC rate to %d, but VRA is not set",
val);
}
break;
@@ -630,7 +632,7 @@ static void nam_writew(void *opaque, uint32_t addr, uint32_t val)
/* None of the features in these regs are emulated, so they are RO */
break;
default:
dolog("U nam writew 0x%x <- 0x%x\n", addr, val);
dolog("U nam writew 0x%x <- 0x%x", addr, val);
mixer_store(s, addr, val);
break;
}
@@ -639,7 +641,7 @@ static void nam_writew(void *opaque, uint32_t addr, uint32_t val)
static void nam_writel(void *opaque, uint32_t addr, uint32_t val)
{
AC97LinkState *s = opaque;
dolog("U nam writel 0x%x <- 0x%x\n", addr, val);
dolog("U nam writel 0x%x <- 0x%x", addr, val);
s->cas = 0;
}
@@ -655,7 +657,7 @@ static uint32_t nabm_readb(void *opaque, uint32_t addr)
switch (addr) {
case CAS:
dolog("CAS %d\n", s->cas);
dolog("CAS %d", s->cas);
val = s->cas;
s->cas = 1;
break;
@@ -664,38 +666,38 @@ static uint32_t nabm_readb(void *opaque, uint32_t addr)
case MC_CIV:
r = &s->bm_regs[GET_BM(addr)];
val = r->civ;
dolog("CIV[%d] -> 0x%x\n", GET_BM(addr), val);
dolog("CIV[%d] -> 0x%x", GET_BM(addr), val);
break;
case PI_LVI:
case PO_LVI:
case MC_LVI:
r = &s->bm_regs[GET_BM(addr)];
val = r->lvi;
dolog("LVI[%d] -> 0x%x\n", GET_BM(addr), val);
dolog("LVI[%d] -> 0x%x", GET_BM(addr), val);
break;
case PI_PIV:
case PO_PIV:
case MC_PIV:
r = &s->bm_regs[GET_BM(addr)];
val = r->piv;
dolog("PIV[%d] -> 0x%x\n", GET_BM(addr), val);
dolog("PIV[%d] -> 0x%x", GET_BM(addr), val);
break;
case PI_CR:
case PO_CR:
case MC_CR:
r = &s->bm_regs[GET_BM(addr)];
val = r->cr;
dolog("CR[%d] -> 0x%x\n", GET_BM(addr), val);
dolog("CR[%d] -> 0x%x", GET_BM(addr), val);
break;
case PI_SR:
case PO_SR:
case MC_SR:
r = &s->bm_regs[GET_BM(addr)];
val = r->sr & 0xff;
dolog("SRb[%d] -> 0x%x\n", GET_BM(addr), val);
dolog("SRb[%d] -> 0x%x", GET_BM(addr), val);
break;
default:
dolog("U nabm readb 0x%x -> 0x%x\n", addr, val);
dolog("U nabm readb 0x%x -> 0x%x", addr, val);
break;
}
return val;
@@ -713,17 +715,17 @@ static uint32_t nabm_readw(void *opaque, uint32_t addr)
case MC_SR:
r = &s->bm_regs[GET_BM(addr)];
val = r->sr;
dolog("SR[%d] -> 0x%x\n", GET_BM(addr), val);
dolog("SR[%d] -> 0x%x", GET_BM(addr), val);
break;
case PI_PICB:
case PO_PICB:
case MC_PICB:
r = &s->bm_regs[GET_BM(addr)];
val = r->picb;
dolog("PICB[%d] -> 0x%x\n", GET_BM(addr), val);
dolog("PICB[%d] -> 0x%x", GET_BM(addr), val);
break;
default:
dolog("U nabm readw 0x%x -> 0x%x\n", addr, val);
dolog("U nabm readw 0x%x -> 0x%x", addr, val);
break;
}
return val;
@@ -741,14 +743,14 @@ static uint32_t nabm_readl(void *opaque, uint32_t addr)
case MC_BDBAR:
r = &s->bm_regs[GET_BM(addr)];
val = r->bdbar;
dolog("BMADDR[%d] -> 0x%x\n", GET_BM(addr), val);
dolog("BMADDR[%d] -> 0x%x", GET_BM(addr), val);
break;
case PI_CIV:
case PO_CIV:
case MC_CIV:
r = &s->bm_regs[GET_BM(addr)];
val = r->civ | (r->lvi << 8) | (r->sr << 16);
dolog("CIV LVI SR[%d] -> 0x%x, 0x%x, 0x%x\n", GET_BM(addr),
dolog("CIV LVI SR[%d] -> 0x%x, 0x%x, 0x%x", GET_BM(addr),
r->civ, r->lvi, r->sr);
break;
case PI_PICB:
@@ -756,19 +758,19 @@ static uint32_t nabm_readl(void *opaque, uint32_t addr)
case MC_PICB:
r = &s->bm_regs[GET_BM(addr)];
val = r->picb | (r->piv << 16) | (r->cr << 24);
dolog("PICB PIV CR[%d] -> 0x%x 0x%x 0x%x 0x%x\n", GET_BM(addr),
dolog("PICB PIV CR[%d] -> 0x%x 0x%x 0x%x 0x%x", GET_BM(addr),
val, r->picb, r->piv, r->cr);
break;
case GLOB_CNT:
val = s->glob_cnt;
dolog("glob_cnt -> 0x%x\n", val);
dolog("glob_cnt -> 0x%x", val);
break;
case GLOB_STA:
val = s->glob_sta | GS_S0CR;
dolog("glob_sta -> 0x%x\n", val);
dolog("glob_sta -> 0x%x", val);
break;
default:
dolog("U nabm readl 0x%x -> 0x%x\n", addr, val);
dolog("U nabm readl 0x%x -> 0x%x", addr, val);
break;
}
return val;
@@ -795,7 +797,7 @@ static void nabm_writeb(void *opaque, uint32_t addr, uint32_t val)
fetch_bd(s, r);
}
r->lvi = val % 32;
dolog("LVI[%d] <- 0x%x\n", GET_BM(addr), val);
dolog("LVI[%d] <- 0x%x", GET_BM(addr), val);
break;
case PI_CR:
case PO_CR:
@@ -816,7 +818,7 @@ static void nabm_writeb(void *opaque, uint32_t addr, uint32_t val)
voice_set_active(s, r - s->bm_regs, 1);
}
}
dolog("CR[%d] <- 0x%x (cr 0x%x)\n", GET_BM(addr), val, r->cr);
dolog("CR[%d] <- 0x%x (cr 0x%x)", GET_BM(addr), val, r->cr);
break;
case PI_SR:
case PO_SR:
@@ -824,10 +826,10 @@ static void nabm_writeb(void *opaque, uint32_t addr, uint32_t val)
r = &s->bm_regs[GET_BM(addr)];
r->sr |= val & ~(SR_RO_MASK | SR_WCLEAR_MASK);
update_sr(s, r, r->sr & ~(val & SR_WCLEAR_MASK));
dolog("SR[%d] <- 0x%x (sr 0x%x)\n", GET_BM(addr), val, r->sr);
dolog("SR[%d] <- 0x%x (sr 0x%x)", GET_BM(addr), val, r->sr);
break;
default:
dolog("U nabm writeb 0x%x <- 0x%x\n", addr, val);
dolog("U nabm writeb 0x%x <- 0x%x", addr, val);
break;
}
}
@@ -844,10 +846,10 @@ static void nabm_writew(void *opaque, uint32_t addr, uint32_t val)
r = &s->bm_regs[GET_BM(addr)];
r->sr |= val & ~(SR_RO_MASK | SR_WCLEAR_MASK);
update_sr(s, r, r->sr & ~(val & SR_WCLEAR_MASK));
dolog("SR[%d] <- 0x%x (sr 0x%x)\n", GET_BM(addr), val, r->sr);
dolog("SR[%d] <- 0x%x (sr 0x%x)", GET_BM(addr), val, r->sr);
break;
default:
dolog("U nabm writew 0x%x <- 0x%x\n", addr, val);
dolog("U nabm writew 0x%x <- 0x%x", addr, val);
break;
}
}
@@ -863,22 +865,22 @@ static void nabm_writel(void *opaque, uint32_t addr, uint32_t val)
case MC_BDBAR:
r = &s->bm_regs[GET_BM(addr)];
r->bdbar = val & ~3;
dolog("BDBAR[%d] <- 0x%x (bdbar 0x%x)\n", GET_BM(addr), val, r->bdbar);
dolog("BDBAR[%d] <- 0x%x (bdbar 0x%x)", GET_BM(addr), val, r->bdbar);
break;
case GLOB_CNT:
/* TODO: Handle WR or CR being set (warm/cold reset requests) */
if (!(val & (GC_WR | GC_CR))) {
s->glob_cnt = val & GC_VALID_MASK;
}
dolog("glob_cnt <- 0x%x (glob_cnt 0x%x)\n", val, s->glob_cnt);
dolog("glob_cnt <- 0x%x (glob_cnt 0x%x)", val, s->glob_cnt);
break;
case GLOB_STA:
s->glob_sta &= ~(val & GS_WCLEAR_MASK);
s->glob_sta |= (val & ~(GS_WCLEAR_MASK | GS_RO_MASK)) & GS_VALID_MASK;
dolog("glob_sta <- 0x%x (glob_sta 0x%x)\n", val, s->glob_sta);
dolog("glob_sta <- 0x%x (glob_sta 0x%x)", val, s->glob_sta);
break;
default:
dolog("U nabm writel 0x%x <- 0x%x\n", addr, val);
dolog("U nabm writel 0x%x <- 0x%x", addr, val);
break;
}
}
@@ -903,7 +905,7 @@ static int write_audio(AC97LinkState *s, AC97BusMasterRegs *r,
to_copy = MIN(temp, sizeof(tmpbuf));
pci_dma_read(&s->dev, addr, tmpbuf, to_copy);
copied = AUD_write(s->voice_po, tmpbuf, to_copy);
dolog("write_audio max=%x to_copy=%x copied=%x\n",
dolog("write_audio max=%x to_copy=%x copied=%x",
max, to_copy, copied);
if (!copied) {
*stop = 1;
@@ -916,7 +918,7 @@ static int write_audio(AC97LinkState *s, AC97BusMasterRegs *r,
if (!temp) {
if (to_copy < 4) {
dolog("whoops\n");
dolog("whoops");
s->last_samp = 0;
} else {
s->last_samp = *(uint32_t *)&tmpbuf[to_copy - 4];
@@ -929,7 +931,7 @@ static int write_audio(AC97LinkState *s, AC97BusMasterRegs *r,
static void write_bup(AC97LinkState *s, int elapsed)
{
dolog("write_bup\n");
dolog("write_bup");
if (!(s->bup_flag & BUP_SET)) {
if (s->bup_flag & BUP_LAST) {
int i;
@@ -997,7 +999,7 @@ static void transfer_audio(AC97LinkState *s, int index, int elapsed)
int stop = 0;
if (s->invalid_freq[index]) {
AUD_log("ac97", "attempt to use voice %d with invalid frequency %d\n",
error_report("ac97: attempt to use voice %d with invalid frequency %d",
index, s->invalid_freq[index]);
return;
}
@@ -1017,12 +1019,12 @@ static void transfer_audio(AC97LinkState *s, int index, int elapsed)
int temp;
if (!r->bd_valid) {
dolog("invalid bd\n");
dolog("invalid bd");
fetch_bd(s, r);
}
if (!r->picb) {
dolog("fresh bd %d is empty 0x%x 0x%x\n",
dolog("fresh bd %d is empty 0x%x 0x%x",
r->civ, r->bd.addr, r->bd.ctl_len);
if (r->civ == r->lvi) {
r->sr |= SR_DCH; /* CELV? */
@@ -1059,7 +1061,7 @@ static void transfer_audio(AC97LinkState *s, int index, int elapsed)
}
if (r->civ == r->lvi) {
dolog("Underrun civ (%d) == lvi (%d)\n", r->civ, r->lvi);
dolog("Underrun civ (%d) == lvi (%d)", r->civ, r->lvi);
new_sr |= SR_LVBCI | SR_DCH | SR_CELV;
stop = 1;
hw/audio/adlib.c
+12 -12
View File
@@ -29,24 +29,24 @@
#include "audio/audio.h"
#include "hw/isa/isa.h"
#include "hw/qdev-properties.h"
#include "qemu/error-report.h"
#include "qom/object.h"
//#define DEBUG
#define DEBUG 0
#define ADLIB_KILL_TIMERS 1
#define ADLIB_DESC "Yamaha YM3812 (OPL2)"
#ifdef DEBUG
#if DEBUG
#include "qemu/timer.h"
#endif
#define dolog(...) AUD_log ("adlib", __VA_ARGS__)
#ifdef DEBUG
#define ldebug(...) dolog (__VA_ARGS__)
#else
#define ldebug(...)
#endif
#define ldebug(fmt, ...) do { \
if (DEBUG) { \
error_report("adlib: " fmt, ##__VA_ARGS__); \
} \
} while (0)
#include "fmopl.h"
#define SHIFT 1
@@ -64,7 +64,7 @@ struct AdlibState {
int enabled;
int active;
int bufpos;
#ifdef DEBUG
#if DEBUG
int64_t exp[2];
#endif
int16_t *mixbuf;
@@ -92,7 +92,7 @@ static void adlib_kill_timers (AdlibState *s)
delta = AUD_get_elapsed_usec_out (s->voice, &s->ats);
ldebug (
"delta = %f dexp = %f expired => %d\n",
"delta = %f dexp = %f expired => %d",
delta / 1000000.0,
s->dexp[i] / 1000000.0,
delta >= s->dexp[i]
@@ -131,7 +131,7 @@ static void timer_handler (void *opaque, int c, double interval_Sec)
{
AdlibState *s = opaque;
unsigned n = c & 1;
#ifdef DEBUG
#if DEBUG
double interval;
int64_t exp;
#endif
@@ -142,7 +142,7 @@ static void timer_handler (void *opaque, int c, double interval_Sec)
}
s->ticking[n] = 1;
#ifdef DEBUG
#if DEBUG
interval = NANOSECONDS_PER_SECOND * interval_Sec;
exp = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + interval;
s->exp[n] = exp;
hw/audio/cs4231a.c
+22 -22
View File
@@ -30,7 +30,7 @@
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
#include "qemu/module.h"
#include "qemu/timer.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "qom/object.h"
@@ -43,21 +43,21 @@
More...
*/
/* #define DEBUG */
#define DEBUG 0
/* #define DEBUG_XLAW */
static struct {
int aci_counter;
} conf = {1};
#ifdef DEBUG
#define dolog(...) AUD_log ("cs4231a", __VA_ARGS__)
#else
#define dolog(...)
#endif
#define dolog(fmt, ...) do { \
if (DEBUG) { \
error_report("cs4231a: " fmt, ##__VA_ARGS__); \
} \
} while (0)
#define lwarn(...) AUD_log ("cs4231a", "warning: " __VA_ARGS__)
#define lerr(...) AUD_log ("cs4231a", "error: " __VA_ARGS__)
#define lwarn(fmt, ...) warn_report("cs4231a: " fmt, ##__VA_ARGS__)
#define lerr(fmt, ...) error_report("cs4231a: " fmt, ##__VA_ARGS__)
#define CS_REGS 16
#define CS_DREGS 32
@@ -284,7 +284,7 @@ static void cs_reset_voices (CSState *s, uint32_t val)
as.freq = freqs[xtal][(val >> 1) & 7];
if (as.freq == -1) {
lerr ("unsupported frequency (val=%#x)\n", val);
lerr("unsupported frequency (val=0x%x)", val);
goto error;
}
@@ -319,11 +319,11 @@ static void cs_reset_voices (CSState *s, uint32_t val)
case 7:
case 4:
lerr ("attempt to use reserved format value (%#x)\n", val);
lerr("attempt to use reserved format value (0x%x)", val);
goto error;
case 5:
lerr ("ADPCM 4 bit IMA compatible format is not supported\n");
lerr("ADPCM 4 bit IMA compatible format is not supported");
goto error;
}
@@ -393,7 +393,7 @@ static uint64_t cs_read (void *opaque, hwaddr addr, unsigned size)
ret = s->regs[saddr];
break;
}
dolog ("read %d:%d -> %d\n", saddr, iaddr, ret);
dolog("read %d:%d -> %d", saddr, iaddr, ret);
return ret;
}
@@ -425,7 +425,7 @@ static void cs_write (void *opaque, hwaddr addr,
case RESERVED:
case RESERVED_2:
case RESERVED_3:
lwarn ("attempt to write %#x to reserved indirect register %d\n",
lwarn("attempt to write 0x%x to reserved indirect register %d",
val, iaddr);
break;
@@ -439,7 +439,7 @@ static void cs_write (void *opaque, hwaddr addr,
cs_reset_voices (s, val);
}
else {
lwarn ("[P]MCE(%#x, %#x) is not set, val=%#x\n",
lwarn("[P]MCE(0x%x, 0x%x) is not set, val=0x%x",
s->regs[Index_Address],
s->dregs[Alternate_Feature_Status],
val);
@@ -453,7 +453,7 @@ static void cs_write (void *opaque, hwaddr addr,
val &= ~(1 << 5); /* D5 is reserved */
s->dregs[iaddr] = val;
if (val & PPIO) {
lwarn ("PIO is not supported (%#x)\n", val);
lwarn("PIO is not supported (0x%x)", val);
break;
}
if (val & PEN) {
@@ -472,11 +472,11 @@ static void cs_write (void *opaque, hwaddr addr,
break;
case Error_Status_And_Initialization:
lwarn ("attempt to write to read only register %d\n", iaddr);
lwarn("attempt to write to read only register %d", iaddr);
break;
case MODE_And_ID:
dolog ("val=%#x\n", val);
dolog("val=0x%x", val);
if (val & MODE2)
s->dregs[iaddr] |= MODE2;
else
@@ -485,7 +485,7 @@ static void cs_write (void *opaque, hwaddr addr,
case Alternate_Feature_Enable_I:
if (val & TE)
lerr ("timer is not yet supported\n");
lerr("timer is not yet supported");
s->dregs[iaddr] = val;
break;
@@ -499,7 +499,7 @@ static void cs_write (void *opaque, hwaddr addr,
break;
case Version_Chip_ID:
lwarn ("write to Version_Chip_ID register %#x\n", val);
lwarn("write to Version_Chip_ID register 0x%x", val);
s->dregs[iaddr] = val;
break;
@@ -507,7 +507,7 @@ static void cs_write (void *opaque, hwaddr addr,
s->dregs[iaddr] = val;
break;
}
dolog ("written value %#x to indirect register %d\n", val, iaddr);
dolog("written value 0x%x to indirect register %d", val, iaddr);
break;
case Status:
@@ -519,7 +519,7 @@ static void cs_write (void *opaque, hwaddr addr,
break;
case PIO_Data:
lwarn ("attempt to write value %#x to PIO register\n", val);
lwarn("attempt to write value 0x%x to PIO register", val);
break;
}
}
hw/audio/es1370.c
+12 -12
View File
@@ -32,7 +32,7 @@
#include "migration/vmstate.h"
#include "qemu/cutils.h"
#include "qemu/module.h"
#include "system/dma.h"
#include "qemu/error-report.h"
#include "qom/object.h"
#include "trace.h"
@@ -190,7 +190,7 @@ static void print_ctl(uint32_t val)
a(CDC_EN);
a(SERR_DIS);
#undef a
AUD_log("es1370", "ctl - PCLKDIV %d(DAC2 freq %d), freq %d,%s\n",
error_report("es1370: ctl - PCLKDIV %d(DAC2 freq %d), freq %d,%s",
(val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV,
DAC2_DIVTOSR((val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV),
dac1_samplerate[(val & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL],
@@ -226,7 +226,7 @@ static void print_sctl(uint32_t val)
}
#undef b
#undef a
AUD_log("es1370",
error_report("es1370: "
"%s p2_end_inc %d, p2_st_inc %d,"
" r1_fmt %s, p2_fmt %s, p1_fmt %s\n",
buf,
@@ -238,10 +238,10 @@ static void print_sctl(uint32_t val)
}
}
#define lwarn(...) \
#define lwarn(fmt, ...) \
do { \
if (VERBOSE_ES1370) { \
AUD_log("es1370: warning", __VA_ARGS__); \
error_report("es1370: " fmt, ##__VA_ARGS__); \
} \
} while (0)
@@ -502,10 +502,10 @@ static void es1370_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
break;
case ES1370_REG_PHANTOM_FRAMECNT:
lwarn("writing to phantom frame count 0x%" PRIx64 "\n", val);
lwarn("writing to phantom frame count 0x%" PRIx64, val);
break;
case ES1370_REG_PHANTOM_FRAMEADR:
lwarn("writing to phantom frame address 0x%" PRIx64 "\n", val);
lwarn("writing to phantom frame address 0x%" PRIx64, val);
break;
case ES1370_REG_ADC_FRAMECNT:
@@ -522,7 +522,7 @@ static void es1370_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
break;
default:
lwarn("writel 0x%" PRIx64 " <- 0x%" PRIx64 "\n", addr, val);
lwarn("writel 0x%" PRIx64 " <- 0x%" PRIx64, addr, val);
break;
}
}
@@ -586,16 +586,16 @@ static uint64_t es1370_read(void *opaque, hwaddr addr, unsigned size)
case ES1370_REG_PHANTOM_FRAMECNT:
val = ~0U;
lwarn("reading from phantom frame count\n");
lwarn("reading from phantom frame count");
break;
case ES1370_REG_PHANTOM_FRAMEADR:
val = ~0U;
lwarn("reading from phantom frame address\n");
lwarn("reading from phantom frame address");
break;
default:
val = ~0U;
lwarn("readl 0x%" PRIx64 " -> 0x%x\n", addr, val);
lwarn("readl 0x%" PRIx64 " -> 0x%x", addr, val);
break;
}
return val;
@@ -677,7 +677,7 @@ static void es1370_transfer_audio (ES1370State *s, struct chan *d, int loop_sel,
* when the sample count reaches zero) or 1 for stop mode (set
* interrupt and stop recording).
*/
AUD_log ("es1370: warning", "non looping mode\n");
warn_report("es1370: non looping mode");
} else {
d->frame_cnt = size;
hw/audio/gus.c
+13 -12
View File
@@ -32,15 +32,16 @@
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
#include "gusemu.h"
#include "gustate.h"
#include "qemu/error-report.h"
#include "qom/object.h"
#define dolog(...) AUD_log ("audio", __VA_ARGS__)
#ifdef DEBUG
#define ldebug(...) dolog (__VA_ARGS__)
#else
#define ldebug(...)
#endif
#define DEBUG 0
#define ldebug(fmt, ...) do { \
if (DEBUG) { \
error_report("gus: " fmt, ##__VA_ARGS__); \
} \
} while (0)
#define TYPE_GUS "gus"
OBJECT_DECLARE_SIMPLE_TYPE(GUSState, GUS)
@@ -154,14 +155,14 @@ int GUS_irqrequest (GUSEmuState *emu, int hwirq, int n)
/* qemu_irq_lower (s->pic); */
qemu_irq_raise (s->pic);
s->irqs += n;
ldebug ("irqrequest %d %d %d\n", hwirq, n, s->irqs);
ldebug("irqrequest %d %d %d", hwirq, n, s->irqs);
return n;
}
void GUS_irqclear (GUSEmuState *emu, int hwirq)
{
GUSState *s = emu->opaque;
ldebug ("irqclear %d %d\n", hwirq, s->irqs);
ldebug("irqclear %d %d", hwirq, s->irqs);
qemu_irq_lower (s->pic);
s->irqs -= 1;
#ifdef IRQ_STORM
@@ -175,7 +176,7 @@ void GUS_dmarequest (GUSEmuState *emu)
{
GUSState *s = emu->opaque;
IsaDmaClass *k = ISADMA_GET_CLASS(s->isa_dma);
ldebug ("dma request %d\n", der->gusdma);
ldebug("dma request %d", s->emu.gusdma);
k->hold_DREQ(s->isa_dma, s->emu.gusdma);
}
@@ -186,13 +187,13 @@ static int GUS_read_DMA (void *opaque, int nchan, int dma_pos, int dma_len)
QEMU_UNINITIALIZED char tmpbuf[4096];
int pos = dma_pos, mode, left = dma_len - dma_pos;
ldebug ("read DMA %#x %d\n", dma_pos, dma_len);
ldebug("read DMA 0x%x %d", dma_pos, dma_len);
mode = k->has_autoinitialization(s->isa_dma, s->emu.gusdma);
while (left) {
int to_copy = MIN ((size_t) left, sizeof (tmpbuf));
int copied;
ldebug ("left=%d to_copy=%d pos=%d\n", left, to_copy, pos);
ldebug("left=%d to_copy=%d pos=%d", left, to_copy, pos);
copied = k->read_memory(s->isa_dma, nchan, tmpbuf, pos, to_copy);
gus_dma_transferdata (&s->emu, tmpbuf, copied, left == copied);
left -= copied;
hw/audio/pcspk.c
+17 -12
View File
@@ -34,6 +34,7 @@
#include "hw/audio/pcspk.h"
#include "qapi/error.h"
#include "qom/object.h"
#include "trace.h"
#define PCSPK_BUF_LEN 1792
#define PCSPK_SAMPLE_RATE 32000
@@ -50,7 +51,7 @@ struct PCSpkState {
uint8_t sample_buf[PCSPK_BUF_LEN];
QEMUSoundCard card;
SWVoiceOut *voice;
void *pit;
PITCommonState *pit;
unsigned int pit_count;
unsigned int samples;
unsigned int play_pos;
@@ -60,7 +61,6 @@ struct PCSpkState {
};
static const char *s_spk = "pcspk";
static PCSpkState *pcspk_state;
static inline void generate_samples(PCSpkState *s)
{
@@ -125,7 +125,7 @@ static int pcspk_audio_init(PCSpkState *s)
s->voice = AUD_open_out(&s->card, s->voice, s_spk, s, pcspk_callback, &as);
if (!s->voice) {
AUD_log(s_spk, "Could not open voice\n");
error_report("pcspk: Could not open voice");
return -1;
}
@@ -137,13 +137,18 @@ static uint64_t pcspk_io_read(void *opaque, hwaddr addr,
{
PCSpkState *s = opaque;
PITChannelInfo ch;
uint8_t val;
pit_get_channel_info(s->pit, 2, &ch);
s->dummy_refresh_clock ^= (1 << 4);
return ch.gate | (s->data_on << 1) | s->dummy_refresh_clock |
val = ch.gate | (s->data_on << 1) | s->dummy_refresh_clock |
(ch.out << 5);
trace_pcspk_io_read(s->iobase, val);
return val;
}
static void pcspk_io_write(void *opaque, hwaddr addr, uint64_t val,
@@ -152,6 +157,8 @@ static void pcspk_io_write(void *opaque, hwaddr addr, uint64_t val,
PCSpkState *s = opaque;
const int gate = val & 1;
trace_pcspk_io_write(s->iobase, val);
s->data_on = (val >> 1) & 1;
pit_set_gate(s->pit, 2, gate);
if (s->voice) {
@@ -175,11 +182,6 @@ static void pcspk_initfn(Object *obj)
PCSpkState *s = PC_SPEAKER(obj);
memory_region_init_io(&s->ioport, OBJECT(s), &pcspk_io_ops, s, "pcspk", 1);
object_property_add_link(obj, "pit", TYPE_PIT_COMMON,
(Object **)&s->pit,
qdev_prop_allow_set_link_before_realize,
0);
}
static void pcspk_realizefn(DeviceState *dev, Error **errp)
@@ -187,13 +189,16 @@ static void pcspk_realizefn(DeviceState *dev, Error **errp)
ISADevice *isadev = ISA_DEVICE(dev);
PCSpkState *s = PC_SPEAKER(dev);
if (!s->pit) {
error_setg(errp, "pcspk: No \"pit\" set or available");
return;
}
isa_register_ioport(isadev, &s->ioport, s->iobase);
if (s->card.state && AUD_register_card(s_spk, &s->card, errp)) {
pcspk_audio_init(s);
}
pcspk_state = s;
}
static bool migrate_needed(void *opaque)
@@ -219,6 +224,7 @@ static const Property pcspk_properties[] = {
DEFINE_AUDIO_PROPERTIES(PCSpkState, card),
DEFINE_PROP_UINT32("iobase", PCSpkState, iobase, 0x61),
DEFINE_PROP_BOOL("migrate", PCSpkState, migrate, true),
DEFINE_PROP_LINK("pit", PCSpkState, pit, TYPE_PIT_COMMON, PITCommonState *),
};
static void pcspk_class_initfn(ObjectClass *klass, const void *data)
@@ -229,7 +235,6 @@ static void pcspk_class_initfn(ObjectClass *klass, const void *data)
set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
dc->vmsd = &vmstate_spk;
device_class_set_props(dc, pcspk_properties);
/* Reason: realize sets global pcspk_state */
/* Reason: pit object link */
dc->user_creatable = false;
}
hw/audio/sb16.c
+57 -58
View File
@@ -30,22 +30,21 @@
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
#include "qemu/timer.h"
#include "qemu/error-report.h"
#include "qemu/host-utils.h"
#include "qemu/log.h"
#include "qemu/module.h"
#include "qapi/error.h"
#include "qom/object.h"
#define dolog(...) AUD_log ("sb16", __VA_ARGS__)
/* #define DEBUG */
#define DEBUG 0
/* #define DEBUG_SB16_MOST */
#ifdef DEBUG
#define ldebug(...) dolog (__VA_ARGS__)
#else
#define ldebug(...)
#endif
#define ldebug(fmt, ...) do { \
if (DEBUG) { \
error_report("sb16: " fmt, ##__VA_ARGS__); \
} \
} while (0)
static const char e3[] = "COPYRIGHT (C) CREATIVE TECHNOLOGY LTD, 1992.";
@@ -157,7 +156,7 @@ static int irq_of_magic (int magic)
#if 0
static void log_dsp (SB16State *dsp)
{
ldebug ("%s:%s:%d:%s:dmasize=%d:freq=%d:const=%d:speaker=%d\n",
ldebug("%s:%s:%d:%s:dmasize=%d:freq=%d:const=%d:speaker=%d",
dsp->fmt_stereo ? "Stereo" : "Mono",
dsp->fmt_signed ? "Signed" : "Unsigned",
dsp->fmt_bits,
@@ -182,7 +181,7 @@ static void control (SB16State *s, int hold)
IsaDmaClass *k = ISADMA_GET_CLASS(isa_dma);
s->dma_running = hold;
ldebug ("hold %d high %d dma %d\n", hold, s->use_hdma, dma);
ldebug("hold %d high %d dma %d", hold, s->use_hdma, dma);
if (hold) {
k->hold_DREQ(isa_dma, dma);
@@ -289,8 +288,8 @@ static void dma_cmd8 (SB16State *s, int mask, int dma_len)
" alignment %d\n", s->block_size, s->align + 1);
}
ldebug ("freq %d, stereo %d, sign %d, bits %d, "
"dma %d, auto %d, fifo %d, high %d\n",
ldebug("freq %d, stereo %d, sign %d, bits %d, "
"dma %d, auto %d, fifo %d, high %d",
s->freq, s->fmt_stereo, s->fmt_signed, s->fmt_bits,
s->block_size, s->dma_auto, s->fifo, s->highspeed);
@@ -337,8 +336,8 @@ static void dma_cmd (SB16State *s, uint8_t cmd, uint8_t d0, int dma_len)
s->block_size <<= s->fmt_stereo;
}
ldebug ("freq %d, stereo %d, sign %d, bits %d, "
"dma %d, auto %d, fifo %d, high %d\n",
ldebug("freq %d, stereo %d, sign %d, bits %d, "
"dma %d, auto %d, fifo %d, high %d",
s->freq, s->fmt_stereo, s->fmt_signed, s->fmt_bits,
s->block_size, s->dma_auto, s->fifo, s->highspeed);
@@ -395,7 +394,7 @@ static void dma_cmd (SB16State *s, uint8_t cmd, uint8_t d0, int dma_len)
static inline void dsp_out_data (SB16State *s, uint8_t val)
{
ldebug ("outdata %#x\n", val);
ldebug("outdata 0x%x", val);
if ((size_t) s->out_data_len < sizeof (s->out_data)) {
s->out_data[s->out_data_len++] = val;
}
@@ -407,18 +406,18 @@ static inline uint8_t dsp_get_data (SB16State *s)
return s->in2_data[--s->in_index];
}
else {
dolog ("buffer underflow\n");
warn_report("sb16: buffer underflow");
return 0;
}
}
static void command (SB16State *s, uint8_t cmd)
{
ldebug ("command %#x\n", cmd);
ldebug("command 0x%x", cmd);
if (cmd > 0xaf && cmd < 0xd0) {
if (cmd & 8) {
qemu_log_mask(LOG_UNIMP, "ADC not yet supported (command %#x)\n",
qemu_log_mask(LOG_UNIMP, "ADC not yet supported (command 0x%x)\n",
cmd);
}
@@ -427,7 +426,7 @@ static void command (SB16State *s, uint8_t cmd)
case 12:
break;
default:
qemu_log_mask(LOG_GUEST_ERROR, "%#x wrong bits\n", cmd);
qemu_log_mask(LOG_GUEST_ERROR, "0x%x wrong bits\n", cmd);
}
s->needed_bytes = 3;
}
@@ -645,13 +644,13 @@ static void command (SB16State *s, uint8_t cmd)
goto warn;
default:
qemu_log_mask(LOG_UNIMP, "Unrecognized command %#x\n", cmd);
qemu_log_mask(LOG_UNIMP, "Unrecognized command 0x%x\n", cmd);
break;
}
}
if (!s->needed_bytes) {
ldebug ("\n");
ldebug("!needed_bytes");
}
exit:
@@ -664,7 +663,7 @@ static void command (SB16State *s, uint8_t cmd)
return;
warn:
qemu_log_mask(LOG_UNIMP, "warning: command %#x,%d is not truly understood"
qemu_log_mask(LOG_UNIMP, "warning: command 0x%x,%d is not truly understood"
" yet\n", cmd, s->needed_bytes);
goto exit;
@@ -687,7 +686,7 @@ static uint16_t dsp_get_hilo (SB16State *s)
static void complete (SB16State *s)
{
int d0, d1, d2;
ldebug ("complete command %#x, in_index %d, needed_bytes %d\n",
ldebug("complete command 0x%x, in_index %d, needed_bytes %d",
s->cmd, s->in_index, s->needed_bytes);
if (s->cmd > 0xaf && s->cmd < 0xd0) {
@@ -696,11 +695,11 @@ static void complete (SB16State *s)
d0 = dsp_get_data (s);
if (s->cmd & 8) {
dolog ("ADC params cmd = %#x d0 = %d, d1 = %d, d2 = %d\n",
warn_report("sb16: ADC params cmd = 0x%x d0 = %d, d1 = %d, d2 = %d",
s->cmd, d0, d1, d2);
}
else {
ldebug ("cmd = %#x d0 = %d, d1 = %d, d2 = %d\n",
ldebug("cmd = 0x%x d0 = %d, d1 = %d, d2 = %d",
s->cmd, d0, d1, d2);
dma_cmd (s, s->cmd, d0, d1 + (d2 << 8));
}
@@ -711,13 +710,13 @@ static void complete (SB16State *s)
s->csp_mode = dsp_get_data (s);
s->csp_reg83r = 0;
s->csp_reg83w = 0;
ldebug ("CSP command 0x04: mode=%#x\n", s->csp_mode);
ldebug("CSP command 0x04: mode=0x%x", s->csp_mode);
break;
case 0x05:
s->csp_param = dsp_get_data (s);
s->csp_value = dsp_get_data (s);
ldebug ("CSP command 0x05: param=%#x value=%#x\n",
ldebug("CSP command 0x05: param=0x%x value=0x%x",
s->csp_param,
s->csp_value);
break;
@@ -725,9 +724,9 @@ static void complete (SB16State *s)
case 0x0e:
d0 = dsp_get_data (s);
d1 = dsp_get_data (s);
ldebug ("write CSP register %d <- %#x\n", d1, d0);
ldebug("write CSP register %d <- 0x%x", d1, d0);
if (d1 == 0x83) {
ldebug ("0x83[%d] <- %#x\n", s->csp_reg83r, d0);
ldebug("0x83[%d] <- 0x%x", s->csp_reg83r, d0);
s->csp_reg83[s->csp_reg83r % 4] = d0;
s->csp_reg83r += 1;
}
@@ -738,10 +737,10 @@ static void complete (SB16State *s)
case 0x0f:
d0 = dsp_get_data (s);
ldebug ("read CSP register %#x -> %#x, mode=%#x\n",
ldebug("read CSP register 0x%x -> 0x%x, mode=0x%x",
d0, s->csp_regs[d0], s->csp_mode);
if (d0 == 0x83) {
ldebug ("0x83[%d] -> %#x\n",
ldebug("0x83[%d] -> 0x%x",
s->csp_reg83w,
s->csp_reg83[s->csp_reg83w % 4]);
dsp_out_data (s, s->csp_reg83[s->csp_reg83w % 4]);
@@ -754,7 +753,7 @@ static void complete (SB16State *s)
case 0x10:
d0 = dsp_get_data (s);
dolog ("cmd 0x10 d0=%#x\n", d0);
warn_report("sb16: cmd 0x10 d0=0x%x", d0);
break;
case 0x14:
@@ -763,7 +762,7 @@ static void complete (SB16State *s)
case 0x40:
s->time_const = dsp_get_data (s);
ldebug ("set time const %d\n", s->time_const);
ldebug("set time const %d", s->time_const);
break;
case 0x41:
@@ -776,12 +775,12 @@ static void complete (SB16State *s)
* http://homepages.cae.wisc.edu/~brodskye/sb16doc/sb16doc.html#SamplingRate
*/
s->freq = restrict_sampling_rate(dsp_get_hilo(s));
ldebug ("set freq %d\n", s->freq);
ldebug("set freq %d", s->freq);
break;
case 0x48:
s->block_size = dsp_get_lohi (s) + 1;
ldebug ("set dma block len %d\n", s->block_size);
ldebug("set dma block len %d", s->block_size);
break;
case 0x74:
@@ -811,21 +810,21 @@ static void complete (SB16State *s)
);
}
}
ldebug ("mix silence %d %d %" PRId64 "\n", samples, bytes, ticks);
ldebug("mix silence %d %d %" PRId64, samples, bytes, ticks);
}
break;
case 0xe0:
d0 = dsp_get_data (s);
s->out_data_len = 0;
ldebug ("E0 data = %#x\n", d0);
ldebug("E0 data = 0x%x", d0);
dsp_out_data (s, ~d0);
break;
case 0xe2:
#ifdef DEBUG
#if DEBUG
d0 = dsp_get_data (s);
dolog ("E2 = %#x\n", d0);
warn_report("sb16: E2 = 0x%x", d0);
#endif
break;
@@ -835,7 +834,7 @@ static void complete (SB16State *s)
case 0xf9:
d0 = dsp_get_data (s);
ldebug ("command 0xf9 with %#x\n", d0);
ldebug("command 0xf9 with 0x%x", d0);
switch (d0) {
case 0x0e:
dsp_out_data (s, 0xff);
@@ -856,13 +855,13 @@ static void complete (SB16State *s)
break;
default:
qemu_log_mask(LOG_UNIMP, "complete: unrecognized command %#x\n",
qemu_log_mask(LOG_UNIMP, "complete: unrecognized command 0x%x\n",
s->cmd);
return;
}
}
ldebug ("\n");
ldebug("");
s->cmd = -1;
}
@@ -926,7 +925,7 @@ static void dsp_write(void *opaque, uint32_t nport, uint32_t val)
iport = nport - s->port;
ldebug ("write %#x <- %#x\n", nport, val);
ldebug("write 0x%x <- 0x%x", nport, val);
switch (iport) {
case 0x06:
switch (val) {
@@ -976,7 +975,7 @@ static void dsp_write(void *opaque, uint32_t nport, uint32_t val)
}
else {
if (s->in_index == sizeof (s->in2_data)) {
dolog ("in data overrun\n");
warn_report("sb16: in data overrun");
}
else {
s->in2_data[s->in_index++] = val;
@@ -992,7 +991,7 @@ static void dsp_write(void *opaque, uint32_t nport, uint32_t val)
break;
default:
ldebug ("(nport=%#x, val=%#x)\n", nport, val);
ldebug("(nport=0x%x, val=0x%x)", nport, val);
break;
}
}
@@ -1016,7 +1015,7 @@ static uint32_t dsp_read(void *opaque, uint32_t nport)
}
else {
if (s->cmd != -1) {
dolog ("empty output buffer for command %#x\n",
warn_report("sb16: empty output buffer for command 0x%x",
s->cmd);
}
retval = s->last_read_byte;
@@ -1029,7 +1028,7 @@ static uint32_t dsp_read(void *opaque, uint32_t nport)
break;
case 0x0d: /* timer interrupt clear */
/* dolog ("timer interrupt clear\n"); */
/* warn_report("sb16: timer interrupt clear"); */
retval = 0;
break;
@@ -1056,13 +1055,13 @@ static uint32_t dsp_read(void *opaque, uint32_t nport)
}
if (!ack) {
ldebug ("read %#x -> %#x\n", nport, retval);
ldebug("read 0x%x -> 0x%x", nport, retval);
}
return retval;
error:
dolog ("warning: dsp_read %#x error\n", nport);
warn_report("sb16: dsp_read 0x%x error", nport);
return 0xff;
}
@@ -1108,7 +1107,7 @@ static void mixer_write_datab(void *opaque, uint32_t nport, uint32_t val)
SB16State *s = opaque;
(void) nport;
ldebug ("mixer_write [%#x] <- %#x\n", s->mixer_nreg, val);
ldebug("mixer_write [0x%x] <- 0x%x", s->mixer_nreg, val);
switch (s->mixer_nreg) {
case 0x00:
@@ -1118,7 +1117,7 @@ static void mixer_write_datab(void *opaque, uint32_t nport, uint32_t val)
case 0x80:
{
int irq = irq_of_magic (val);
ldebug ("setting irq to %d (val=%#x)\n", irq, val);
ldebug("setting irq to %d (val=0x%x)", irq, val);
if (irq > 0) {
s->irq = irq;
}
@@ -1133,7 +1132,7 @@ static void mixer_write_datab(void *opaque, uint32_t nport, uint32_t val)
hdma = ctz32 (val & 0xf0);
if (dma != s->dma || hdma != s->hdma) {
qemu_log_mask(LOG_GUEST_ERROR, "attempt to change DMA 8bit"
" %d(%d), 16bit %d(%d) (val=%#x)\n", dma, s->dma,
" %d(%d), 16bit %d(%d) (val=0x%x)\n", dma, s->dma,
hdma, s->hdma, val);
}
#if 0
@@ -1145,12 +1144,12 @@ static void mixer_write_datab(void *opaque, uint32_t nport, uint32_t val)
case 0x82:
qemu_log_mask(LOG_GUEST_ERROR, "attempt to write into IRQ status"
" register (val=%#x)\n", val);
" register (val=0x%x)\n", val);
return;
default:
if (s->mixer_nreg >= 0x80) {
ldebug ("attempt to write mixer[%#x] <- %#x\n", s->mixer_nreg, val);
ldebug("attempt to write mixer[0x%x] <- 0x%x", s->mixer_nreg, val);
}
break;
}
@@ -1165,11 +1164,11 @@ static uint32_t mixer_read(void *opaque, uint32_t nport)
(void) nport;
#ifndef DEBUG_SB16_MOST
if (s->mixer_nreg != 0x82) {
ldebug ("mixer_read[%#x] -> %#x\n",
ldebug("mixer_read[0x%x] -> 0x%x",
s->mixer_nreg, s->mixer_regs[s->mixer_nreg]);
}
#else
ldebug ("mixer_read[%#x] -> %#x\n",
ldebug("mixer_read[0x%x] -> 0x%x",
s->mixer_nreg, s->mixer_regs[s->mixer_nreg]);
#endif
return s->mixer_regs[s->mixer_nreg];
@@ -1241,7 +1240,7 @@ static int SB_read_DMA (void *opaque, int nchan, int dma_pos, int dma_len)
till = s->left_till_irq;
#ifdef DEBUG_SB16_MOST
dolog ("pos:%06d %d till:%d len:%d\n",
warn_report("sb16: pos:%06d %d till:%d len:%d",
dma_pos, free, till, dma_len);
#endif
@@ -1265,7 +1264,7 @@ static int SB_read_DMA (void *opaque, int nchan, int dma_pos, int dma_len)
}
#ifdef DEBUG_SB16_MOST
ldebug ("pos %5d free %5d size %5d till % 5d copy %5d written %5d size %5d\n",
ldebug("pos %5d free %5d size %5d till % 5d copy %5d written %5d size %5d",
dma_pos, free, dma_len, s->left_till_irq, copy, written,
s->block_size);
#endif
hw/audio/soundhw.c
+10 -11
View File
@@ -65,18 +65,18 @@ void deprecated_register_soundhw(const char *name, const char *descr,
soundhw_count++;
}
void show_valid_soundhw(void)
void audio_print_available_models(void)
{
struct soundhw *c;
if (soundhw_count) {
printf("Valid sound card names (comma separated):\n");
for (c = soundhw; c->name; ++c) {
printf ("%-11s %s\n", c->name, c->descr);
}
printf("Valid audio device model names:\n");
for (c = soundhw; c->name; ++c) {
printf("%-11s %s\n", c->name, c->descr);
}
} else {
printf("Machine has no user-selectable audio hardware "
"(it may or may not have always-present audio hardware).\n");
printf("Machine has no user-selectable audio hardware "
"(it may or may not have always-present audio hardware).\n");
}
}
@@ -88,7 +88,7 @@ void select_soundhw(const char *name, const char *audiodev)
struct soundhw *c;
if (selected) {
error_report("only one -soundhw option is allowed");
error_report("only one -audio option is allowed");
exit(1);
}
@@ -101,8 +101,8 @@ void select_soundhw(const char *name, const char *audiodev)
}
if (!c->name) {
error_report("Unknown sound card name `%s'", name);
show_valid_soundhw();
error_report("Unknown audio device model `%s'", name);
audio_print_available_models();
exit(1);
}
}
@@ -140,4 +140,3 @@ void soundhw_init(void)
c->init_pci(pci_bus, audiodev_id);
}
}
hw/audio/trace-events
+4
View File
@@ -23,6 +23,10 @@ hda_audio_format(const char *stream, int chan, const char *fmt, int freq) "st %s
hda_audio_adjust(const char *stream, int pos) "st %s, pos %d"
hda_audio_overrun(const char *stream) "st %s"
# pcspk.c
pcspk_io_read(uint16_t addr, uint8_t val) "[0x%"PRIx16"] -> 0x%"PRIx8
pcspk_io_write(uint16_t addr, uint8_t val) "[0x%"PRIx16"] <- 0x%"PRIx8
#via-ac97.c
via_ac97_codec_write(uint8_t addr, uint16_t val) "0x%x <- 0x%x"
via_ac97_sgd_fetch(uint32_t curr, uint32_t addr, char stop, char eol, char flag, uint32_t len) "curr=0x%x addr=0x%x %c%c%c len=%d"
hw/core/machine-qmp-cmds.c
+3 -1
View File
@@ -20,6 +20,7 @@
#include "qapi/qobject-input-visitor.h"
#include "qapi/type-helpers.h"
#include "qemu/uuid.h"
#include "qemu/target-info.h"
#include "qemu/target-info-qapi.h"
#include "qom/qom-qobject.h"
#include "system/hostmem.h"
@@ -94,9 +95,10 @@ CpuInfoFastList *qmp_query_cpus_fast(Error **errp)
MachineInfoList *qmp_query_machines(bool has_compat_props, bool compat_props,
Error **errp)
{
GSList *el, *machines = object_class_get_list(TYPE_MACHINE, false);
GSList *el, *machines;
MachineInfoList *mach_list = NULL;
machines = object_class_get_list(target_machine_typename(), false);
for (el = machines; el; el = el->next) {
MachineClass *mc = el->data;
const char *default_cpu_type = machine_class_default_cpu_type(mc);
hw/core/machine.c
+38
View File
@@ -1556,6 +1556,16 @@ const char *machine_class_default_cpu_type(MachineClass *mc)
return mc->default_cpu_type;
}
const char *machine_default_cpu_type(const MachineState *ms)
{
MachineClass *mc = MACHINE_GET_CLASS(ms);
if (mc->get_default_cpu_type) {
return mc->get_default_cpu_type(ms);
}
return machine_class_default_cpu_type(mc);
}
static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
{
MachineClass *mc = MACHINE_GET_CLASS(machine);
@@ -1570,6 +1580,8 @@ static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
*/
if (mc->valid_cpu_types) {
assert(mc->valid_cpu_types[0] != NULL);
assert(!mc->get_valid_cpu_types);
for (i = 0; mc->valid_cpu_types[i]; i++) {
if (object_class_dynamic_cast(oc, mc->valid_cpu_types[i])) {
break;
@@ -1596,6 +1608,32 @@ static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
error_append_hint(errp, "\n");
}
return false;
}
} else if (mc->get_valid_cpu_types) {
GPtrArray *vct = mc->get_valid_cpu_types(machine);
bool valid = false;
for (i = 0; i < vct->len; i++) {
if (object_class_dynamic_cast(oc, vct->pdata[i])) {
valid = true;
break;
}
}
if (!valid) {
g_autofree char *requested = cpu_model_from_type(machine->cpu_type);
error_setg(errp, "Invalid CPU model: %s", requested);
error_append_hint(errp, "The valid models are: ");
for (i = 0; i < vct->len; i++) {
g_autofree char *model = cpu_model_from_type(vct->pdata[i]);
error_append_hint(errp, "%s%s",
model, i + 1 == vct->len ? "\n" : ", ");
}
}
g_ptr_array_free(vct, true);
if (!valid) {
return false;
}
}
hw/core/register.c
+17 -21
View File
@@ -245,10 +245,16 @@ static RegisterInfoArray *register_init_block(DeviceState *owner,
size_t data_size_bits)
{
const char *device_prefix = object_get_typename(OBJECT(owner));
RegisterInfoArray *r_array = g_new0(RegisterInfoArray, 1);
Object *obj;
RegisterInfoArray *r_array;
int data_size = data_size_bits >> 3;
int i;
obj = object_new(TYPE_REGISTER_ARRAY);
object_property_add_child(OBJECT(owner), "reg-array[*]", obj);
object_unref(obj);
r_array = REGISTER_ARRAY(obj);
r_array->r = g_new0(RegisterInfo *, num);
r_array->num_elements = num;
r_array->debug = debug_enabled;
@@ -258,9 +264,6 @@ static RegisterInfoArray *register_init_block(DeviceState *owner,
int index = rae[i].addr / data_size;
RegisterInfo *r = &ri[index];
/* Init the register, this will zero it. */
object_initialize((void *)r, sizeof(*r), TYPE_REGISTER);
/* Set the properties of the register */
r->data = data + data_size * index;
r->data_size = data_size;
@@ -270,7 +273,7 @@ static RegisterInfoArray *register_init_block(DeviceState *owner,
r_array->r[i] = r;
}
memory_region_init_io(&r_array->mem, OBJECT(owner), ops, r_array,
memory_region_init_io(&r_array->mem, OBJECT(r_array), ops, r_array,
device_prefix, memory_size);
return r_array;
@@ -312,30 +315,23 @@ RegisterInfoArray *register_init_block64(DeviceState *owner,
data, ops, debug_enabled, memory_size, 64);
}
void register_finalize_block(RegisterInfoArray *r_array)
static void register_array_finalize(Object *obj)
{
RegisterInfoArray *r_array = REGISTER_ARRAY(obj);
g_free(r_array->r);
g_free(r_array);
}
static void register_class_init(ObjectClass *oc, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
/* Reason: needs to be wired up to work */
dc->user_creatable = false;
}
static const TypeInfo register_info = {
.name = TYPE_REGISTER,
.parent = TYPE_DEVICE,
.class_init = register_class_init,
.instance_size = sizeof(RegisterInfo),
static const TypeInfo register_array_info = {
.name = TYPE_REGISTER_ARRAY,
.parent = TYPE_OBJECT,
.instance_size = sizeof(RegisterInfoArray),
.instance_finalize = register_array_finalize,
};
static void register_register_types(void)
{
type_register_static(&register_info);
type_register_static(&register_array_info);
}
type_init(register_register_types)
hw/i2c/smbus_eeprom.c
+1
View File
@@ -288,6 +288,7 @@ uint8_t *spd_data_generate(enum sdram_type type, ram_addr_t ram_size)
spd[33] = 8; /* addr/cmd hold time */
spd[34] = 20; /* data input setup time */
spd[35] = 8; /* data input hold time */
spd[36] = (type == DDR2 ? 13 << 2 : 0); /* min. write recovery time */
/* checksum */
for (i = 0; i < 63; i++) {
hw/i386/kvm/apic.c
+1 -2
View File
@@ -60,9 +60,8 @@ static void kvm_put_apic_state(APICCommonState *s, struct kvm_lapic_state *kapic
kvm_apic_set_reg(kapic, 0x3e, s->divide_conf);
}
void kvm_get_apic_state(DeviceState *dev, struct kvm_lapic_state *kapic)
void kvm_get_apic_state(APICCommonState *s, struct kvm_lapic_state *kapic)
{
APICCommonState *s = APIC_COMMON(dev);
int i, v;
if (kvm_has_x2apic_api() && s->apicbase & MSR_IA32_APICBASE_EXTD) {
hw/i386/vapic.c
+1 -1
View File
@@ -490,7 +490,7 @@ void vapic_report_tpr_access(DeviceState *dev, CPUState *cs, target_ulong ip,
}
typedef struct VAPICEnableTPRReporting {
DeviceState *apic;
APICCommonState *apic;
bool enable;
} VAPICEnableTPRReporting;
hw/i386/x86-cpu.c
+1 -1
View File
@@ -86,7 +86,7 @@ int cpu_get_pic_interrupt(CPUX86State *env)
return intno;
}
DeviceState *cpu_get_current_apic(void)
APICCommonState *cpu_get_current_apic(void)
{
if (current_cpu) {
X86CPU *cpu = X86_CPU(current_cpu);
hw/ide/ahci.c
+4 -4
View File
@@ -1417,7 +1417,7 @@ static void ahci_pio_transfer(const IDEDMA *dma)
}
/* Update number of transferred bytes, destroy sglist */
dma_buf_commit(s, size);
ide_dma_buf_commit(s, size);
out:
/* declare that we processed everything */
@@ -1482,8 +1482,8 @@ static int32_t ahci_dma_prepare_buf(const IDEDMA *dma, int32_t limit)
/**
* Updates the command header with a bytes-read value.
* Called via dma_buf_commit, for both DMA and PIO paths.
* sglist destruction is handled within dma_buf_commit.
* Called via ide_dma_buf_commit, for both DMA and PIO paths.
* sglist destruction is handled within ide_dma_buf_commit.
*/
static void ahci_commit_buf(const IDEDMA *dma, uint32_t tx_bytes)
{
@@ -1511,7 +1511,7 @@ static int ahci_dma_rw_buf(const IDEDMA *dma, bool is_write)
}
/* free sglist, update byte count */
dma_buf_commit(s, l);
ide_dma_buf_commit(s, l);
s->io_buffer_index += l;
trace_ahci_dma_rw_buf(ad->hba, ad->port_no, l);
hw/ide/core.c
+5 -5
View File
@@ -827,7 +827,7 @@ static void ide_sector_read(IDEState *s)
ide_sector_read_cb, s);
}
void dma_buf_commit(IDEState *s, uint32_t tx_bytes)
void ide_dma_buf_commit(IDEState *s, uint32_t tx_bytes)
{
if (s->bus->dma->ops->commit_buf) {
s->bus->dma->ops->commit_buf(s->bus->dma, tx_bytes);
@@ -848,7 +848,7 @@ void ide_set_inactive(IDEState *s, bool more)
void ide_dma_error(IDEState *s)
{
dma_buf_commit(s, 0);
ide_dma_buf_commit(s, 0);
ide_abort_command(s);
ide_set_inactive(s, false);
ide_bus_set_irq(s->bus);
@@ -893,7 +893,7 @@ static void ide_dma_cb(void *opaque, int ret)
if (ret < 0) {
if (ide_handle_rw_error(s, -ret, ide_dma_cmd_to_retry(s->dma_cmd))) {
s->bus->dma->aiocb = NULL;
dma_buf_commit(s, 0);
ide_dma_buf_commit(s, 0);
return;
}
}
@@ -912,7 +912,7 @@ static void ide_dma_cb(void *opaque, int ret)
sector_num = ide_get_sector(s);
if (n > 0) {
assert(n * 512 == s->sg.size);
dma_buf_commit(s, s->sg.size);
ide_dma_buf_commit(s, s->sg.size);
sector_num += n;
ide_set_sector(s, sector_num);
s->nsector -= n;
@@ -944,7 +944,7 @@ static void ide_dma_cb(void *opaque, int ret)
* Reset the Active bit and don't raise the interrupt.
*/
s->status = READY_STAT | SEEK_STAT;
dma_buf_commit(s, 0);
ide_dma_buf_commit(s, 0);
goto eot;
}

Some files were not shown because too many files have changed in this diff Show More