Merge tag 'pull-shadow-2023-09-29' of https://repo.or.cz/qemu/armbru into staging

-Wshadow=local patches patches for 2023-09-29

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# gpg: Signature made Fri 29 Sep 2023 04:10:35 EDT
# gpg:                using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg:                issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg:                 aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867  4E5F 3870 B400 EB91 8653

* tag 'pull-shadow-2023-09-29' of https://repo.or.cz/qemu/armbru: (56 commits)
  disas/m68k: clean up local variable shadowing
  hw/nvme: Clean up local variable shadowing in nvme_ns_init()
  softmmu/device_tree: Fixup local variables shadowing
  target/riscv: vector_helper: Fixup local variables shadowing
  target/riscv: cpu: Fixup local variables shadowing
  hw/riscv: opentitan: Fixup local variables shadowing
  qemu-nbd: changes towards enabling -Wshadow=local
  seccomp: avoid shadowing of 'action' variable
  crypto: remove shadowed 'ret' variable
  intel_iommu: Fix shadow local variables on "size"
  aspeed/timer: Clean up local variable shadowing
  aspeed/i3c: Rename variable shadowing a local
  aspeed: Clean up local variable shadowing
  aspeed/i2c: Clean up local variable shadowing
  hw/arm/smmuv3-internal.h: Don't use locals in statement macros
  hw/arm/smmuv3.c: Avoid shadowing variable
  hw/misc/arm_sysctl.c: Avoid shadowing local variable
  hw/intc/arm_gicv3_its: Avoid shadowing variable in do_process_its_cmd()
  hw/acpi: changes towards enabling -Wshadow=local
  test-throttle: don't shadow 'index' variable in do_test_accounting()
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Hajnoczi
2023-10-02 14:42:30 -04:00
74 changed files with 326 additions and 331 deletions
+1 -2
View File
@@ -207,13 +207,12 @@ static PageDesc *page_find_alloc(tb_page_addr_t index, bool alloc)
{
PageDesc *pd;
void **lp;
int i;
/* Level 1. Always allocated. */
lp = l1_map + ((index >> v_l1_shift) & (v_l1_size - 1));
/* Level 2..N-1. */
for (i = v_l2_levels; i > 0; i--) {
for (int i = v_l2_levels; i > 0; i--) {
void **p = qatomic_rcu_read(lp);
if (p == NULL) {
+5 -4
View File
@@ -3072,18 +3072,19 @@ bdrv_attach_child_common(BlockDriverState *child_bs,
&local_err);
if (ret < 0 && child_class->change_aio_ctx) {
Transaction *tran = tran_new();
Transaction *aio_ctx_tran = tran_new();
GHashTable *visited = g_hash_table_new(NULL, NULL);
bool ret_child;
g_hash_table_add(visited, new_child);
ret_child = child_class->change_aio_ctx(new_child, child_ctx,
visited, tran, NULL);
visited, aio_ctx_tran,
NULL);
if (ret_child == true) {
error_free(local_err);
ret = 0;
}
tran_finalize(tran, ret_child == true ? 0 : -1);
tran_finalize(aio_ctx_tran, ret_child == true ? 0 : -1);
g_hash_table_destroy(visited);
}
@@ -6208,12 +6209,12 @@ void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
QLIST_FOREACH(drv, &bdrv_drivers, list) {
if (drv->format_name) {
bool found = false;
int i = count;
if (use_bdrv_whitelist && !bdrv_is_whitelisted(drv, read_only)) {
continue;
}
i = count;
while (formats && i && !found) {
found = !strcmp(formats[--i], drv->format_name);
}
+10 -9
View File
@@ -258,37 +258,38 @@ void qmp_block_dirty_bitmap_disable(const char *node, const char *name,
bdrv_disable_dirty_bitmap(bitmap);
}
BdrvDirtyBitmap *block_dirty_bitmap_merge(const char *node, const char *target,
BdrvDirtyBitmap *block_dirty_bitmap_merge(const char *dst_node,
const char *dst_bitmap,
BlockDirtyBitmapOrStrList *bms,
HBitmap **backup, Error **errp)
{
BlockDriverState *bs;
BdrvDirtyBitmap *dst, *src;
BlockDirtyBitmapOrStrList *lst;
const char *src_node, *src_bitmap;
HBitmap *local_backup = NULL;
GLOBAL_STATE_CODE();
dst = block_dirty_bitmap_lookup(node, target, &bs, errp);
dst = block_dirty_bitmap_lookup(dst_node, dst_bitmap, &bs, errp);
if (!dst) {
return NULL;
}
for (lst = bms; lst; lst = lst->next) {
switch (lst->value->type) {
const char *name, *node;
case QTYPE_QSTRING:
name = lst->value->u.local;
src = bdrv_find_dirty_bitmap(bs, name);
src_bitmap = lst->value->u.local;
src = bdrv_find_dirty_bitmap(bs, src_bitmap);
if (!src) {
error_setg(errp, "Dirty bitmap '%s' not found", name);
error_setg(errp, "Dirty bitmap '%s' not found", src_bitmap);
goto fail;
}
break;
case QTYPE_QDICT:
node = lst->value->u.external.node;
name = lst->value->u.external.name;
src = block_dirty_bitmap_lookup(node, name, NULL, errp);
src_node = lst->value->u.external.node;
src_bitmap = lst->value->u.external.name;
src = block_dirty_bitmap_lookup(src_node, src_bitmap, NULL, errp);
if (!src) {
goto fail;
}
+1 -2
View File
@@ -1555,7 +1555,6 @@ bool qcow2_store_persistent_dirty_bitmaps(BlockDriverState *bs,
FOR_EACH_DIRTY_BITMAP(bs, bitmap) {
const char *name = bdrv_dirty_bitmap_name(bitmap);
uint32_t granularity = bdrv_dirty_bitmap_granularity(bitmap);
Qcow2Bitmap *bm;
if (!bdrv_dirty_bitmap_get_persistence(bitmap) ||
bdrv_dirty_bitmap_inconsistent(bitmap)) {
@@ -1625,7 +1624,7 @@ bool qcow2_store_persistent_dirty_bitmaps(BlockDriverState *bs,
/* allocate clusters and store bitmaps */
QSIMPLEQ_FOREACH(bm, bm_list, entry) {
BdrvDirtyBitmap *bitmap = bm->dirty_bitmap;
bitmap = bm->dirty_bitmap;
if (bitmap == NULL || bdrv_dirty_bitmap_readonly(bitmap)) {
continue;
+1 -1
View File
@@ -1290,7 +1290,7 @@ static int coroutine_fn qemu_rbd_start_co(BlockDriverState *bs,
* operations that exceed the current size.
*/
if (offset + bytes > s->image_size) {
int r = qemu_rbd_resize(bs, offset + bytes);
r = qemu_rbd_resize(bs, offset + bytes);
if (r < 0) {
return r;
}
-1
View File
@@ -292,7 +292,6 @@ void stream_start(const char *job_id, BlockDriverState *bs,
/* Make sure that the image is opened in read-write mode */
bs_read_only = bdrv_is_read_only(bs);
if (bs_read_only) {
int ret;
/* Hold the chain during reopen */
if (bdrv_freeze_backing_chain(bs, above_base, errp) < 0) {
return;
+3 -4
View File
@@ -634,7 +634,6 @@ vdi_co_pwritev(BlockDriverState *bs, int64_t offset, int64_t bytes,
bmap_entry = le32_to_cpu(s->bmap[block_index]);
if (!VDI_IS_ALLOCATED(bmap_entry)) {
/* Allocate new block and write to it. */
uint64_t data_offset;
qemu_co_rwlock_upgrade(&s->bmap_lock);
bmap_entry = le32_to_cpu(s->bmap[block_index]);
if (VDI_IS_ALLOCATED(bmap_entry)) {
@@ -700,7 +699,7 @@ nonallocating_write:
/* One or more new blocks were allocated. */
VdiHeader *header;
uint8_t *base;
uint64_t offset;
uint64_t bmap_offset;
uint32_t n_sectors;
g_free(block);
@@ -723,11 +722,11 @@ nonallocating_write:
bmap_first /= (SECTOR_SIZE / sizeof(uint32_t));
bmap_last /= (SECTOR_SIZE / sizeof(uint32_t));
n_sectors = bmap_last - bmap_first + 1;
offset = s->bmap_sector + bmap_first;
bmap_offset = s->bmap_sector + bmap_first;
base = ((uint8_t *)&s->bmap[0]) + bmap_first * SECTOR_SIZE;
logout("will write %u block map sectors starting from entry %u\n",
n_sectors, bmap_first);
ret = bdrv_co_pwrite(bs->file, offset * SECTOR_SIZE,
ret = bdrv_co_pwrite(bs->file, bmap_offset * SECTOR_SIZE,
n_sectors * SECTOR_SIZE, base, 0);
}
+18 -17
View File
@@ -777,7 +777,6 @@ static int read_directory(BDRVVVFATState* s, int mapping_index)
while((entry=readdir(dir))) {
unsigned int length=strlen(dirname)+2+strlen(entry->d_name);
char* buffer;
direntry_t* direntry;
struct stat st;
int is_dot=!strcmp(entry->d_name,".");
int is_dotdot=!strcmp(entry->d_name,"..");
@@ -857,7 +856,7 @@ static int read_directory(BDRVVVFATState* s, int mapping_index)
/* fill with zeroes up to the end of the cluster */
while(s->directory.next%(0x10*s->sectors_per_cluster)) {
direntry_t* direntry=array_get_next(&(s->directory));
direntry = array_get_next(&(s->directory));
memset(direntry,0,sizeof(direntry_t));
}
@@ -1962,24 +1961,24 @@ get_cluster_count_for_direntry(BDRVVVFATState* s, direntry_t* direntry, const ch
* This is horribly inefficient, but that is okay, since
* it is rarely executed, if at all.
*/
int64_t offset = cluster2sector(s, cluster_num);
int64_t offs = cluster2sector(s, cluster_num);
vvfat_close_current_file(s);
for (i = 0; i < s->sectors_per_cluster; i++) {
int res;
res = bdrv_is_allocated(s->qcow->bs,
(offset + i) * BDRV_SECTOR_SIZE,
(offs + i) * BDRV_SECTOR_SIZE,
BDRV_SECTOR_SIZE, NULL);
if (res < 0) {
return -1;
}
if (!res) {
res = vvfat_read(s->bs, offset, s->cluster_buffer, 1);
res = vvfat_read(s->bs, offs, s->cluster_buffer, 1);
if (res) {
return -1;
}
res = bdrv_co_pwrite(s->qcow, offset * BDRV_SECTOR_SIZE,
res = bdrv_co_pwrite(s->qcow, offs * BDRV_SECTOR_SIZE,
BDRV_SECTOR_SIZE, s->cluster_buffer,
0);
if (res < 0) {
@@ -2467,8 +2466,9 @@ commit_direntries(BDRVVVFATState* s, int dir_index, int parent_mapping_index)
for (c = first_cluster; !fat_eof(s, c); c = modified_fat_get(s, c)) {
direntry_t *first_direntry;
void* direntry = array_get(&(s->directory), current_dir_index);
int ret = vvfat_read(s->bs, cluster2sector(s, c), direntry,
direntry = array_get(&(s->directory), current_dir_index);
ret = vvfat_read(s->bs, cluster2sector(s, c), (uint8_t *)direntry,
s->sectors_per_cluster);
if (ret)
return ret;
@@ -2690,12 +2690,12 @@ static int handle_renames_and_mkdirs(BDRVVVFATState* s)
direntry_t* direntry = array_get(&(s->directory),
mapping->info.dir.first_dir_index);
uint32_t c = mapping->begin;
int i = 0;
int j = 0;
/* recurse */
while (!fat_eof(s, c)) {
do {
direntry_t* d = direntry + i;
direntry_t *d = direntry + j;
if (is_file(d) || (is_directory(d) && !is_dot(d))) {
int l;
@@ -2716,8 +2716,8 @@ static int handle_renames_and_mkdirs(BDRVVVFATState* s)
schedule_rename(s, m->begin, new_path);
}
i++;
} while((i % (0x10 * s->sectors_per_cluster)) != 0);
j++;
} while (j % (0x10 * s->sectors_per_cluster) != 0);
c = fat_get(s, c);
}
}
@@ -2804,16 +2804,16 @@ static int coroutine_fn GRAPH_RDLOCK handle_commits(BDRVVVFATState* s)
int begin = commit->param.new_file.first_cluster;
mapping_t* mapping = find_mapping_for_cluster(s, begin);
direntry_t* entry;
int i;
int j;
/* find direntry */
for (i = 0; i < s->directory.next; i++) {
entry = array_get(&(s->directory), i);
for (j = 0; j < s->directory.next; j++) {
entry = array_get(&(s->directory), j);
if (is_file(entry) && begin_of_direntry(entry) == begin)
break;
}
if (i >= s->directory.next) {
if (j >= s->directory.next) {
fail = -6;
continue;
}
@@ -2833,8 +2833,9 @@ static int coroutine_fn GRAPH_RDLOCK handle_commits(BDRVVVFATState* s)
mapping->mode = MODE_NORMAL;
mapping->info.file.offset = 0;
if (commit_one_file(s, i, 0))
if (commit_one_file(s, j, 0)) {
fail = -7;
}
break;
}
+2 -2
View File
@@ -113,7 +113,7 @@ qcrypto_gnutls_cipher_encrypt(QCryptoCipher *cipher,
while (len) {
gnutls_cipher_hd_t handle;
gnutls_datum_t gkey = { (unsigned char *)ctx->key, ctx->nkey };
int err = gnutls_cipher_init(&handle, ctx->galg, &gkey, NULL);
err = gnutls_cipher_init(&handle, ctx->galg, &gkey, NULL);
if (err != 0) {
error_setg(errp, "Cannot initialize cipher: %s",
gnutls_strerror(err));
@@ -174,7 +174,7 @@ qcrypto_gnutls_cipher_decrypt(QCryptoCipher *cipher,
while (len) {
gnutls_cipher_hd_t handle;
gnutls_datum_t gkey = { (unsigned char *)ctx->key, ctx->nkey };
int err = gnutls_cipher_init(&handle, ctx->galg, &gkey, NULL);
err = gnutls_cipher_init(&handle, ctx->galg, &gkey, NULL);
if (err != 0) {
error_setg(errp, "Cannot initialize cipher: %s",
gnutls_strerror(err));
-1
View File
@@ -52,7 +52,6 @@ GByteArray *qcrypto_tls_cipher_suites_get_data(QCryptoTLSCipherSuites *obj,
byte_array = g_byte_array_new();
for (i = 0;; i++) {
int ret;
unsigned idx;
const char *name;
IANA_TLS_CIPHER cipher;
+4 -4
View File
@@ -1632,10 +1632,10 @@ print_insn_arg (const char *d,
case '2':
case '3':
{
int val = fetch_arg (buffer, place, 5, info);
int reg = fetch_arg (buffer, place, 5, info);
const char *name = 0;
switch (val)
switch (reg)
{
case 2: name = "%tt0"; break;
case 3: name = "%tt1"; break;
@@ -1655,12 +1655,12 @@ print_insn_arg (const char *d,
int break_reg = ((buffer[3] >> 2) & 7);
(*info->fprintf_func)
(info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d",
(info->stream, reg == 0x1c ? "%%bad%d" : "%%bac%d",
break_reg);
}
break;
default:
(*info->fprintf_func) (info->stream, "<mmu register %d>", val);
(*info->fprintf_func) (info->stream, "<mmu register %d>", reg);
}
if (name)
(*info->fprintf_func) (info->stream, "%s", name);
+13 -12
View File
@@ -265,26 +265,27 @@ void build_legacy_cpu_hotplug_aml(Aml *ctx, MachineState *machine,
/* build Processor object for each processor */
for (i = 0; i < apic_ids->len; i++) {
int apic_id = apic_ids->cpus[i].arch_id;
int cpu_apic_id = apic_ids->cpus[i].arch_id;
assert(apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT);
assert(cpu_apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT);
dev = aml_processor(i, 0, 0, "CP%.02X", apic_id);
dev = aml_processor(i, 0, 0, "CP%.02X", cpu_apic_id);
method = aml_method("_MAT", 0, AML_NOTSERIALIZED);
aml_append(method,
aml_return(aml_call2(CPU_MAT_METHOD, aml_int(apic_id), aml_int(i))
aml_return(aml_call2(CPU_MAT_METHOD,
aml_int(cpu_apic_id), aml_int(i))
));
aml_append(dev, method);
method = aml_method("_STA", 0, AML_NOTSERIALIZED);
aml_append(method,
aml_return(aml_call1(CPU_STATUS_METHOD, aml_int(apic_id))));
aml_return(aml_call1(CPU_STATUS_METHOD, aml_int(cpu_apic_id))));
aml_append(dev, method);
method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
aml_append(method,
aml_return(aml_call2(CPU_EJECT_METHOD, aml_int(apic_id),
aml_return(aml_call2(CPU_EJECT_METHOD, aml_int(cpu_apic_id),
aml_arg(0)))
);
aml_append(dev, method);
@@ -298,11 +299,11 @@ void build_legacy_cpu_hotplug_aml(Aml *ctx, MachineState *machine,
/* Arg0 = APIC ID */
method = aml_method(AML_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
for (i = 0; i < apic_ids->len; i++) {
int apic_id = apic_ids->cpus[i].arch_id;
int cpu_apic_id = apic_ids->cpus[i].arch_id;
if_ctx = aml_if(aml_equal(aml_arg(0), aml_int(apic_id)));
if_ctx = aml_if(aml_equal(aml_arg(0), aml_int(cpu_apic_id)));
aml_append(if_ctx,
aml_notify(aml_name("CP%.02X", apic_id), aml_arg(1))
aml_notify(aml_name("CP%.02X", cpu_apic_id), aml_arg(1))
);
aml_append(method, if_ctx);
}
@@ -319,13 +320,13 @@ void build_legacy_cpu_hotplug_aml(Aml *ctx, MachineState *machine,
aml_varpackage(x86ms->apic_id_limit);
for (i = 0, apic_idx = 0; i < apic_ids->len; i++) {
int apic_id = apic_ids->cpus[i].arch_id;
int cpu_apic_id = apic_ids->cpus[i].arch_id;
for (; apic_idx < apic_id; apic_idx++) {
for (; apic_idx < cpu_apic_id; apic_idx++) {
aml_append(pkg, aml_int(0));
}
aml_append(pkg, aml_int(apic_ids->cpus[i].cpu ? 1 : 0));
apic_idx = apic_id + 1;
apic_idx = cpu_apic_id + 1;
}
aml_append(sb_scope, aml_name_decl(CPU_ON_BITMAP, pkg));
aml_append(ctx, sb_scope);
+3 -4
View File
@@ -296,10 +296,9 @@ static void allwinner_r40_realize(DeviceState *dev, Error **errp)
{
const char *r40_nic_models[] = { "gmac", "emac", NULL };
AwR40State *s = AW_R40(dev);
unsigned i;
/* CPUs */
for (i = 0; i < AW_R40_NUM_CPUS; i++) {
for (unsigned i = 0; i < AW_R40_NUM_CPUS; i++) {
/*
* Disable secondary CPUs. Guest EL3 firmware will start
@@ -335,7 +334,7 @@ static void allwinner_r40_realize(DeviceState *dev, Error **errp)
* maintenance interrupt signal to the appropriate GIC PPI inputs,
* and the GIC's IRQ/FIQ/VIRQ/VFIQ interrupt outputs to the CPU's inputs.
*/
for (i = 0; i < AW_R40_NUM_CPUS; i++) {
for (unsigned i = 0; i < AW_R40_NUM_CPUS; i++) {
DeviceState *cpudev = DEVICE(&s->cpus[i]);
int ppibase = AW_R40_GIC_NUM_SPI + i * GIC_INTERNAL + GIC_NR_SGIS;
int irq;
@@ -494,7 +493,7 @@ static void allwinner_r40_realize(DeviceState *dev, Error **errp)
qdev_get_gpio_in(DEVICE(&s->gic), AW_R40_GIC_SPI_EMAC));
/* Unimplemented devices */
for (i = 0; i < ARRAY_SIZE(r40_unimplemented); i++) {
for (unsigned i = 0; i < ARRAY_SIZE(r40_unimplemented); i++) {
create_unimplemented_device(r40_unimplemented[i].device_name,
r40_unimplemented[i].base,
r40_unimplemented[i].size);
+6 -10
View File
@@ -1468,7 +1468,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
if (info->has_cachectrl) {
for (i = 0; i < info->num_cpus; i++) {
char *name = g_strdup_printf("cachectrl%d", i);
MemoryRegion *mr;
qdev_prop_set_string(DEVICE(&s->cachectrl[i]), "name", name);
g_free(name);
@@ -1484,7 +1483,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
if (info->has_cpusecctrl) {
for (i = 0; i < info->num_cpus; i++) {
char *name = g_strdup_printf("CPUSECCTRL%d", i);
MemoryRegion *mr;
qdev_prop_set_string(DEVICE(&s->cpusecctrl[i]), "name", name);
g_free(name);
@@ -1499,7 +1497,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
}
if (info->has_cpuid) {
for (i = 0; i < info->num_cpus; i++) {
MemoryRegion *mr;
qdev_prop_set_uint32(DEVICE(&s->cpuid[i]), "CPUID", i);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->cpuid[i]), errp)) {
@@ -1512,7 +1509,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
}
if (info->has_cpu_pwrctrl) {
for (i = 0; i < info->num_cpus; i++) {
MemoryRegion *mr;
if (!sysbus_realize(SYS_BUS_DEVICE(&s->cpu_pwrctrl[i]), errp)) {
return;
@@ -1605,7 +1601,7 @@ static void armsse_realize(DeviceState *dev, Error **errp)
/* Wire up the splitters for the MPC IRQs */
for (i = 0; i < IOTS_NUM_EXP_MPC + info->sram_banks; i++) {
SplitIRQ *splitter = &s->mpc_irq_splitter[i];
DeviceState *dev_splitter = DEVICE(splitter);
DeviceState *devs = DEVICE(splitter);
if (!object_property_set_int(OBJECT(splitter), "num-lines", 2,
errp)) {
@@ -1617,22 +1613,22 @@ static void armsse_realize(DeviceState *dev, Error **errp)
if (i < IOTS_NUM_EXP_MPC) {
/* Splitter input is from GPIO input line */
s->mpcexp_status_in[i] = qdev_get_gpio_in(dev_splitter, 0);
qdev_connect_gpio_out(dev_splitter, 0,
s->mpcexp_status_in[i] = qdev_get_gpio_in(devs, 0);
qdev_connect_gpio_out(devs, 0,
qdev_get_gpio_in_named(dev_secctl,
"mpcexp_status", i));
} else {
/* Splitter input is from our own MPC */
qdev_connect_gpio_out_named(DEVICE(&s->mpc[i - IOTS_NUM_EXP_MPC]),
"irq", 0,
qdev_get_gpio_in(dev_splitter, 0));
qdev_connect_gpio_out(dev_splitter, 0,
qdev_get_gpio_in(devs, 0));
qdev_connect_gpio_out(devs, 0,
qdev_get_gpio_in_named(dev_secctl,
"mpc_status",
i - IOTS_NUM_EXP_MPC));
}
qdev_connect_gpio_out(dev_splitter, 1,
qdev_connect_gpio_out(devs, 1,
qdev_get_gpio_in(DEVICE(&s->mpc_irq_orgate), i));
}
/* Create GPIO inputs which will pass the line state for our
+1 -1
View File
@@ -517,7 +517,7 @@ static void armv7m_realize(DeviceState *dev, Error **errp)
for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
if (s->enable_bitband) {
Object *obj = OBJECT(&s->bitband[i]);
SysBusDevice *sbd = SYS_BUS_DEVICE(&s->bitband[i]);
sbd = SYS_BUS_DEVICE(&s->bitband[i]);
if (!object_property_set_int(obj, "base",
bitband_input_addr[i], errp)) {
+5 -5
View File
@@ -388,7 +388,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->timerctrl), 0,
sc->memmap[ASPEED_DEV_TIMER1]);
for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) {
qemu_irq irq = aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i);
irq = aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq);
}
@@ -413,8 +413,8 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
}
aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_DEV_I2C]);
for (i = 0; i < ASPEED_I2C_GET_CLASS(&s->i2c)->num_busses; i++) {
qemu_irq irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore),
sc->irqmap[ASPEED_DEV_I2C] + i);
irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore),
sc->irqmap[ASPEED_DEV_I2C] + i);
/* The AST2600 I2C controller has one IRQ per bus. */
sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c.busses[i]), 0, irq);
}
@@ -611,8 +611,8 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
}
aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i3c), 0, sc->memmap[ASPEED_DEV_I3C]);
for (i = 0; i < ASPEED_I3C_NR_DEVICES; i++) {
qemu_irq irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore),
sc->irqmap[ASPEED_DEV_I3C] + i);
irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore),
sc->irqmap[ASPEED_DEV_I3C] + i);
/* The AST2600 I3C controller has one IRQ per bus. */
sysbus_connect_irq(SYS_BUS_DEVICE(&s->i3c.devices[i]), 0, irq);
}
+13 -28
View File
@@ -328,12 +328,9 @@ enum { /* Command completion notification */
#define CMD_TTL(x) extract32((x)->word[2], 8 , 2)
#define CMD_TG(x) extract32((x)->word[2], 10, 2)
#define CMD_STE_RANGE(x) extract32((x)->word[2], 0 , 5)
#define CMD_ADDR(x) ({ \
uint64_t high = (uint64_t)(x)->word[3]; \
uint64_t low = extract32((x)->word[2], 12, 20); \
uint64_t addr = high << 32 | (low << 12); \
addr; \
})
#define CMD_ADDR(x) \
(((uint64_t)((x)->word[3]) << 32) | \
((extract64((x)->word[2], 12, 20)) << 12))
#define SMMU_FEATURE_2LVL_STE (1 << 0)
@@ -533,21 +530,13 @@ typedef struct CD {
#define STE_S2S(x) extract32((x)->word[5], 25, 1)
#define STE_S2R(x) extract32((x)->word[5], 26, 1)
#define STE_CTXPTR(x) \
({ \
unsigned long addr; \
addr = (uint64_t)extract32((x)->word[1], 0, 16) << 32; \
addr |= (uint64_t)((x)->word[0] & 0xffffffc0); \
addr; \
})
#define STE_CTXPTR(x) \
((extract64((x)->word[1], 0, 16) << 32) | \
((x)->word[0] & 0xffffffc0))
#define STE_S2TTB(x) \
({ \
unsigned long addr; \
addr = (uint64_t)extract32((x)->word[7], 0, 16) << 32; \
addr |= (uint64_t)((x)->word[6] & 0xfffffff0); \
addr; \
})
#define STE_S2TTB(x) \
((extract64((x)->word[7], 0, 16) << 32) | \
((x)->word[6] & 0xfffffff0))
static inline int oas2bits(int oas_field)
{
@@ -585,14 +574,10 @@ static inline int pa_range(STE *ste)
#define CD_VALID(x) extract32((x)->word[0], 31, 1)
#define CD_ASID(x) extract32((x)->word[1], 16, 16)
#define CD_TTB(x, sel) \
({ \
uint64_t hi, lo; \
hi = extract32((x)->word[(sel) * 2 + 3], 0, 19); \
hi <<= 32; \
lo = (x)->word[(sel) * 2 + 2] & ~0xfULL; \
hi | lo; \
})
#define CD_TTB(x, sel) \
((extract64((x)->word[(sel) * 2 + 3], 0, 19) << 32) | \
((x)->word[(sel) * 2 + 2] & ~0xfULL))
#define CD_HAD(x, sel) extract32((x)->word[(sel) * 2 + 2], 1, 1)
#define CD_TSZ(x, sel) extract32((x)->word[0], (16 * (sel)) + 0, 6)
+2 -2
View File
@@ -1040,8 +1040,8 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr,
SMMUv3State *s = sdev->smmu;
if (!tg) {
SMMUEventInfo event = {.inval_ste_allowed = true};
SMMUTransCfg *cfg = smmuv3_get_config(sdev, &event);
SMMUEventInfo eventinfo = {.inval_ste_allowed = true};
SMMUTransCfg *cfg = smmuv3_get_config(sdev, &eventinfo);
SMMUTransTableInfo *tt;
if (!cfg) {
+1 -2
View File
@@ -801,7 +801,6 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)
for (i = 0; i < smp_cpus; i++) {
DeviceState *cpudev = DEVICE(qemu_get_cpu(i));
int ppibase = NUM_IRQS + i * GIC_INTERNAL + GIC_NR_SGIS;
int irq;
/* Mapping from the output timer irq lines from the CPU to the
* GIC PPI inputs we use for the virt board.
*/
@@ -812,7 +811,7 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)
[GTIMER_SEC] = ARCH_TIMER_S_EL1_IRQ,
};
for (irq = 0; irq < ARRAY_SIZE(timer_irq); irq++) {
for (unsigned irq = 0; irq < ARRAY_SIZE(timer_irq); irq++) {
qdev_connect_gpio_out(cpudev, irq,
qdev_get_gpio_in(vms->gic,
ppibase + timer_irq[irq]));
+3 -3
View File
@@ -369,7 +369,7 @@ static void xen_block_get_vdev(Object *obj, Visitor *v, const char *name,
case XEN_BLOCK_VDEV_TYPE_XVD:
case XEN_BLOCK_VDEV_TYPE_HD:
case XEN_BLOCK_VDEV_TYPE_SD: {
char *name = disk_to_vbd_name(vdev->disk);
char *vbd_name = disk_to_vbd_name(vdev->disk);
str = g_strdup_printf("%s%s%lu",
(vdev->type == XEN_BLOCK_VDEV_TYPE_XVD) ?
@@ -377,8 +377,8 @@ static void xen_block_get_vdev(Object *obj, Visitor *v, const char *name,
(vdev->type == XEN_BLOCK_VDEV_TYPE_HD) ?
"hd" :
"sd",
name, vdev->partition);
g_free(name);
vbd_name, vdev->partition);
g_free(vbd_name);
break;
}
default:

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