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https://github.com/izzy2lost/xemu.git
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hw/loongarch/virt: Remove header file ls7a.h
LoongArch virt machine uses GPEX PCIE host bridge rather than 7A host bridge. Remove header file ls7a.h and put hardware information to file include/hw/loongarch/virt.h Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
This commit is contained in:
@@ -1308,7 +1308,6 @@ F: include/hw/intc/loongarch_*.h
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F: include/hw/intc/loongson_ipi_common.h
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F: hw/intc/loongarch_*.c
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F: hw/intc/loongson_ipi_common.c
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F: include/hw/pci-host/ls7a.h
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F: hw/rtc/ls7a_rtc.c
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F: gdb-xml/loongarch*.xml
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@@ -10,7 +10,6 @@
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#include "hw/boards.h"
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#include "hw/intc/loongarch_pch_pic.h"
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#include "hw/loongarch/virt.h"
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#include "hw/pci-host/ls7a.h"
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#include "system/kvm.h"
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static void kvm_pch_pic_access_reg(int fd, uint64_t addr, void *val, bool write)
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@@ -21,7 +21,6 @@
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#include "system/reset.h"
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/* Supported chipsets: */
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#include "hw/pci-host/ls7a.h"
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#include "hw/loongarch/virt.h"
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#include "hw/acpi/utils.h"
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@@ -12,7 +12,6 @@
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#include "hw/loader.h"
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#include "hw/loongarch/virt.h"
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#include "hw/pci-host/gpex.h"
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#include "hw/pci-host/ls7a.h"
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#include "system/device_tree.h"
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#include "system/reset.h"
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#include "target/loongarch/cpu.h"
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@@ -29,7 +29,6 @@
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#include "hw/intc/loongarch_pch_pic.h"
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#include "hw/intc/loongarch_pch_msi.h"
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#include "hw/intc/loongarch_dintc.h"
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#include "hw/pci-host/ls7a.h"
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#include "hw/pci-host/gpex.h"
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#include "hw/misc/unimp.h"
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#include "hw/loongarch/fw_cfg.h"
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@@ -7,7 +7,7 @@
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#ifndef HW_LOONGARCH_PIC_COMMON_H
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#define HW_LOONGARCH_PIC_COMMON_H
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#include "hw/pci-host/ls7a.h"
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#include "hw/loongarch/virt.h"
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#include "hw/sysbus.h"
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#define PCH_PIC_INT_ID 0x00
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@@ -25,6 +25,7 @@
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#define IOCSRF_VM 11
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#define IOCSRF_DMSI 15
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/* IOCSR region */
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#define VERSION_REG 0x0
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#define FEATURE_REG 0x8
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#define VENDOR_REG 0x10
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@@ -36,6 +37,18 @@
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#define LOONGARCH_MAX_CPUS 256
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/* MMIO memory region */
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#define VIRT_PCH_REG_BASE 0x10000000UL
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#define VIRT_PCH_REG_SIZE 0x400
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#define VIRT_IOAPIC_REG_BASE (VIRT_PCH_REG_BASE)
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#define VIRT_MISC_REG_BASE (VIRT_PCH_REG_BASE + 0x00080000)
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#define VIRT_RTC_REG_BASE (VIRT_MISC_REG_BASE + 0x00050100)
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#define VIRT_RTC_LEN 0x100
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#define VIRT_PLATFORM_BUS_BASEADDRESS 0x16000000UL
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#define VIRT_PLATFORM_BUS_SIZE 0x02000000
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#define VIRT_PCI_IO_BASE 0x18004000UL
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#define VIRT_PCI_IO_OFFSET 0x4000
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#define VIRT_PCI_IO_SIZE 0xC000
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#define VIRT_FWCFG_BASE 0x1e020000UL
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#define VIRT_BIOS_BASE 0x1c000000UL
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#define VIRT_BIOS_SIZE (16 * MiB)
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@@ -44,6 +57,16 @@
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#define VIRT_FLASH0_SIZE VIRT_BIOS_SIZE
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#define VIRT_FLASH1_BASE 0x1d000000UL
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#define VIRT_FLASH1_SIZE (16 * MiB)
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#define VIRT_UART_BASE 0x1fe001e0UL
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#define VIRT_UART_SIZE 0x100
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#define VIRT_PCI_CFG_BASE 0x20000000UL
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#define VIRT_PCI_CFG_SIZE 0x08000000UL
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#define VIRT_DINTC_BASE 0x2FE00000UL
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#define VIRT_DINTC_SIZE 0x00100000UL
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#define VIRT_PCH_MSI_ADDR_LOW 0x2FF00000UL
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#define VIRT_PCH_MSI_SIZE 0x8
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#define VIRT_PCI_MEM_BASE 0x40000000UL
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#define VIRT_PCI_MEM_SIZE 0x40000000UL
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#define VIRT_LOWMEM_BASE 0
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#define VIRT_LOWMEM_SIZE 0x10000000
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@@ -53,6 +76,22 @@
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#define VIRT_GED_REG_ADDR QEMU_ALIGN_UP(VIRT_GED_MEM_ADDR + MEMORY_HOTPLUG_IO_LEN, 4)
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#define VIRT_GED_CPUHP_ADDR QEMU_ALIGN_UP(VIRT_GED_REG_ADDR + ACPI_GED_REG_COUNT, 4)
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/*
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* GSI_BASE is hard-coded with 64 in linux kernel, else kernel fails to boot
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* 0 - 15 GSI for ISA devices even if there is no ISA devices
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* 16 - 63 GSI for CPU devices such as timers/perf monitor etc
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* 64 - GSI for external devices
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*/
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#define VIRT_PCH_PIC_IRQ_NUM 32
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#define VIRT_GSI_BASE 64
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#define VIRT_DEVICE_IRQS 16
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#define VIRT_UART_IRQ (VIRT_GSI_BASE + 2)
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#define VIRT_UART_COUNT 4
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#define VIRT_RTC_IRQ (VIRT_GSI_BASE + 6)
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#define VIRT_SCI_IRQ (VIRT_GSI_BASE + 7)
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#define VIRT_PLATFORM_BUS_IRQ (VIRT_GSI_BASE + 8)
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#define VIRT_PLATFORM_BUS_NUM_IRQS 2
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#define COMMAND_LINE_SIZE 512
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#define FDT_BASE 0x100000
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@@ -13,43 +13,4 @@
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#include "qemu/range.h"
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#include "qom/object.h"
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#define VIRT_PCI_MEM_BASE 0x40000000UL
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#define VIRT_PCI_MEM_SIZE 0x40000000UL
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#define VIRT_PCI_IO_OFFSET 0x4000
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#define VIRT_PCI_CFG_BASE 0x20000000
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#define VIRT_PCI_CFG_SIZE 0x08000000
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#define VIRT_PCI_IO_BASE 0x18004000UL
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#define VIRT_PCI_IO_SIZE 0xC000
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#define VIRT_PCH_REG_BASE 0x10000000UL
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#define VIRT_IOAPIC_REG_BASE (VIRT_PCH_REG_BASE)
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#define VIRT_PCH_MSI_ADDR_LOW 0x2FF00000UL
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#define VIRT_DINTC_SIZE 0x100000UL
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#define VIRT_DINTC_BASE 0x2FE00000UL
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#define VIRT_PCH_REG_SIZE 0x400
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#define VIRT_PCH_MSI_SIZE 0x8
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/*
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* GSI_BASE is hard-coded with 64 in linux kernel, else kernel fails to boot
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* 0 - 15 GSI for ISA devices even if there is no ISA devices
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* 16 - 63 GSI for CPU devices such as timers/perf monitor etc
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* 64 - GSI for external devices
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*/
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#define VIRT_PCH_PIC_IRQ_NUM 32
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#define VIRT_GSI_BASE 64
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#define VIRT_DEVICE_IRQS 16
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#define VIRT_UART_COUNT 4
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#define VIRT_UART_IRQ (VIRT_GSI_BASE + 2)
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#define VIRT_UART_BASE 0x1fe001e0
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#define VIRT_UART_SIZE 0x100
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#define VIRT_RTC_IRQ (VIRT_GSI_BASE + 6)
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#define VIRT_MISC_REG_BASE (VIRT_PCH_REG_BASE + 0x00080000)
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#define VIRT_RTC_REG_BASE (VIRT_MISC_REG_BASE + 0x00050100)
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#define VIRT_RTC_LEN 0x100
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#define VIRT_SCI_IRQ (VIRT_GSI_BASE + 7)
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#define VIRT_PLATFORM_BUS_BASEADDRESS 0x16000000
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#define VIRT_PLATFORM_BUS_SIZE 0x2000000
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#define VIRT_PLATFORM_BUS_NUM_IRQS 2
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#define VIRT_PLATFORM_BUS_IRQ (VIRT_GSI_BASE + 8)
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#endif
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