hw/loongarch/virt: Remove header file ls7a.h

LoongArch virt machine uses GPEX PCIE host bridge rather than 7A host
bridge. Remove header file ls7a.h and put hardware information to file
include/hw/loongarch/virt.h

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
This commit is contained in:
Bibo Mao
2025-10-15 11:05:19 +08:00
parent f72848e31f
commit 52d9074163
8 changed files with 40 additions and 45 deletions
-1
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@@ -1308,7 +1308,6 @@ F: include/hw/intc/loongarch_*.h
F: include/hw/intc/loongson_ipi_common.h
F: hw/intc/loongarch_*.c
F: hw/intc/loongson_ipi_common.c
F: include/hw/pci-host/ls7a.h
F: hw/rtc/ls7a_rtc.c
F: gdb-xml/loongarch*.xml
-1
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@@ -10,7 +10,6 @@
#include "hw/boards.h"
#include "hw/intc/loongarch_pch_pic.h"
#include "hw/loongarch/virt.h"
#include "hw/pci-host/ls7a.h"
#include "system/kvm.h"
static void kvm_pch_pic_access_reg(int fd, uint64_t addr, void *val, bool write)
-1
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@@ -21,7 +21,6 @@
#include "system/reset.h"
/* Supported chipsets: */
#include "hw/pci-host/ls7a.h"
#include "hw/loongarch/virt.h"
#include "hw/acpi/utils.h"
-1
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@@ -12,7 +12,6 @@
#include "hw/loader.h"
#include "hw/loongarch/virt.h"
#include "hw/pci-host/gpex.h"
#include "hw/pci-host/ls7a.h"
#include "system/device_tree.h"
#include "system/reset.h"
#include "target/loongarch/cpu.h"
-1
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@@ -29,7 +29,6 @@
#include "hw/intc/loongarch_pch_pic.h"
#include "hw/intc/loongarch_pch_msi.h"
#include "hw/intc/loongarch_dintc.h"
#include "hw/pci-host/ls7a.h"
#include "hw/pci-host/gpex.h"
#include "hw/misc/unimp.h"
#include "hw/loongarch/fw_cfg.h"
+1 -1
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@@ -7,7 +7,7 @@
#ifndef HW_LOONGARCH_PIC_COMMON_H
#define HW_LOONGARCH_PIC_COMMON_H
#include "hw/pci-host/ls7a.h"
#include "hw/loongarch/virt.h"
#include "hw/sysbus.h"
#define PCH_PIC_INT_ID 0x00
+39
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@@ -25,6 +25,7 @@
#define IOCSRF_VM 11
#define IOCSRF_DMSI 15
/* IOCSR region */
#define VERSION_REG 0x0
#define FEATURE_REG 0x8
#define VENDOR_REG 0x10
@@ -36,6 +37,18 @@
#define LOONGARCH_MAX_CPUS 256
/* MMIO memory region */
#define VIRT_PCH_REG_BASE 0x10000000UL
#define VIRT_PCH_REG_SIZE 0x400
#define VIRT_IOAPIC_REG_BASE (VIRT_PCH_REG_BASE)
#define VIRT_MISC_REG_BASE (VIRT_PCH_REG_BASE + 0x00080000)
#define VIRT_RTC_REG_BASE (VIRT_MISC_REG_BASE + 0x00050100)
#define VIRT_RTC_LEN 0x100
#define VIRT_PLATFORM_BUS_BASEADDRESS 0x16000000UL
#define VIRT_PLATFORM_BUS_SIZE 0x02000000
#define VIRT_PCI_IO_BASE 0x18004000UL
#define VIRT_PCI_IO_OFFSET 0x4000
#define VIRT_PCI_IO_SIZE 0xC000
#define VIRT_FWCFG_BASE 0x1e020000UL
#define VIRT_BIOS_BASE 0x1c000000UL
#define VIRT_BIOS_SIZE (16 * MiB)
@@ -44,6 +57,16 @@
#define VIRT_FLASH0_SIZE VIRT_BIOS_SIZE
#define VIRT_FLASH1_BASE 0x1d000000UL
#define VIRT_FLASH1_SIZE (16 * MiB)
#define VIRT_UART_BASE 0x1fe001e0UL
#define VIRT_UART_SIZE 0x100
#define VIRT_PCI_CFG_BASE 0x20000000UL
#define VIRT_PCI_CFG_SIZE 0x08000000UL
#define VIRT_DINTC_BASE 0x2FE00000UL
#define VIRT_DINTC_SIZE 0x00100000UL
#define VIRT_PCH_MSI_ADDR_LOW 0x2FF00000UL
#define VIRT_PCH_MSI_SIZE 0x8
#define VIRT_PCI_MEM_BASE 0x40000000UL
#define VIRT_PCI_MEM_SIZE 0x40000000UL
#define VIRT_LOWMEM_BASE 0
#define VIRT_LOWMEM_SIZE 0x10000000
@@ -53,6 +76,22 @@
#define VIRT_GED_REG_ADDR QEMU_ALIGN_UP(VIRT_GED_MEM_ADDR + MEMORY_HOTPLUG_IO_LEN, 4)
#define VIRT_GED_CPUHP_ADDR QEMU_ALIGN_UP(VIRT_GED_REG_ADDR + ACPI_GED_REG_COUNT, 4)
/*
* GSI_BASE is hard-coded with 64 in linux kernel, else kernel fails to boot
* 0 - 15 GSI for ISA devices even if there is no ISA devices
* 16 - 63 GSI for CPU devices such as timers/perf monitor etc
* 64 - GSI for external devices
*/
#define VIRT_PCH_PIC_IRQ_NUM 32
#define VIRT_GSI_BASE 64
#define VIRT_DEVICE_IRQS 16
#define VIRT_UART_IRQ (VIRT_GSI_BASE + 2)
#define VIRT_UART_COUNT 4
#define VIRT_RTC_IRQ (VIRT_GSI_BASE + 6)
#define VIRT_SCI_IRQ (VIRT_GSI_BASE + 7)
#define VIRT_PLATFORM_BUS_IRQ (VIRT_GSI_BASE + 8)
#define VIRT_PLATFORM_BUS_NUM_IRQS 2
#define COMMAND_LINE_SIZE 512
#define FDT_BASE 0x100000
-39
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@@ -13,43 +13,4 @@
#include "qemu/range.h"
#include "qom/object.h"
#define VIRT_PCI_MEM_BASE 0x40000000UL
#define VIRT_PCI_MEM_SIZE 0x40000000UL
#define VIRT_PCI_IO_OFFSET 0x4000
#define VIRT_PCI_CFG_BASE 0x20000000
#define VIRT_PCI_CFG_SIZE 0x08000000
#define VIRT_PCI_IO_BASE 0x18004000UL
#define VIRT_PCI_IO_SIZE 0xC000
#define VIRT_PCH_REG_BASE 0x10000000UL
#define VIRT_IOAPIC_REG_BASE (VIRT_PCH_REG_BASE)
#define VIRT_PCH_MSI_ADDR_LOW 0x2FF00000UL
#define VIRT_DINTC_SIZE 0x100000UL
#define VIRT_DINTC_BASE 0x2FE00000UL
#define VIRT_PCH_REG_SIZE 0x400
#define VIRT_PCH_MSI_SIZE 0x8
/*
* GSI_BASE is hard-coded with 64 in linux kernel, else kernel fails to boot
* 0 - 15 GSI for ISA devices even if there is no ISA devices
* 16 - 63 GSI for CPU devices such as timers/perf monitor etc
* 64 - GSI for external devices
*/
#define VIRT_PCH_PIC_IRQ_NUM 32
#define VIRT_GSI_BASE 64
#define VIRT_DEVICE_IRQS 16
#define VIRT_UART_COUNT 4
#define VIRT_UART_IRQ (VIRT_GSI_BASE + 2)
#define VIRT_UART_BASE 0x1fe001e0
#define VIRT_UART_SIZE 0x100
#define VIRT_RTC_IRQ (VIRT_GSI_BASE + 6)
#define VIRT_MISC_REG_BASE (VIRT_PCH_REG_BASE + 0x00080000)
#define VIRT_RTC_REG_BASE (VIRT_MISC_REG_BASE + 0x00050100)
#define VIRT_RTC_LEN 0x100
#define VIRT_SCI_IRQ (VIRT_GSI_BASE + 7)
#define VIRT_PLATFORM_BUS_BASEADDRESS 0x16000000
#define VIRT_PLATFORM_BUS_SIZE 0x2000000
#define VIRT_PLATFORM_BUS_NUM_IRQS 2
#define VIRT_PLATFORM_BUS_IRQ (VIRT_GSI_BASE + 8)
#endif