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Merge branch 'tcg-s390' of git://github.com/rth7680/qemu

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* 'tcg-s390' of git://github.com/rth7680/qemu:
  tcg-s390: Fix merge error in tgen_brcond
  tcg-s390: Use all 20 bits of the offset in tcg_out_mem
  tcg-s390: Use load-address for addition
  tcg-s390: Cleanup argument shuffling fixme in softmmu code
  tcg-s390: Use risbgz for andi
  tcg-s390: Remove constraint letters for and
  tcg-s390: Implement deposit opcodes
  tcg-s390: Implement movcond opcodes
  tcg-s390: Implement mulu2_i64 opcode
  tcg-s390: Implement add2/sub2 opcodes
  tcg-s390: Remove useless preprocessor conditions
  tcg-s390: Properly allocate a stack frame.
  tcg-s390: Fix movi
This commit is contained in:
Aurelien Jarno
2013-04-13 13:49:20 +02:00
parent 93b48c201e b879f30846
commit 4b7b054682
2 changed files with 314 additions and 253 deletions
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tcg/s390/tcg-target.c
+300 -241
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File diff suppressed because it is too large Load Diff
tcg/s390/tcg-target.h
+14 -12
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@@ -63,14 +63,13 @@ typedef enum TCGReg {
#define TCG_TARGET_HAS_eqv_i32 0
#define TCG_TARGET_HAS_nand_i32 0
#define TCG_TARGET_HAS_nor_i32 0
#define TCG_TARGET_HAS_deposit_i32 0
#define TCG_TARGET_HAS_movcond_i32 0
#define TCG_TARGET_HAS_add2_i32 0
#define TCG_TARGET_HAS_sub2_i32 0
#define TCG_TARGET_HAS_deposit_i32 1
#define TCG_TARGET_HAS_movcond_i32 1
#define TCG_TARGET_HAS_add2_i32 1
#define TCG_TARGET_HAS_sub2_i32 1
#define TCG_TARGET_HAS_mulu2_i32 0
#define TCG_TARGET_HAS_muls2_i32 0
#if TCG_TARGET_REG_BITS == 64
#define TCG_TARGET_HAS_div2_i64 1
#define TCG_TARGET_HAS_rot_i64 1
#define TCG_TARGET_HAS_ext8s_i64 1
@@ -89,18 +88,21 @@ typedef enum TCGReg {
#define TCG_TARGET_HAS_eqv_i64 0
#define TCG_TARGET_HAS_nand_i64 0
#define TCG_TARGET_HAS_nor_i64 0
#define TCG_TARGET_HAS_deposit_i64 0
#define TCG_TARGET_HAS_movcond_i64 0
#define TCG_TARGET_HAS_add2_i64 0
#define TCG_TARGET_HAS_sub2_i64 0
#define TCG_TARGET_HAS_mulu2_i64 0
#define TCG_TARGET_HAS_deposit_i64 1
#define TCG_TARGET_HAS_movcond_i64 1
#define TCG_TARGET_HAS_add2_i64 1
#define TCG_TARGET_HAS_sub2_i64 1
#define TCG_TARGET_HAS_mulu2_i64 1
#define TCG_TARGET_HAS_muls2_i64 0
#endif
extern bool tcg_target_deposit_valid(int ofs, int len);
#define TCG_TARGET_deposit_i32_valid tcg_target_deposit_valid
#define TCG_TARGET_deposit_i64_valid tcg_target_deposit_valid
/* used for function call generation */
#define TCG_REG_CALL_STACK TCG_REG_R15
#define TCG_TARGET_STACK_ALIGN 8
#define TCG_TARGET_CALL_STACK_OFFSET 0
#define TCG_TARGET_CALL_STACK_OFFSET 160
#define TCG_TARGET_EXTEND_ARGS 1