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hw/arm/xlnx-versal: PMC IOU SCLR: refactor creation

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Refactor the PMC IOU SLCR device creation using the VersalMap structure.
This is the first user of a shared IRQ using an OR gate. The OSPI
controller is reconnected to the SLCR.

Signed-off-by: Luc Michel <luc.michel@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250926070806.292065-14-luc.michel@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Luc Michel
2025-10-07 10:35:36 +01:00
committed by Peter Maydell
parent 1bec18fc13
commit 482f95526a
2 changed files with 28 additions and 25 deletions
Download Patch File Download Diff File Expand all files Collapse all files
hw/arm/xlnx-versal.c
+28 -20
View File
@@ -35,6 +35,7 @@
#include "hw/usb/xlnx-usb-subsystem.h"
#include "hw/nvram/xlnx-versal-efuse.h"
#include "hw/ssi/xlnx-versal-ospi.h"
#include "hw/misc/xlnx-versal-pmc-iou-slcr.h"
#define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
#define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f")
@@ -116,6 +117,8 @@ typedef struct VersalMap {
uint64_t dma_dst;
int irq;
} ospi;
VersalSimplePeriphMap pmc_iou_slcr;
} VersalMap;
static const VersalMap VERSAL_MAP = {
@@ -156,6 +159,8 @@ static const VersalMap VERSAL_MAP = {
.dma_src = 0xf1011000, .dma_dst = 0xf1011800,
.irq = 124,
},
.pmc_iou_slcr = { 0xf1060000, OR_IRQ(121, 0) },
};
static const VersalMap *VERSION_TO_MAP[] = {
@@ -870,21 +875,24 @@ static void versal_create_efuse(Versal *s,
versal_sysbus_connect_irq(s, SYS_BUS_DEVICE(ctrl), 0, map->irq);
}
static void versal_create_pmc_iou_slcr(Versal *s, qemu_irq *pic)
static DeviceState *versal_create_pmc_iou_slcr(Versal *s,
const VersalSimplePeriphMap *map)
{
SysBusDevice *sbd;
DeviceState *dev;
object_initialize_child(OBJECT(s), "versal-pmc-iou-slcr", &s->pmc.iou.slcr,
TYPE_XILINX_VERSAL_PMC_IOU_SLCR);
dev = qdev_new(TYPE_XILINX_VERSAL_PMC_IOU_SLCR);
object_property_add_child(OBJECT(s), "pmc-iou-slcr", OBJECT(dev));
sbd = SYS_BUS_DEVICE(&s->pmc.iou.slcr);
sysbus_realize(sbd, &error_fatal);
sbd = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(sbd, &error_fatal);
memory_region_add_subregion(&s->mr_ps, MM_PMC_PMC_IOU_SLCR,
memory_region_add_subregion(&s->mr_ps, map->addr,
sysbus_mmio_get_region(sbd, 0));
sysbus_connect_irq(sbd, 0,
qdev_get_gpio_in(DEVICE(&s->pmc.apb_irq_orgate), 2));
versal_sysbus_connect_irq(s, sbd, 0, map->irq);
return dev;
}
static DeviceState *versal_create_ospi(Versal *s,
@@ -1210,6 +1218,7 @@ static void versal_unimp_irq_parity_imr(void *opaque, int n, int level)
static void versal_unimp(Versal *s)
{
DeviceState *slcr;
qemu_irq gpio_in;
versal_unimp_area(s, "psm", &s->mr_ps,
@@ -1232,23 +1241,18 @@ static void versal_unimp(Versal *s)
qdev_init_gpio_in_named(DEVICE(s), versal_unimp_irq_parity_imr,
"irq-parity-imr-dummy", 1);
slcr = DEVICE(versal_get_child(s, "pmc-iou-slcr"));
gpio_in = qdev_get_gpio_in_named(DEVICE(s), "sd-emmc-sel-dummy", 0);
qdev_connect_gpio_out_named(DEVICE(&s->pmc.iou.slcr), "sd-emmc-sel", 0,
gpio_in);
qdev_connect_gpio_out_named(slcr, "sd-emmc-sel", 0, gpio_in);
gpio_in = qdev_get_gpio_in_named(DEVICE(s), "sd-emmc-sel-dummy", 1);
qdev_connect_gpio_out_named(DEVICE(&s->pmc.iou.slcr), "sd-emmc-sel", 1,
gpio_in);
qdev_connect_gpio_out_named(slcr, "sd-emmc-sel", 1, gpio_in);
gpio_in = qdev_get_gpio_in_named(DEVICE(s), "qspi-ospi-mux-sel-dummy", 0);
qdev_connect_gpio_out_named(DEVICE(&s->pmc.iou.slcr),
"qspi-ospi-mux-sel", 0,
gpio_in);
qdev_connect_gpio_out_named(slcr, "qspi-ospi-mux-sel", 0, gpio_in);
gpio_in = qdev_get_gpio_in_named(DEVICE(s), "irq-parity-imr-dummy", 0);
qdev_connect_gpio_out_named(DEVICE(&s->pmc.iou.slcr),
SYSBUS_DEVICE_GPIO_IRQ, 0,
gpio_in);
qdev_connect_gpio_out_named(slcr, SYSBUS_DEVICE_GPIO_IRQ, 0, gpio_in);
}
static uint32_t fdt_add_clk_node(Versal *s, const char *name,
@@ -1271,6 +1275,7 @@ static uint32_t fdt_add_clk_node(Versal *s, const char *name,
static void versal_realize(DeviceState *dev, Error **errp)
{
Versal *s = XLNX_VERSAL_BASE(dev);
DeviceState *slcr, *ospi;
qemu_irq pic[XLNX_VERSAL_NR_IRQS];
Object *container;
const VersalMap *map = versal_get_map(s);
@@ -1323,13 +1328,16 @@ static void versal_realize(DeviceState *dev, Error **errp)
}
versal_create_efuse(s, &map->efuse);
versal_create_ospi(s, &map->ospi);
ospi = versal_create_ospi(s, &map->ospi);
slcr = versal_create_pmc_iou_slcr(s, &map->pmc_iou_slcr);
qdev_connect_gpio_out_named(slcr, "ospi-mux-sel", 0,
qdev_get_gpio_in_named(ospi,
"ospi-mux-sel", 0));
versal_create_pmc_apb_irq_orgate(s, pic);
versal_create_rtc(s, pic);
versal_create_trng(s, pic);
versal_create_bbram(s, pic);
versal_create_pmc_iou_slcr(s, pic);
versal_create_crl(s, pic);
versal_create_cfu(s, pic);
versal_map_ddr(s);
include/hw/arm/xlnx-versal.h
-5
View File
@@ -21,7 +21,6 @@
#include "qom/object.h"
#include "hw/nvram/xlnx-bbram.h"
#include "hw/misc/xlnx-versal-crl.h"
#include "hw/misc/xlnx-versal-pmc-iou-slcr.h"
#include "hw/misc/xlnx-versal-trng.h"
#include "net/can_emu.h"
#include "hw/misc/xlnx-versal-cfu.h"
@@ -84,10 +83,6 @@ struct Versal {
/* The Platform Management Controller subsystem. */
struct {
struct {
XlnxVersalPmcIouSlcr slcr;
} iou;
XlnxZynqMPRTC rtc;
XlnxVersalTRng trng;
XlnxBBRam bbram;