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linux-headers: Update to Linux 6.13-rc1

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This linux headers update includes required changes for
the gen17 CPU model.

Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Suggested-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20241206122751.189721-7-brueckner@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
Hendrik Brueckner
2024-12-11 09:18:38 +01:00
committed by Thomas Huth
parent eba6f49128
commit 44fe383c27
33 changed files with 506 additions and 23 deletions
Download Patch File Download Diff File Expand all files Collapse all files
include/standard-headers/drm/drm_fourcc.h
+1
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@@ -1515,6 +1515,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier)
* 64K_D_2D on GFX12 is identical to 64K_D on GFX11.
*/
#define AMD_FMT_MOD_TILE_GFX9_64K_D 10
#define AMD_FMT_MOD_TILE_GFX9_4K_D_X 22
#define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25
#define AMD_FMT_MOD_TILE_GFX9_64K_D_X 26
#define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27
include/standard-headers/linux/ethtool.h
+5
View File
@@ -2526,6 +2526,11 @@ struct ethtool_link_settings {
uint8_t master_slave_state;
uint8_t rate_matching;
uint32_t reserved[7];
/* Linux builds with -Wflex-array-member-not-at-end but does
* not use the "link_mode_masks" member. Leave it defined for
* userspace for now, and when userspace wants to start using
* -Wfamnae, we'll need a new solution.
*/
uint32_t link_mode_masks[];
/* layout of link_mode_masks fields:
* uint32_t map_supported[link_mode_masks_nwords];
include/standard-headers/linux/pci_regs.h
+30 -8
View File
@@ -340,7 +340,8 @@
#define PCI_MSIX_ENTRY_UPPER_ADDR 0x4 /* Message Upper Address */
#define PCI_MSIX_ENTRY_DATA 0x8 /* Message Data */
#define PCI_MSIX_ENTRY_VECTOR_CTRL 0xc /* Vector Control */
#define PCI_MSIX_ENTRY_CTRL_MASKBIT 0x00000001
#define PCI_MSIX_ENTRY_CTRL_MASKBIT 0x00000001 /* Mask Bit */
#define PCI_MSIX_ENTRY_CTRL_ST 0xffff0000 /* Steering Tag */
/* CompactPCI Hotswap Register */
@@ -659,6 +660,7 @@
#define PCI_EXP_DEVCAP2_ATOMIC_COMP64 0x00000100 /* 64b AtomicOp completion */
#define PCI_EXP_DEVCAP2_ATOMIC_COMP128 0x00000200 /* 128b AtomicOp completion */
#define PCI_EXP_DEVCAP2_LTR 0x00000800 /* Latency tolerance reporting */
#define PCI_EXP_DEVCAP2_TPH_COMP_MASK 0x00003000 /* TPH completer support */
#define PCI_EXP_DEVCAP2_OBFF_MASK 0x000c0000 /* OBFF support mechanism */
#define PCI_EXP_DEVCAP2_OBFF_MSG 0x00040000 /* New message signaling */
#define PCI_EXP_DEVCAP2_OBFF_WAKE 0x00080000 /* Re-use WAKE# for OBFF */
@@ -678,6 +680,7 @@
#define PCI_EXP_DEVSTA2 0x2a /* Device Status 2 */
#define PCI_CAP_EXP_RC_ENDPOINT_SIZEOF_V2 0x2c /* end of v2 EPs w/o link */
#define PCI_EXP_LNKCAP2 0x2c /* Link Capabilities 2 */
#define PCI_EXP_LNKCAP2_SLS 0x000000fe /* Supported Link Speeds Vector */
#define PCI_EXP_LNKCAP2_SLS_2_5GB 0x00000002 /* Supported Speed 2.5GT/s */
#define PCI_EXP_LNKCAP2_SLS_5_0GB 0x00000004 /* Supported Speed 5GT/s */
#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x00000008 /* Supported Speed 8GT/s */
@@ -1023,15 +1026,34 @@
#define PCI_DPA_CAP_SUBSTATE_MASK 0x1F /* # substates - 1 */
#define PCI_DPA_BASE_SIZEOF 16 /* size with 0 substates */
/* TPH Completer Support */
#define PCI_EXP_DEVCAP2_TPH_COMP_NONE 0x0 /* None */
#define PCI_EXP_DEVCAP2_TPH_COMP_TPH_ONLY 0x1 /* TPH only */
#define PCI_EXP_DEVCAP2_TPH_COMP_EXT_TPH 0x3 /* TPH and Extended TPH */
/* TPH Requester */
#define PCI_TPH_CAP 4 /* capability register */
#define PCI_TPH_CAP_LOC_MASK 0x600 /* location mask */
#define PCI_TPH_LOC_NONE 0x000 /* no location */
#define PCI_TPH_LOC_CAP 0x200 /* in capability */
#define PCI_TPH_LOC_MSIX 0x400 /* in MSI-X */
#define PCI_TPH_CAP_ST_MASK 0x07FF0000 /* ST table mask */
#define PCI_TPH_CAP_ST_SHIFT 16 /* ST table shift */
#define PCI_TPH_BASE_SIZEOF 0xc /* size with no ST table */
#define PCI_TPH_CAP_ST_NS 0x00000001 /* No ST Mode Supported */
#define PCI_TPH_CAP_ST_IV 0x00000002 /* Interrupt Vector Mode Supported */
#define PCI_TPH_CAP_ST_DS 0x00000004 /* Device Specific Mode Supported */
#define PCI_TPH_CAP_EXT_TPH 0x00000100 /* Ext TPH Requester Supported */
#define PCI_TPH_CAP_LOC_MASK 0x00000600 /* ST Table Location */
#define PCI_TPH_LOC_NONE 0x00000000 /* Not present */
#define PCI_TPH_LOC_CAP 0x00000200 /* In capability */
#define PCI_TPH_LOC_MSIX 0x00000400 /* In MSI-X */
#define PCI_TPH_CAP_ST_MASK 0x07FF0000 /* ST Table Size */
#define PCI_TPH_CAP_ST_SHIFT 16 /* ST Table Size shift */
#define PCI_TPH_BASE_SIZEOF 0xc /* Size with no ST table */
#define PCI_TPH_CTRL 8 /* control register */
#define PCI_TPH_CTRL_MODE_SEL_MASK 0x00000007 /* ST Mode Select */
#define PCI_TPH_ST_NS_MODE 0x0 /* No ST Mode */
#define PCI_TPH_ST_IV_MODE 0x1 /* Interrupt Vector Mode */
#define PCI_TPH_ST_DS_MODE 0x2 /* Device Specific Mode */
#define PCI_TPH_CTRL_REQ_EN_MASK 0x00000300 /* TPH Requester Enable */
#define PCI_TPH_REQ_DISABLE 0x0 /* No TPH requests allowed */
#define PCI_TPH_REQ_TPH_ONLY 0x1 /* TPH only requests allowed */
#define PCI_TPH_REQ_EXT_TPH 0x3 /* Extended TPH requests allowed */
/* Downstream Port Containment */
#define PCI_EXP_DPC_CAP 0x04 /* DPC Capability */
include/standard-headers/linux/virtio_crypto.h
+1
View File
@@ -329,6 +329,7 @@ struct virtio_crypto_op_header {
VIRTIO_CRYPTO_OPCODE(VIRTIO_CRYPTO_SERVICE_AKCIPHER, 0x00)
#define VIRTIO_CRYPTO_AKCIPHER_DECRYPT \
VIRTIO_CRYPTO_OPCODE(VIRTIO_CRYPTO_SERVICE_AKCIPHER, 0x01)
/* akcipher sign/verify opcodes are deprecated */
#define VIRTIO_CRYPTO_AKCIPHER_SIGN \
VIRTIO_CRYPTO_OPCODE(VIRTIO_CRYPTO_SERVICE_AKCIPHER, 0x02)
#define VIRTIO_CRYPTO_AKCIPHER_VERIFY \
include/standard-headers/linux/virtio_pci.h
+131
View File
@@ -40,6 +40,7 @@
#define _LINUX_VIRTIO_PCI_H
#include "standard-headers/linux/types.h"
#include "standard-headers/linux/kernel.h"
#ifndef VIRTIO_PCI_NO_LEGACY
@@ -240,6 +241,17 @@ struct virtio_pci_cfg_cap {
#define VIRTIO_ADMIN_CMD_LEGACY_DEV_CFG_READ 0x5
#define VIRTIO_ADMIN_CMD_LEGACY_NOTIFY_INFO 0x6
/* Device parts access commands. */
#define VIRTIO_ADMIN_CMD_CAP_ID_LIST_QUERY 0x7
#define VIRTIO_ADMIN_CMD_DEVICE_CAP_GET 0x8
#define VIRTIO_ADMIN_CMD_DRIVER_CAP_SET 0x9
#define VIRTIO_ADMIN_CMD_RESOURCE_OBJ_CREATE 0xa
#define VIRTIO_ADMIN_CMD_RESOURCE_OBJ_DESTROY 0xd
#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_GET 0xe
#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET 0xf
#define VIRTIO_ADMIN_CMD_DEV_PARTS_SET 0x10
#define VIRTIO_ADMIN_CMD_DEV_MODE_SET 0x11
struct virtio_admin_cmd_hdr {
uint16_t opcode;
/*
@@ -286,4 +298,123 @@ struct virtio_admin_cmd_notify_info_result {
struct virtio_admin_cmd_notify_info_data entries[VIRTIO_ADMIN_CMD_MAX_NOTIFY_INFO];
};
#define VIRTIO_DEV_PARTS_CAP 0x0000
struct virtio_dev_parts_cap {
uint8_t get_parts_resource_objects_limit;
uint8_t set_parts_resource_objects_limit;
};
#define MAX_CAP_ID __KERNEL_DIV_ROUND_UP(VIRTIO_DEV_PARTS_CAP + 1, 64)
struct virtio_admin_cmd_query_cap_id_result {
uint64_t supported_caps[MAX_CAP_ID];
};
struct virtio_admin_cmd_cap_get_data {
uint16_t id;
uint8_t reserved[6];
};
struct virtio_admin_cmd_cap_set_data {
uint16_t id;
uint8_t reserved[6];
uint8_t cap_specific_data[];
};
struct virtio_admin_cmd_resource_obj_cmd_hdr {
uint16_t type;
uint8_t reserved[2];
uint32_t id; /* Indicates unique resource object id per resource object type */
};
struct virtio_admin_cmd_resource_obj_create_data {
struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
uint64_t flags;
uint8_t resource_obj_specific_data[];
};
#define VIRTIO_RESOURCE_OBJ_DEV_PARTS 0
#define VIRTIO_RESOURCE_OBJ_DEV_PARTS_TYPE_GET 0
#define VIRTIO_RESOURCE_OBJ_DEV_PARTS_TYPE_SET 1
struct virtio_resource_obj_dev_parts {
uint8_t type;
uint8_t reserved[7];
};
#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_SIZE 0
#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_COUNT 1
#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_LIST 2
struct virtio_admin_cmd_dev_parts_metadata_data {
struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
uint8_t type;
uint8_t reserved[7];
};
#define VIRTIO_DEV_PART_F_OPTIONAL 0
struct virtio_dev_part_hdr {
uint16_t part_type;
uint8_t flags;
uint8_t reserved;
union {
struct {
uint32_t offset;
uint32_t reserved;
} pci_common_cfg;
struct {
uint16_t index;
uint8_t reserved[6];
} vq_index;
} selector;
uint32_t length;
};
struct virtio_dev_part {
struct virtio_dev_part_hdr hdr;
uint8_t value[];
};
struct virtio_admin_cmd_dev_parts_metadata_result {
union {
struct {
uint32_t size;
uint32_t reserved;
} parts_size;
struct {
uint32_t count;
uint32_t reserved;
} hdr_list_count;
struct {
uint32_t count;
uint32_t reserved;
struct virtio_dev_part_hdr hdrs[];
} hdr_list;
};
};
#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET_TYPE_SELECTED 0
#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET_TYPE_ALL 1
struct virtio_admin_cmd_dev_parts_get_data {
struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
uint8_t type;
uint8_t reserved[7];
struct virtio_dev_part_hdr hdr_list[];
};
struct virtio_admin_cmd_dev_parts_set_data {
struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
struct virtio_dev_part parts[];
};
#define VIRTIO_ADMIN_CMD_DEV_MODE_F_STOPPED 0
struct virtio_admin_cmd_dev_mode_set_data {
uint8_t flags;
};
#endif
linux-headers/asm-arm64/kvm.h
+6
View File
@@ -473,6 +473,12 @@ enum {
*/
#define KVM_SYSTEM_EVENT_RESET_FLAG_PSCI_RESET2 (1ULL << 0)
/*
* Shutdown caused by a PSCI v1.3 SYSTEM_OFF2 call.
* Valid only when the system event has a type of KVM_SYSTEM_EVENT_SHUTDOWN.
*/
#define KVM_SYSTEM_EVENT_SHUTDOWN_FLAG_PSCI_OFF2 (1ULL << 0)
/* run->fail_entry.hardware_entry_failure_reason codes. */
#define KVM_EXIT_FAIL_ENTRY_CPU_UNSUPPORTED (1ULL << 0)
linux-headers/asm-arm64/unistd_64.h
+4
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@@ -319,6 +319,10 @@
#define __NR_lsm_set_self_attr 460
#define __NR_lsm_list_modules 461
#define __NR_mseal 462
#define __NR_setxattrat 463
#define __NR_getxattrat 464
#define __NR_listxattrat 465
#define __NR_removexattrat 466
#endif /* _ASM_UNISTD_64_H */
linux-headers/asm-generic/mman-common.h
+3
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@@ -79,6 +79,9 @@
#define MADV_COLLAPSE 25 /* Synchronous hugepage collapse */
#define MADV_GUARD_INSTALL 102 /* fatal signal on access to range */
#define MADV_GUARD_REMOVE 103 /* unguard range */
/* compatibility flags */
#define MAP_FILE 0
linux-headers/asm-generic/mman.h
+4
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@@ -19,4 +19,8 @@
#define MCL_FUTURE 2 /* lock all future mappings */
#define MCL_ONFAULT 4 /* lock all pages that are faulted in */
#define SHADOW_STACK_SET_TOKEN (1ULL << 0) /* Set up a restore token in the shadow stack */
#define SHADOW_STACK_SET_MARKER (1ULL << 1) /* Set up a top of stack marker in the shadow stack */
#endif /* __ASM_GENERIC_MMAN_H */
linux-headers/asm-generic/unistd.h
+10 -1
View File
@@ -841,8 +841,17 @@ __SYSCALL(__NR_lsm_list_modules, sys_lsm_list_modules)
#define __NR_mseal 462
__SYSCALL(__NR_mseal, sys_mseal)
#define __NR_setxattrat 463
__SYSCALL(__NR_setxattrat, sys_setxattrat)
#define __NR_getxattrat 464
__SYSCALL(__NR_getxattrat, sys_getxattrat)
#define __NR_listxattrat 465
__SYSCALL(__NR_listxattrat, sys_listxattrat)
#define __NR_removexattrat 466
__SYSCALL(__NR_removexattrat, sys_removexattrat)
#undef __NR_syscalls
#define __NR_syscalls 463
#define __NR_syscalls 467
/*
* 32 bit systems traditionally used different
linux-headers/asm-loongarch/kvm.h
+20
View File
@@ -8,6 +8,8 @@
#include <linux/types.h>
#define __KVM_HAVE_IRQ_LINE
/*
* KVM LoongArch specific structures and definitions.
*
@@ -132,4 +134,22 @@ struct kvm_iocsr_entry {
#define KVM_IRQCHIP_NUM_PINS 64
#define KVM_MAX_CORES 256
#define KVM_DEV_LOONGARCH_IPI_GRP_REGS 0x40000001
#define KVM_DEV_LOONGARCH_EXTIOI_GRP_REGS 0x40000002
#define KVM_DEV_LOONGARCH_EXTIOI_GRP_SW_STATUS 0x40000003
#define KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_NUM_CPU 0x0
#define KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_FEATURE 0x1
#define KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_STATE 0x2
#define KVM_DEV_LOONGARCH_EXTIOI_GRP_CTRL 0x40000004
#define KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_NUM_CPU 0x0
#define KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_FEATURE 0x1
#define KVM_DEV_LOONGARCH_EXTIOI_CTRL_LOAD_FINISHED 0x3
#define KVM_DEV_LOONGARCH_PCH_PIC_GRP_REGS 0x40000005
#define KVM_DEV_LOONGARCH_PCH_PIC_GRP_CTRL 0x40000006
#define KVM_DEV_LOONGARCH_PCH_PIC_CTRL_INIT 0
#endif /* __UAPI_ASM_LOONGARCH_KVM_H */
linux-headers/asm-loongarch/unistd_64.h
+4
View File
@@ -315,6 +315,10 @@
#define __NR_lsm_set_self_attr 460
#define __NR_lsm_list_modules 461
#define __NR_mseal 462
#define __NR_setxattrat 463
#define __NR_getxattrat 464
#define __NR_listxattrat 465
#define __NR_removexattrat 466
#endif /* _ASM_UNISTD_64_H */
linux-headers/asm-mips/mman.h
+3
View File
@@ -105,6 +105,9 @@
#define MADV_COLLAPSE 25 /* Synchronous hugepage collapse */
#define MADV_GUARD_INSTALL 102 /* fatal signal on access to range */
#define MADV_GUARD_REMOVE 103 /* unguard range */
/* compatibility flags */
#define MAP_FILE 0
linux-headers/asm-mips/unistd_n32.h
+4
View File
@@ -391,5 +391,9 @@
#define __NR_lsm_set_self_attr (__NR_Linux + 460)
#define __NR_lsm_list_modules (__NR_Linux + 461)
#define __NR_mseal (__NR_Linux + 462)
#define __NR_setxattrat (__NR_Linux + 463)
#define __NR_getxattrat (__NR_Linux + 464)
#define __NR_listxattrat (__NR_Linux + 465)
#define __NR_removexattrat (__NR_Linux + 466)
#endif /* _ASM_UNISTD_N32_H */
linux-headers/asm-mips/unistd_n64.h
+4
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@@ -367,5 +367,9 @@
#define __NR_lsm_set_self_attr (__NR_Linux + 460)
#define __NR_lsm_list_modules (__NR_Linux + 461)
#define __NR_mseal (__NR_Linux + 462)
#define __NR_setxattrat (__NR_Linux + 463)
#define __NR_getxattrat (__NR_Linux + 464)
#define __NR_listxattrat (__NR_Linux + 465)
#define __NR_removexattrat (__NR_Linux + 466)
#endif /* _ASM_UNISTD_N64_H */
linux-headers/asm-mips/unistd_o32.h
+4
View File
@@ -437,5 +437,9 @@
#define __NR_lsm_set_self_attr (__NR_Linux + 460)
#define __NR_lsm_list_modules (__NR_Linux + 461)
#define __NR_mseal (__NR_Linux + 462)
#define __NR_setxattrat (__NR_Linux + 463)
#define __NR_getxattrat (__NR_Linux + 464)
#define __NR_listxattrat (__NR_Linux + 465)
#define __NR_removexattrat (__NR_Linux + 466)
#endif /* _ASM_UNISTD_O32_H */
linux-headers/asm-powerpc/unistd_32.h
+4
View File
@@ -444,6 +444,10 @@
#define __NR_lsm_set_self_attr 460
#define __NR_lsm_list_modules 461
#define __NR_mseal 462
#define __NR_setxattrat 463
#define __NR_getxattrat 464
#define __NR_listxattrat 465
#define __NR_removexattrat 466
#endif /* _ASM_UNISTD_32_H */
linux-headers/asm-powerpc/unistd_64.h
+4
View File
@@ -416,6 +416,10 @@
#define __NR_lsm_set_self_attr 460
#define __NR_lsm_list_modules 461
#define __NR_mseal 462
#define __NR_setxattrat 463
#define __NR_getxattrat 464
#define __NR_listxattrat 465
#define __NR_removexattrat 466
#endif /* _ASM_UNISTD_64_H */
linux-headers/asm-riscv/kvm.h
+4
View File
@@ -175,6 +175,10 @@ enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_ZCF,
KVM_RISCV_ISA_EXT_ZCMOP,
KVM_RISCV_ISA_EXT_ZAWRS,
KVM_RISCV_ISA_EXT_SMNPM,
KVM_RISCV_ISA_EXT_SSNPM,
KVM_RISCV_ISA_EXT_SVADE,
KVM_RISCV_ISA_EXT_SVADU,
KVM_RISCV_ISA_EXT_MAX,
};
linux-headers/asm-riscv/unistd_32.h
+4
View File
@@ -310,6 +310,10 @@
#define __NR_lsm_set_self_attr 460
#define __NR_lsm_list_modules 461
#define __NR_mseal 462
#define __NR_setxattrat 463
#define __NR_getxattrat 464
#define __NR_listxattrat 465
#define __NR_removexattrat 466
#endif /* _ASM_UNISTD_32_H */

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