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Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

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* cleanups for distributed DTB files
* scripts/meson-buildoptions: Sort coroutine_backend choices lexicographically
* rust/qemu-api: Add initial logging support
: rust: pl011: Implement logging
* target/i386: fix Win98
* meson: cleanup win32 library detection
* rust: safe(r) instance_init
* rust: prepare for multiple bindgen invocations
* rust: fix new warning
* target/i386: Warn about why CPUID_EXT_PDCM is not available
* target/i386: small TDX fixes and clarifications
* target/i386: support for TDX quote generation

# -----BEGIN PGP SIGNATURE-----
#
# iQFIBAABCgAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmhVRWsUHHBib256aW5p
# QHJlZGhhdC5jb20ACgkQv/vSX3jHroOyDQf/YqX2jTZbC4jXdHZT6YiDlYPX9MPx
# emFX0S+30X5zNuGYUQufKHEJWshMtklB1seUTQathOPaNeCFK13lY4m1CRbhbrMs
# 3iG4ZQf5V+YTuB+JuE8KfclJeAPXDTnIc2uJbtXErIsPBeEGYZelFLnO5HLiMsY3
# iX9S2hSkjvjlikFv/m9ebg9SMP3+/ZunQMZxsDwgb7U3uqtuZagCJTWz0xTHHHxV
# Ko5OPA0kIydm0NnlHs2DsF1mivmYSSIfBnxg4KXgmJxd3gNGd9SemBQOwYU68x0T
# R3GzI6NLgdP/3mKOsxpM6hFiXBp84eT6zghpdqK5zQFidgz935EXP5WjvQ==
# =ttQr
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 20 Jun 2025 07:26:35 EDT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (24 commits)
  i386/tdx: handle TDG.VP.VMCALL<GetQuote>
  i386/tdx: handle TDG.VP.VMCALL<GetTdVmCallInfo>
  update Linux headers to v6.16-rc3
  i386/tdx: Clarify the error message of mrconfigid/mrowner/mrownerconfig
  i386/tdx: Fix the typo of the comment of struct TdxGuest
  i386/cpu: Rename enable_cpuid_0x1f to force_cpuid_0x1f
  i386/tdx: Error and exit when named cpu model is requested
  i386/cpu: Warn about why CPUID_EXT_PDCM is not available
  i386/cpu: Move adjustment of CPUID_EXT_PDCM before feature_dependencies[] check
  rust: hpet: fix new warning
  rust: pl011: Add missing logging to match C version
  rust: pl011: Implement logging
  rust/qemu-api: Add initial logging support based on C API
  rust: move rust.bindgen to qemu-api crate
  rust: prepare variable definitions for multiple bindgen invocations
  rust: qom: change instance_init to take a ParentInit<>
  rust: qom: make ParentInit lifetime-invariant
  rust: qom: introduce ParentInit
  rust: hpet: fully initialize object during instance_init
  rust: qemu_api: introduce MaybeUninit field projection
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Hajnoczi
2025-06-21 10:00:46 -04:00
parent 6e1571533f 40da501d89
commit 43ba160cb4
42 changed files with 1334 additions and 227 deletions
Download Patch File Download Diff File Expand all files Collapse all files
docs/devel/rust.rst
+1
View File
@@ -162,6 +162,7 @@ module status
``errno`` complete
``error`` stable
``irq`` complete
``log`` proof of concept
``memory`` stable
``module`` complete
``qdev`` stable
hw/arm/boot.c
+1 -1
View File
@@ -527,7 +527,7 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
if (binfo->dtb_filename) {
char *filename;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, binfo->dtb_filename);
filename = qemu_find_file(QEMU_FILE_TYPE_DTB, binfo->dtb_filename);
if (!filename) {
fprintf(stderr, "Couldn't open dtb file %s\n", binfo->dtb_filename);
goto fail;
hw/ppc/e500.c
+1 -1
View File
@@ -408,7 +408,7 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms,
if (dtb_file) {
char *filename;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, dtb_file);
filename = qemu_find_file(QEMU_FILE_TYPE_DTB, dtb_file);
if (!filename) {
goto out;
}
include/standard-headers/asm-x86/setup_data.h
+12 -1
View File
@@ -13,7 +13,8 @@
#define SETUP_CC_BLOB 7
#define SETUP_IMA 8
#define SETUP_RNG_SEED 9
#define SETUP_ENUM_MAX SETUP_RNG_SEED
#define SETUP_KEXEC_KHO 10
#define SETUP_ENUM_MAX SETUP_KEXEC_KHO
#define SETUP_INDIRECT (1<<31)
#define SETUP_TYPE_MAX (SETUP_ENUM_MAX | SETUP_INDIRECT)
@@ -78,6 +79,16 @@ struct ima_setup_data {
uint64_t size;
} QEMU_PACKED;
/*
* Locations of kexec handover metadata
*/
struct kho_data {
uint64_t fdt_addr;
uint64_t fdt_size;
uint64_t scratch_addr;
uint64_t scratch_size;
} QEMU_PACKED;
#endif /* __ASSEMBLER__ */
#endif /* _ASM_X86_SETUP_DATA_H */
include/standard-headers/drm/drm_fourcc.h
+45
View File
@@ -421,6 +421,7 @@ extern "C" {
#define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09
#define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a
#define DRM_FORMAT_MOD_VENDOR_MTK 0x0b
#define DRM_FORMAT_MOD_VENDOR_APPLE 0x0c
/* add more to the end as needed */
@@ -1493,6 +1494,50 @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier)
/* alias for the most common tiling format */
#define DRM_FORMAT_MOD_MTK_16L_32S_TILE DRM_FORMAT_MOD_MTK(MTK_FMT_MOD_TILE_16L32S)
/*
* Apple GPU-tiled layouts.
*
* Apple GPUs support nonlinear tilings with optional lossless compression.
*
* GPU-tiled images are divided into 16KiB tiles:
*
* Bytes per pixel Tile size
* --------------- ---------
* 1 128x128
* 2 128x64
* 4 64x64
* 8 64x32
* 16 32x32
*
* Tiles are raster-order. Pixels within a tile are interleaved (Morton order).
*
* Compressed images pad the body to 128-bytes and are immediately followed by a
* metadata section. The metadata section rounds the image dimensions to
* powers-of-two and contains 8 bytes for each 16x16 compression subtile.
* Subtiles are interleaved (Morton order).
*
* All images are 128-byte aligned.
*
* These layouts fundamentally do not have meaningful strides. No matter how we
* specify strides for these layouts, userspace unaware of Apple image layouts
* will be unable to use correctly the specified stride for any purpose.
* Userspace aware of the image layouts do not use strides. The most "correct"
* convention would be setting the image stride to 0. Unfortunately, some
* software assumes the stride is at least (width * bytes per pixel). We
* therefore require that stride equals (width * bytes per pixel). Since the
* stride is arbitrary here, we pick the simplest convention.
*
* Although containing two sections, compressed image layouts are treated in
* software as a single plane. This is modelled after AFBC, a similar
* scheme. Attempting to separate the sections to be "explicit" in DRM would
* only generate more confusion, as software does not treat the image this way.
*
* For detailed information on the hardware image layouts, see
* https://docs.mesa3d.org/drivers/asahi.html#image-layouts
*/
#define DRM_FORMAT_MOD_APPLE_GPU_TILED fourcc_mod_code(APPLE, 1)
#define DRM_FORMAT_MOD_APPLE_GPU_TILED_COMPRESSED fourcc_mod_code(APPLE, 2)
/*
* AMD modifiers
*
include/standard-headers/linux/ethtool.h
+64 -60
View File
@@ -2295,71 +2295,75 @@ static inline int ethtool_validate_duplex(uint8_t duplex)
#define RXH_XFRM_SYM_OR_XOR (1 << 1)
#define RXH_XFRM_NO_CHANGE 0xff
/* L2-L4 network traffic flow types */
#define TCP_V4_FLOW 0x01 /* hash or spec (tcp_ip4_spec) */
#define UDP_V4_FLOW 0x02 /* hash or spec (udp_ip4_spec) */
#define SCTP_V4_FLOW 0x03 /* hash or spec (sctp_ip4_spec) */
#define AH_ESP_V4_FLOW 0x04 /* hash only */
#define TCP_V6_FLOW 0x05 /* hash or spec (tcp_ip6_spec; nfc only) */
#define UDP_V6_FLOW 0x06 /* hash or spec (udp_ip6_spec; nfc only) */
#define SCTP_V6_FLOW 0x07 /* hash or spec (sctp_ip6_spec; nfc only) */
#define AH_ESP_V6_FLOW 0x08 /* hash only */
#define AH_V4_FLOW 0x09 /* hash or spec (ah_ip4_spec) */
#define ESP_V4_FLOW 0x0a /* hash or spec (esp_ip4_spec) */
#define AH_V6_FLOW 0x0b /* hash or spec (ah_ip6_spec; nfc only) */
#define ESP_V6_FLOW 0x0c /* hash or spec (esp_ip6_spec; nfc only) */
#define IPV4_USER_FLOW 0x0d /* spec only (usr_ip4_spec) */
#define IP_USER_FLOW IPV4_USER_FLOW
#define IPV6_USER_FLOW 0x0e /* spec only (usr_ip6_spec; nfc only) */
#define IPV4_FLOW 0x10 /* hash only */
#define IPV6_FLOW 0x11 /* hash only */
#define ETHER_FLOW 0x12 /* spec only (ether_spec) */
enum {
/* L2-L4 network traffic flow types */
TCP_V4_FLOW = 0x01, /* hash or spec (tcp_ip4_spec) */
UDP_V4_FLOW = 0x02, /* hash or spec (udp_ip4_spec) */
SCTP_V4_FLOW = 0x03, /* hash or spec (sctp_ip4_spec) */
AH_ESP_V4_FLOW = 0x04, /* hash only */
TCP_V6_FLOW = 0x05, /* hash or spec (tcp_ip6_spec; nfc only) */
UDP_V6_FLOW = 0x06, /* hash or spec (udp_ip6_spec; nfc only) */
SCTP_V6_FLOW = 0x07, /* hash or spec (sctp_ip6_spec; nfc only) */
AH_ESP_V6_FLOW = 0x08, /* hash only */
AH_V4_FLOW = 0x09, /* hash or spec (ah_ip4_spec) */
ESP_V4_FLOW = 0x0a, /* hash or spec (esp_ip4_spec) */
AH_V6_FLOW = 0x0b, /* hash or spec (ah_ip6_spec; nfc only) */
ESP_V6_FLOW = 0x0c, /* hash or spec (esp_ip6_spec; nfc only) */
IPV4_USER_FLOW = 0x0d, /* spec only (usr_ip4_spec) */
IP_USER_FLOW = IPV4_USER_FLOW,
IPV6_USER_FLOW = 0x0e, /* spec only (usr_ip6_spec; nfc only) */
IPV4_FLOW = 0x10, /* hash only */
IPV6_FLOW = 0x11, /* hash only */
ETHER_FLOW = 0x12, /* spec only (ether_spec) */
/* Used for GTP-U IPv4 and IPv6.
* The format of GTP packets only includes
* elements such as TEID and GTP version.
* It is primarily intended for data communication of the UE.
*/
#define GTPU_V4_FLOW 0x13 /* hash only */
#define GTPU_V6_FLOW 0x14 /* hash only */
/* Used for GTP-U IPv4 and IPv6.
* The format of GTP packets only includes
* elements such as TEID and GTP version.
* It is primarily intended for data communication of the UE.
*/
GTPU_V4_FLOW = 0x13, /* hash only */
GTPU_V6_FLOW = 0x14, /* hash only */
/* Use for GTP-C IPv4 and v6.
* The format of these GTP packets does not include TEID.
* Primarily expected to be used for communication
* to create sessions for UE data communication,
* commonly referred to as CSR (Create Session Request).
*/
#define GTPC_V4_FLOW 0x15 /* hash only */
#define GTPC_V6_FLOW 0x16 /* hash only */
/* Use for GTP-C IPv4 and v6.
* The format of these GTP packets does not include TEID.
* Primarily expected to be used for communication
* to create sessions for UE data communication,
* commonly referred to as CSR (Create Session Request).
*/
GTPC_V4_FLOW = 0x15, /* hash only */
GTPC_V6_FLOW = 0x16, /* hash only */
/* Use for GTP-C IPv4 and v6.
* Unlike GTPC_V4_FLOW, the format of these GTP packets includes TEID.
* After session creation, it becomes this packet.
* This is mainly used for requests to realize UE handover.
*/
#define GTPC_TEID_V4_FLOW 0x17 /* hash only */
#define GTPC_TEID_V6_FLOW 0x18 /* hash only */
/* Use for GTP-C IPv4 and v6.
* Unlike GTPC_V4_FLOW, the format of these GTP packets includes TEID.
* After session creation, it becomes this packet.
* This is mainly used for requests to realize UE handover.
*/
GTPC_TEID_V4_FLOW = 0x17, /* hash only */
GTPC_TEID_V6_FLOW = 0x18, /* hash only */
/* Use for GTP-U and extended headers for the PSC (PDU Session Container).
* The format of these GTP packets includes TEID and QFI.
* In 5G communication using UPF (User Plane Function),
* data communication with this extended header is performed.
*/
#define GTPU_EH_V4_FLOW 0x19 /* hash only */
#define GTPU_EH_V6_FLOW 0x1a /* hash only */
/* Use for GTP-U and extended headers for the PSC (PDU Session Container).
* The format of these GTP packets includes TEID and QFI.
* In 5G communication using UPF (User Plane Function),
* data communication with this extended header is performed.
*/
GTPU_EH_V4_FLOW = 0x19, /* hash only */
GTPU_EH_V6_FLOW = 0x1a, /* hash only */
/* Use for GTP-U IPv4 and v6 PSC (PDU Session Container) extended headers.
* This differs from GTPU_EH_V(4|6)_FLOW in that it is distinguished by
* UL/DL included in the PSC.
* There are differences in the data included based on Downlink/Uplink,
* and can be used to distinguish packets.
* The functions described so far are useful when you want to
* handle communication from the mobile network in UPF, PGW, etc.
*/
#define GTPU_UL_V4_FLOW 0x1b /* hash only */
#define GTPU_UL_V6_FLOW 0x1c /* hash only */
#define GTPU_DL_V4_FLOW 0x1d /* hash only */
#define GTPU_DL_V6_FLOW 0x1e /* hash only */
/* Use for GTP-U IPv4 and v6 PSC (PDU Session Container) extended headers.
* This differs from GTPU_EH_V(4|6)_FLOW in that it is distinguished by
* UL/DL included in the PSC.
* There are differences in the data included based on Downlink/Uplink,
* and can be used to distinguish packets.
* The functions described so far are useful when you want to
* handle communication from the mobile network in UPF, PGW, etc.
*/
GTPU_UL_V4_FLOW = 0x1b, /* hash only */
GTPU_UL_V6_FLOW = 0x1c, /* hash only */
GTPU_DL_V4_FLOW = 0x1d, /* hash only */
GTPU_DL_V6_FLOW = 0x1e, /* hash only */
__FLOW_TYPE_COUNT,
};
/* Flag to enable additional fields in struct ethtool_rx_flow_spec */
#define FLOW_EXT 0x80000000
include/standard-headers/linux/fuse.h
+5 -1
View File
@@ -232,6 +232,9 @@
*
* 7.43
* - add FUSE_REQUEST_TIMEOUT
*
* 7.44
* - add FUSE_NOTIFY_INC_EPOCH
*/
#ifndef _LINUX_FUSE_H
@@ -263,7 +266,7 @@
#define FUSE_KERNEL_VERSION 7
/** Minor version number of this interface */
#define FUSE_KERNEL_MINOR_VERSION 43
#define FUSE_KERNEL_MINOR_VERSION 44
/** The node ID of the root inode */
#define FUSE_ROOT_ID 1
@@ -667,6 +670,7 @@ enum fuse_notify_code {
FUSE_NOTIFY_RETRIEVE = 5,
FUSE_NOTIFY_DELETE = 6,
FUSE_NOTIFY_RESEND = 7,
FUSE_NOTIFY_INC_EPOCH = 8,
FUSE_NOTIFY_CODE_MAX,
};
include/standard-headers/linux/input-event-codes.h
+2 -1
View File
@@ -925,7 +925,8 @@
#define SW_MUTE_DEVICE 0x0e /* set = device disabled */
#define SW_PEN_INSERTED 0x0f /* set = pen inserted */
#define SW_MACHINE_COVER 0x10 /* set = cover closed */
#define SW_MAX_ 0x10
#define SW_USB_INSERT 0x11 /* set = USB audio device connected */
#define SW_MAX_ 0x11
#define SW_CNT (SW_MAX_+1)
/*
include/standard-headers/linux/pci_regs.h
+11 -1
View File
@@ -750,7 +750,8 @@
#define PCI_EXT_CAP_ID_NPEM 0x29 /* Native PCIe Enclosure Management */
#define PCI_EXT_CAP_ID_PL_32GT 0x2A /* Physical Layer 32.0 GT/s */
#define PCI_EXT_CAP_ID_DOE 0x2E /* Data Object Exchange */
#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_DOE
#define PCI_EXT_CAP_ID_PL_64GT 0x31 /* Physical Layer 64.0 GT/s */
#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PL_64GT
#define PCI_EXT_CAP_DSN_SIZEOF 12
#define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40
@@ -1144,12 +1145,21 @@
#define PCI_DLF_CAP 0x04 /* Capabilities Register */
#define PCI_DLF_EXCHANGE_ENABLE 0x80000000 /* Data Link Feature Exchange Enable */
/* Secondary PCIe Capability 8.0 GT/s */
#define PCI_SECPCI_LE_CTRL 0x0c /* Lane Equalization Control Register */
/* Physical Layer 16.0 GT/s */
#define PCI_PL_16GT_LE_CTRL 0x20 /* Lane Equalization Control Register */
#define PCI_PL_16GT_LE_CTRL_DSP_TX_PRESET_MASK 0x0000000F
#define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK 0x000000F0
#define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_SHIFT 4
/* Physical Layer 32.0 GT/s */
#define PCI_PL_32GT_LE_CTRL 0x20 /* Lane Equalization Control Register */
/* Physical Layer 64.0 GT/s */
#define PCI_PL_64GT_LE_CTRL 0x20 /* Lane Equalization Control Register */
/* Native PCIe Enclosure Management */
#define PCI_NPEM_CAP 0x04 /* NPEM capability register */
#define PCI_NPEM_CAP_CAPABLE 0x00000001 /* NPEM Capable */
include/standard-headers/linux/virtio_gpu.h
+2 -1
View File
@@ -309,8 +309,9 @@ struct virtio_gpu_cmd_submit {
#define VIRTIO_GPU_CAPSET_VIRGL 1
#define VIRTIO_GPU_CAPSET_VIRGL2 2
/* 3 is reserved for gfxstream */
#define VIRTIO_GPU_CAPSET_GFXSTREAM_VULKAN 3
#define VIRTIO_GPU_CAPSET_VENUS 4
#define VIRTIO_GPU_CAPSET_CROSS_DOMAIN 5
#define VIRTIO_GPU_CAPSET_DRM 6
/* VIRTIO_GPU_CMD_GET_CAPSET_INFO */
include/standard-headers/linux/virtio_pci.h
+1
View File
@@ -246,6 +246,7 @@ struct virtio_pci_cfg_cap {
#define VIRTIO_ADMIN_CMD_LIST_USE 0x1
/* Admin command group type. */
#define VIRTIO_ADMIN_GROUP_TYPE_SELF 0x0
#define VIRTIO_ADMIN_GROUP_TYPE_SRIOV 0x1
/* Transitional device admin command. */
linux-headers/asm-arm64/kvm.h
+5 -4
View File
@@ -419,10 +419,11 @@ enum {
/* Device Control API on vcpu fd */
#define KVM_ARM_VCPU_PMU_V3_CTRL 0
#define KVM_ARM_VCPU_PMU_V3_IRQ 0
#define KVM_ARM_VCPU_PMU_V3_INIT 1
#define KVM_ARM_VCPU_PMU_V3_FILTER 2
#define KVM_ARM_VCPU_PMU_V3_SET_PMU 3
#define KVM_ARM_VCPU_PMU_V3_IRQ 0
#define KVM_ARM_VCPU_PMU_V3_INIT 1
#define KVM_ARM_VCPU_PMU_V3_FILTER 2
#define KVM_ARM_VCPU_PMU_V3_SET_PMU 3
#define KVM_ARM_VCPU_PMU_V3_SET_NR_COUNTERS 4
#define KVM_ARM_VCPU_TIMER_CTRL 1
#define KVM_ARM_VCPU_TIMER_IRQ_VTIMER 0
#define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1
linux-headers/asm-x86/kvm.h
+1
View File
@@ -843,6 +843,7 @@ struct kvm_sev_snp_launch_start {
};
/* Kept in sync with firmware values for simplicity. */
#define KVM_SEV_PAGE_TYPE_INVALID 0x0
#define KVM_SEV_SNP_PAGE_TYPE_NORMAL 0x1
#define KVM_SEV_SNP_PAGE_TYPE_ZERO 0x3
#define KVM_SEV_SNP_PAGE_TYPE_UNMEASURED 0x4
linux-headers/linux/bits.h
+2 -2
View File
@@ -4,9 +4,9 @@
#ifndef _LINUX_BITS_H
#define _LINUX_BITS_H
#define __GENMASK(h, l) (((~_UL(0)) << (l)) & (~_UL(0) >> (BITS_PER_LONG - 1 - (h))))
#define __GENMASK(h, l) (((~_UL(0)) << (l)) & (~_UL(0) >> (__BITS_PER_LONG - 1 - (h))))
#define __GENMASK_ULL(h, l) (((~_ULL(0)) << (l)) & (~_ULL(0) >> (BITS_PER_LONG_LONG - 1 - (h))))
#define __GENMASK_ULL(h, l) (((~_ULL(0)) << (l)) & (~_ULL(0) >> (__BITS_PER_LONG_LONG - 1 - (h))))
#define __GENMASK_U128(h, l) \
((_BIT128((h)) << 1) - (_BIT128(l)))
linux-headers/linux/kvm.h
+25
View File
@@ -178,6 +178,7 @@ struct kvm_xen_exit {
#define KVM_EXIT_NOTIFY 37
#define KVM_EXIT_LOONGARCH_IOCSR 38
#define KVM_EXIT_MEMORY_FAULT 39
#define KVM_EXIT_TDX 40
/* For KVM_EXIT_INTERNAL_ERROR */
/* Emulate instruction failed. */
@@ -439,6 +440,27 @@ struct kvm_run {
__u64 gpa;
__u64 size;
} memory_fault;
/* KVM_EXIT_TDX */
struct {
__u64 flags;
__u64 nr;
union {
struct {
__u64 ret;
__u64 data[5];
} unknown;
struct {
__u64 ret;
__u64 gpa;
__u64 size;
} get_quote;
struct {
__u64 ret;
__u64 leaf;
__u64 r11, r12, r13, r14;
} get_tdvmcall_info;
};
} tdx;
/* Fix the size of the union. */
char padding[256];
};
@@ -923,6 +945,9 @@ struct kvm_enable_cap {
#define KVM_CAP_X86_APIC_BUS_CYCLES_NS 237
#define KVM_CAP_X86_GUEST_MODE 238
#define KVM_CAP_ARM_WRITABLE_IMP_ID_REGS 239
#define KVM_CAP_ARM_EL2 240
#define KVM_CAP_ARM_EL2_E2H0 241
#define KVM_CAP_RISCV_MP_STATE_RESET 242
struct kvm_irq_routing_irqchip {
__u32 irqchip;
linux-headers/linux/vhost.h
+2 -2
View File
@@ -28,10 +28,10 @@
/* Set current process as the (exclusive) owner of this file descriptor. This
* must be called before any other vhost command. Further calls to
* VHOST_OWNER_SET fail until VHOST_OWNER_RESET is called. */
* VHOST_SET_OWNER fail until VHOST_RESET_OWNER is called. */
#define VHOST_SET_OWNER _IO(VHOST_VIRTIO, 0x01)
/* Give up ownership, and reset the device to default values.
* Allows subsequent call to VHOST_OWNER_SET to succeed. */
* Allows subsequent call to VHOST_SET_OWNER to succeed. */
#define VHOST_RESET_OWNER _IO(VHOST_VIRTIO, 0x02)
/* Set up/modify memory layout */
meson.build
+12 -53
View File
@@ -843,15 +843,12 @@ host_dsosuf = '.so'
if host_os == 'windows'
midl = find_program('midl', required: false)
widl = find_program('widl', required: false)
pathcch = cc.find_library('pathcch')
synchronization = cc.find_library('Synchronization', required: false)
if not synchronization.found()
# The library name is lowercase on mingw
synchronization = cc.find_library('synchronization', required: true)
endif
socket = cc.find_library('ws2_32')
winmm = cc.find_library('winmm')
# MinGW uses lowercase for library names
pathcch = cc.find_library('pathcch', required: true)
synchronization = cc.find_library('synchronization', required: true)
socket = cc.find_library('ws2_32', required: true)
winmm = cc.find_library('winmm', required: true)
win = import('windows')
version_res = win.compile_resources('version.rc',
@@ -4203,10 +4200,11 @@ foreach target_base_arch, config_base_arch : config_base_arch_mak
endforeach
if have_rust
bindings_incdir = include_directories('.', 'include')
# We would like to use --generate-cstr, but it is only available
# starting with bindgen 0.66.0. The oldest supported versions
# is 0.60.x (Debian 12 has 0.60.1) which introduces --allowlist-file.
bindgen_args = [
bindgen_args_common = [
'--disable-header-comment',
'--raw-line', '// @generated',
'--ctypes-prefix', 'std::os::raw',
@@ -4222,59 +4220,20 @@ if have_rust
]
if not rustfmt.found()
if bindgen.version().version_compare('<0.65.0')
bindgen_args += ['--no-rustfmt-bindings']
bindgen_args_common += ['--no-rustfmt-bindings']
else
bindgen_args += ['--formatter', 'none']
bindgen_args_common += ['--formatter', 'none']
endif
endif
if bindgen.version().version_compare('>=0.66.0')
bindgen_args += ['--rust-target', '1.59']
bindgen_args_common += ['--rust-target', '1.59']
endif
if bindgen.version().version_compare('<0.61.0')
# default in 0.61+
bindgen_args += ['--size_t-is-usize']
bindgen_args_common += ['--size_t-is-usize']
else
bindgen_args += ['--merge-extern-blocks']
bindgen_args_common += ['--merge-extern-blocks']
endif
c_enums = [
'DeviceCategory',
'GpioPolarity',
'MachineInitPhase',
'MemoryDeviceInfoKind',
'MigrationPolicy',
'MigrationPriority',
'QEMUChrEvent',
'QEMUClockType',
'ResetType',
'device_endian',
'module_init_type',
]
foreach enum : c_enums
bindgen_args += ['--rustified-enum', enum]
endforeach
c_bitfields = [
'ClockEvent',
'VMStateFlags',
]
foreach enum : c_bitfields
bindgen_args += ['--bitfield-enum', enum]
endforeach
# TODO: Remove this comment when the clang/libclang mismatch issue is solved.
#
# Rust bindings generation with `bindgen` might fail in some cases where the
# detected `libclang` does not match the expected `clang` version/target. In
# this case you must pass the path to `clang` and `libclang` to your build
# command invocation using the environment variables CLANG_PATH and
# LIBCLANG_PATH
bindings_rs = rust.bindgen(
input: 'rust/wrapper.h',
dependencies: common_ss.all_dependencies(),
output: 'bindings.inc.rs',
include_directories: include_directories('.', 'include'),
bindgen_version: ['>=0.60.0'],
args: bindgen_args,
)
subdir('rust')
endif
pc-bios/dtb/meson.build
+1 -1
View File
@@ -9,7 +9,7 @@ dtc = find_program('dtc', required: false)
if dtc.found()
foreach out : dtbs
f = fs.replace_suffix(out, '.dts')
custom_target(f,
custom_target(out,
build_by_default: have_system,
input: files(f),
output: out,
qapi/qom.json
+7 -1
View File
@@ -1071,6 +1071,11 @@
# e.g., specific to the workload rather than the run-time or OS
# (base64 encoded SHA384 digest). Defaults to all zeros.
#
# @quote-generation-socket: socket address for Quote Generation
# Service (QGS). QGS is a daemon running on the host. Without
# it, the guest will not be able to get a TD quote for
# attestation.
#
# Since: 10.1
##
{ 'struct': 'TdxGuestProperties',
@@ -1078,7 +1083,8 @@
'*sept-ve-disable': 'bool',
'*mrconfigid': 'str',
'*mrowner': 'str',
'*mrownerconfig': 'str' } }
'*mrownerconfig': 'str',
'*quote-generation-socket': 'SocketAddress' } }
##
# @ThreadContextProperties:
rust/hw/char/pl011/src/device.rs
+29 -23
View File
@@ -2,18 +2,21 @@
// Author(s): Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
// SPDX-License-Identifier: GPL-2.0-or-later
use std::{ffi::CStr, mem::size_of, ptr::addr_of_mut};
use std::{ffi::CStr, mem::size_of};
use qemu_api::{
chardev::{CharBackend, Chardev, Event},
impl_vmstate_forward,
irq::{IRQState, InterruptSource},
log::Log,
log_mask_ln,
memory::{hwaddr, MemoryRegion, MemoryRegionOps, MemoryRegionOpsBuilder},
prelude::*,
qdev::{Clock, ClockEvent, DeviceImpl, DeviceState, Property, ResetType, ResettablePhasesImpl},
qom::{ObjectImpl, Owned, ParentField},
qom::{ObjectImpl, Owned, ParentField, ParentInit},
static_assert,
sysbus::{SysBusDevice, SysBusDeviceImpl},
uninit_field_mut,
vmstate::VMStateDescription,
};
@@ -163,7 +166,7 @@ impl PL011Impl for PL011State {
impl ObjectImpl for PL011State {
type ParentType = SysBusDevice;
const INSTANCE_INIT: Option<unsafe fn(&mut Self)> = Some(Self::init);
const INSTANCE_INIT: Option<unsafe fn(ParentInit<Self>)> = Some(Self::init);
const INSTANCE_POST_INIT: Option<fn(&Self)> = Some(Self::post_init);
const CLASS_INIT: fn(&mut Self::Class) = Self::Class::class_init::<Self>;
}
@@ -275,8 +278,7 @@ impl PL011Registers {
DMACR => {
self.dmacr = value;
if value & 3 > 0 {
// qemu_log_mask(LOG_UNIMP, "pl011: DMA not implemented\n");
eprintln!("pl011: DMA not implemented");
log_mask_ln!(Log::Unimp, "pl011: DMA not implemented");
}
}
}
@@ -303,6 +305,12 @@ impl PL011Registers {
}
fn write_data_register(&mut self, value: u32) -> bool {
if !self.control.enable_uart() {
log_mask_ln!(Log::GuestError, "PL011 data written to disabled UART");
}
if !self.control.enable_transmit() {
log_mask_ln!(Log::GuestError, "PL011 data written to disabled TX UART");
}
// interrupts always checked
let _ = self.loopback_tx(value.into());
self.int_level |= Interrupt::TX;
@@ -488,7 +496,7 @@ impl PL011State {
/// `PL011State` type. It must not be called more than once on the same
/// location/instance. All its fields are expected to hold uninitialized
/// values with the sole exception of `parent_obj`.
unsafe fn init(&mut self) {
unsafe fn init(mut this: ParentInit<Self>) {
static PL011_OPS: MemoryRegionOps<PL011State> = MemoryRegionOpsBuilder::<PL011State>::new()
.read(&PL011State::read)
.write(&PL011State::write)
@@ -496,28 +504,23 @@ impl PL011State {
.impl_sizes(4, 4)
.build();
// SAFETY:
//
// self and self.iomem are guaranteed to be valid at this point since callers
// must make sure the `self` reference is valid.
// SAFETY: this and this.iomem are guaranteed to be valid at this point
MemoryRegion::init_io(
unsafe { &mut *addr_of_mut!(self.iomem) },
addr_of_mut!(*self),
&mut uninit_field_mut!(*this, iomem),
&PL011_OPS,
"pl011",
0x1000,
);
self.regs = Default::default();
uninit_field_mut!(*this, regs).write(Default::default());
// SAFETY:
//
// self.clock is not initialized at this point; but since `Owned<_>` is
// not Drop, we can overwrite the undefined value without side effects;
// it's not sound but, because for all PL011State instances are created
// by QOM code which calls this function to initialize the fields, at
// leastno code is able to access an invalid self.clock value.
self.clock = self.init_clock_in("clk", &Self::clock_update, ClockEvent::ClockUpdate);
let clock = DeviceState::init_clock_in(
&mut this,
"clk",
&Self::clock_update,
ClockEvent::ClockUpdate,
);
uninit_field_mut!(*this, clock).write(clock);
}
const fn clock_update(&self, _event: ClockEvent) {
@@ -538,7 +541,7 @@ impl PL011State {
u64::from(device_id[(offset - 0xfe0) >> 2])
}
Err(_) => {
// qemu_log_mask(LOG_GUEST_ERROR, "pl011_read: Bad offset 0x%x\n", (int)offset);
log_mask_ln!(Log::GuestError, "PL011State::read: Bad offset {offset}");
0
}
Ok(field) => {
@@ -570,7 +573,10 @@ impl PL011State {
.borrow_mut()
.write(field, value as u32, &self.char_backend);
} else {
eprintln!("write bad offset {offset} value {value}");
log_mask_ln!(
Log::GuestError,
"PL011State::write: Bad offset {offset} value {value}"
);
}
if update_irq {
self.update();

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