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target/arm: Fix reads of CNTFRQ_EL0 in linux-user mode
In commitbd8e9ddf6f("target/arm: Refactor default generic timer frequency handling") we changed how we initialized the generic timer frequency as reported in the CNTFRQ_EL0 register. As part of that, we chanegd the linux-user version of the CNTFRQ_EL0 sysreg from having a constant value set at compile time through the .resetvalue field to having a reset value which we compute in a .resetfn. This accidentally broke the reading of CNTFRQ_EL0 in linux-user mode, because the cpreg is marked as ARM_CP_CONST, which means we translate it as a read of the compile-time constant value in the .resetvalue field. This is now zero, so userspace sees a 0 frequency value. Fix the bug by dropping the ARM_CP_CONST marking. This will cause us to translate the read as a load of the value from the CPU state struct cp15.c14_cntfrq field, which is where the real frequency value now lives. Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3159 Fixes:bd8e9ddf6f("target/arm: Refactor default generic timer frequency handling") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20251013161040.216819-1-peter.maydell@linaro.org
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@@ -2309,7 +2309,7 @@ static uint64_t gt_virt_cnt_read(CPUARMState *env, const ARMCPRegInfo *ri)
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static const ARMCPRegInfo generic_timer_cp_reginfo[] = {
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{ .name = "CNTFRQ_EL0", .state = ARM_CP_STATE_AA64,
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.opc0 = 3, .opc1 = 3, .crn = 14, .crm = 0, .opc2 = 0,
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.type = ARM_CP_CONST, .access = PL0_R /* no PL1_RW in linux-user */,
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.access = PL0_R /* no PL1_RW in linux-user */,
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.fieldoffset = offsetof(CPUARMState, cp15.c14_cntfrq),
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.resetfn = arm_gt_cntfrq_reset,
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},
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