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Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging

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Machine and x86 queue, 2019-07-05

* CPU die topology support (Like Xu)
* Deprecation of features (Igor Mammedov):
  * 'mem' parameter of '-numa node' option
  * implict memory distribution between NUMA nodes
  * deprecate -mem-path fallback to anonymous RAM
* x86 versioned CPU models (Eduardo Habkost)
* SnowRidge CPU model (Paul Lai)
* Add deprecation information to query-machines (Eduardo Habkost)
* Other i386 fixes

# gpg: Signature made Fri 05 Jul 2019 23:12:09 BST
# gpg:                using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6
# gpg:                issuer "ehabkost@redhat.com"
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full]
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/machine-next-pull-request: (42 commits)
  tests: use -numa memdev option in tests instead of legacy 'mem' option
  numa: allow memory-less nodes when using memdev as backend
  numa: Make deprecation warnings conditional on !qtest_enabled()
  i386: Add Cascadelake-Server-v2 CPU model
  docs: Deprecate CPU model runnability guarantees
  i386: Make unversioned CPU models be aliases
  i386: Replace -noTSX, -IBRS, -IBPB CPU models with aliases
  i386: Define -IBRS, -noTSX, -IBRS versions of CPU models
  i386: Register versioned CPU models
  i386: Get model-id from CPU object on "-cpu help"
  i386: Add x-force-features option for testing
  qmp: Add "alias-of" field to query-cpu-definitions
  i386: Introduce SnowRidge CPU model
  qmp: Add deprecation information to query-machines
  vl.c: Add -smp, dies=* command line support and update doc
  machine: Refactor smp_parse() in vl.c as MachineClass::smp_parse()
  target/i386: Add CPUID.1F generation support for multi-dies PCMachine
  i386: Remove unused host_cpudef variable
  x86/cpu: use FeatureWordArray to define filtered_features
  i386: make 'hv-spinlocks' a regular uint32 property
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
2019-07-08 09:46:19 +01:00
parent d2c5f91ca9 af135030e3
commit 3a1acf5d47
79 changed files with 1687 additions and 936 deletions
Download Patch File Download Diff File Expand all files Collapse all files
accel/kvm/kvm-all.c
+2 -2
View File
@@ -1542,8 +1542,8 @@ static int kvm_init(MachineState *ms)
const char *name;
int num;
} num_cpus[] = {
{ "SMP", smp_cpus },
{ "hotpluggable", max_cpus },
{ "SMP", ms->smp.cpus },
{ "hotpluggable", ms->smp.max_cpus },
{ NULL, }
}, *nc = num_cpus;
int soft_vcpus_limit, hard_vcpus_limit;
backends/hostmem.c
+4 -2
View File
@@ -222,6 +222,7 @@ static void host_memory_backend_set_prealloc(Object *obj, bool value,
{
Error *local_err = NULL;
HostMemoryBackend *backend = MEMORY_BACKEND(obj);
MachineState *ms = MACHINE(qdev_get_machine());
if (backend->force_prealloc) {
if (value) {
@@ -241,7 +242,7 @@ static void host_memory_backend_set_prealloc(Object *obj, bool value,
void *ptr = memory_region_get_ram_ptr(&backend->mr);
uint64_t sz = memory_region_size(&backend->mr);
os_mem_prealloc(fd, ptr, sz, smp_cpus, &local_err);
os_mem_prealloc(fd, ptr, sz, ms->smp.cpus, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
@@ -311,6 +312,7 @@ host_memory_backend_memory_complete(UserCreatable *uc, Error **errp)
{
HostMemoryBackend *backend = MEMORY_BACKEND(uc);
HostMemoryBackendClass *bc = MEMORY_BACKEND_GET_CLASS(uc);
MachineState *ms = MACHINE(qdev_get_machine());
Error *local_err = NULL;
void *ptr;
uint64_t sz;
@@ -375,7 +377,7 @@ host_memory_backend_memory_complete(UserCreatable *uc, Error **errp)
*/
if (backend->prealloc) {
os_mem_prealloc(memory_region_get_fd(&backend->mr), ptr, sz,
smp_cpus, &local_err);
ms->smp.cpus, &local_err);
if (local_err) {
goto out;
}
cpus.c
+5 -2
View File
@@ -54,6 +54,7 @@
#include "tcg.h"
#include "hw/nmi.h"
#include "sysemu/replay.h"
#include "hw/boards.h"
#ifdef CONFIG_LINUX
@@ -2075,8 +2076,10 @@ static void qemu_dummy_start_vcpu(CPUState *cpu)
void qemu_init_vcpu(CPUState *cpu)
{
cpu->nr_cores = smp_cores;
cpu->nr_threads = smp_threads;
MachineState *ms = MACHINE(qdev_get_machine());
cpu->nr_cores = ms->smp.cores;
cpu->nr_threads = ms->smp.threads;
cpu->stopped = true;
cpu->random_seed = qemu_guest_random_seed_thread_part1();
exec.c
+2 -1
View File
@@ -1874,6 +1874,7 @@ static void *file_ram_alloc(RAMBlock *block,
bool truncate,
Error **errp)
{
MachineState *ms = MACHINE(qdev_get_machine());
void *area;
block->page_size = qemu_fd_getpagesize(fd);
@@ -1930,7 +1931,7 @@ static void *file_ram_alloc(RAMBlock *block,
}
if (mem_prealloc) {
os_mem_prealloc(fd, area, memory, smp_cpus, errp);
os_mem_prealloc(fd, area, memory, ms->smp.cpus, errp);
if (errp && *errp) {
qemu_ram_munmap(fd, area, memory);
return NULL;
gdbstub.c
+4
View File
@@ -34,6 +34,7 @@
#include "sysemu/sysemu.h"
#include "exec/gdbstub.h"
#include "hw/cpu/cluster.h"
#include "hw/boards.h"
#endif
#define MAX_PACKET_LENGTH 4096
@@ -1171,6 +1172,9 @@ static int gdb_handle_vcont(GDBState *s, const char *p)
CPU_FOREACH(cpu) {
max_cpus = max_cpus <= cpu->cpu_index ? cpu->cpu_index + 1 : max_cpus;
}
#else
MachineState *ms = MACHINE(qdev_get_machine());
unsigned int max_cpus = ms->smp.max_cpus;
#endif
/* uninitialised CPUs stay 0 */
newstates = g_new0(char, max_cpus);
hw/alpha/dp264.c
+1
View File
@@ -63,6 +63,7 @@ static void clipper_init(MachineState *machine)
char *palcode_filename;
uint64_t palcode_entry, palcode_low, palcode_high;
uint64_t kernel_entry, kernel_low, kernel_high;
unsigned int smp_cpus = machine->smp.cpus;
/* Create up to 4 cpus. */
memset(cpus, 0, sizeof(cpus));
hw/arm/aspeed.c
+1 -1
View File
@@ -187,7 +187,7 @@ static void aspeed_board_init(MachineState *machine,
&error_abort);
object_property_set_int(OBJECT(&bmc->soc), cfg->num_cs, "num-cs",
&error_abort);
object_property_set_int(OBJECT(&bmc->soc), smp_cpus, "num-cpus",
object_property_set_int(OBJECT(&bmc->soc), machine->smp.cpus, "num-cpus",
&error_abort);
if (machine->kernel_filename) {
/*
hw/arm/fsl-imx6.c
+5 -1
View File
@@ -22,6 +22,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/arm/fsl-imx6.h"
#include "hw/boards.h"
#include "sysemu/sysemu.h"
#include "chardev/char.h"
#include "qemu/error-report.h"
@@ -33,11 +34,12 @@
static void fsl_imx6_init(Object *obj)
{
MachineState *ms = MACHINE(qdev_get_machine());
FslIMX6State *s = FSL_IMX6(obj);
char name[NAME_SIZE];
int i;
for (i = 0; i < MIN(smp_cpus, FSL_IMX6_NUM_CPUS); i++) {
for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX6_NUM_CPUS); i++) {
snprintf(name, NAME_SIZE, "cpu%d", i);
object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]),
"cortex-a9-" TYPE_ARM_CPU, &error_abort, NULL);
@@ -93,9 +95,11 @@ static void fsl_imx6_init(Object *obj)
static void fsl_imx6_realize(DeviceState *dev, Error **errp)
{
MachineState *ms = MACHINE(qdev_get_machine());
FslIMX6State *s = FSL_IMX6(dev);
uint16_t i;
Error *err = NULL;
unsigned int smp_cpus = ms->smp.cpus;
if (smp_cpus > FSL_IMX6_NUM_CPUS) {
error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
hw/arm/fsl-imx6ul.c
+5 -1
View File
@@ -20,6 +20,7 @@
#include "qapi/error.h"
#include "hw/arm/fsl-imx6ul.h"
#include "hw/misc/unimp.h"
#include "hw/boards.h"
#include "sysemu/sysemu.h"
#include "qemu/error-report.h"
#include "qemu/module.h"
@@ -28,11 +29,12 @@
static void fsl_imx6ul_init(Object *obj)
{
MachineState *ms = MACHINE(qdev_get_machine());
FslIMX6ULState *s = FSL_IMX6UL(obj);
char name[NAME_SIZE];
int i;
for (i = 0; i < MIN(smp_cpus, FSL_IMX6UL_NUM_CPUS); i++) {
for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX6UL_NUM_CPUS); i++) {
snprintf(name, NAME_SIZE, "cpu%d", i);
object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]),
"cortex-a7-" TYPE_ARM_CPU, &error_abort, NULL);
@@ -156,10 +158,12 @@ static void fsl_imx6ul_init(Object *obj)
static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
{
MachineState *ms = MACHINE(qdev_get_machine());
FslIMX6ULState *s = FSL_IMX6UL(dev);
int i;
qemu_irq irq;
char name[NAME_SIZE];
unsigned int smp_cpus = ms->smp.cpus;
if (smp_cpus > FSL_IMX6UL_NUM_CPUS) {
error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
hw/arm/fsl-imx7.c
+5 -2
View File
@@ -22,6 +22,7 @@
#include "qapi/error.h"
#include "hw/arm/fsl-imx7.h"
#include "hw/misc/unimp.h"
#include "hw/boards.h"
#include "sysemu/sysemu.h"
#include "qemu/error-report.h"
#include "qemu/module.h"
@@ -30,12 +31,12 @@
static void fsl_imx7_init(Object *obj)
{
MachineState *ms = MACHINE(qdev_get_machine());
FslIMX7State *s = FSL_IMX7(obj);
char name[NAME_SIZE];
int i;
for (i = 0; i < MIN(smp_cpus, FSL_IMX7_NUM_CPUS); i++) {
for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX7_NUM_CPUS); i++) {
snprintf(name, NAME_SIZE, "cpu%d", i);
object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]),
ARM_CPU_TYPE_NAME("cortex-a7"), &error_abort,
@@ -155,11 +156,13 @@ static void fsl_imx7_init(Object *obj)
static void fsl_imx7_realize(DeviceState *dev, Error **errp)
{
MachineState *ms = MACHINE(qdev_get_machine());
FslIMX7State *s = FSL_IMX7(dev);
Object *o;
int i;
qemu_irq irq;
char name[NAME_SIZE];
unsigned int smp_cpus = ms->smp.cpus;
if (smp_cpus > FSL_IMX7_NUM_CPUS) {
error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
hw/arm/highbank.c
+1
View File
@@ -241,6 +241,7 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id)
SysBusDevice *busdev;
qemu_irq pic[128];
int n;
unsigned int smp_cpus = machine->smp.cpus;
qemu_irq cpu_irq[4];
qemu_irq cpu_fiq[4];
qemu_irq cpu_virq[4];
hw/arm/mcimx6ul-evk.c
+1 -1
View File
@@ -42,7 +42,7 @@ static void mcimx6ul_evk_init(MachineState *machine)
.kernel_filename = machine->kernel_filename,
.kernel_cmdline = machine->kernel_cmdline,
.initrd_filename = machine->initrd_filename,
.nb_cpus = smp_cpus,
.nb_cpus = machine->smp.cpus,
};
object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
hw/arm/mcimx7d-sabre.c
+1 -1
View File
@@ -45,7 +45,7 @@ static void mcimx7d_sabre_init(MachineState *machine)
.kernel_filename = machine->kernel_filename,
.kernel_cmdline = machine->kernel_cmdline,
.initrd_filename = machine->initrd_filename,
.nb_cpus = smp_cpus,
.nb_cpus = machine->smp.cpus,
};
object_initialize(&s->soc, sizeof(s->soc), TYPE_FSL_IMX7);
hw/arm/raspi.c
+2 -2
View File
@@ -116,7 +116,7 @@ static void setup_boot(MachineState *machine, int version, size_t ram_size)
binfo.board_id = raspi_boardid[version];
binfo.ram_size = ram_size;
binfo.nb_cpus = smp_cpus;
binfo.nb_cpus = machine->smp.cpus;
if (version <= 2) {
/* The rpi1 and 2 require some custom setup code to run in Secure
@@ -194,7 +194,7 @@ static void raspi_init(MachineState *machine, int version)
/* Setup the SOC */
object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(&s->ram),
&error_abort);
object_property_set_int(OBJECT(&s->soc), smp_cpus, "enabled-cpus",
object_property_set_int(OBJECT(&s->soc), machine->smp.cpus, "enabled-cpus",
&error_abort);
int board_rev = version == 3 ? 0xa02082 : 0xa21041;
object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev",
hw/arm/realview.c
+1
View File
@@ -69,6 +69,7 @@ static void realview_init(MachineState *machine,
NICInfo *nd;
I2CBus *i2c;
int n;
unsigned int smp_cpus = machine->smp.cpus;
int done_nic = 0;
qemu_irq cpu_irq[4];
int is_mpcore = 0;
hw/arm/sabrelite.c
+1 -1
View File
@@ -105,7 +105,7 @@ static void sabrelite_init(MachineState *machine)
sabrelite_binfo.kernel_filename = machine->kernel_filename;
sabrelite_binfo.kernel_cmdline = machine->kernel_cmdline;
sabrelite_binfo.initrd_filename = machine->initrd_filename;
sabrelite_binfo.nb_cpus = smp_cpus;
sabrelite_binfo.nb_cpus = machine->smp.cpus;
sabrelite_binfo.secure_boot = true;
sabrelite_binfo.write_secondary_boot = sabrelite_write_secondary;
sabrelite_binfo.secondary_cpu_reset_hook = sabrelite_reset_secondary;
hw/arm/sbsa-ref.c
+4
View File
@@ -328,6 +328,7 @@ static void create_secure_ram(SBSAMachineState *sms,
static void create_gic(SBSAMachineState *sms, qemu_irq *pic)
{
unsigned int smp_cpus = MACHINE(sms)->smp.cpus;
DeviceState *gicdev;
SysBusDevice *gicbusdev;
const char *gictype;
@@ -585,6 +586,8 @@ static void *sbsa_ref_dtb(const struct arm_boot_info *binfo, int *fdt_size)
static void sbsa_ref_init(MachineState *machine)
{
unsigned int smp_cpus = machine->smp.cpus;
unsigned int max_cpus = machine->smp.max_cpus;
SBSAMachineState *sms = SBSA_MACHINE(machine);
MachineClass *mc = MACHINE_GET_CLASS(machine);
MemoryRegion *sysmem = get_system_memory();
@@ -727,6 +730,7 @@ static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState *sms, int idx)
static const CPUArchIdList *sbsa_ref_possible_cpu_arch_ids(MachineState *ms)
{
unsigned int max_cpus = ms->smp.max_cpus;
SBSAMachineState *sms = SBSA_MACHINE(ms);
int n;
hw/arm/vexpress.c
+10 -6
View File
@@ -203,12 +203,14 @@ struct VEDBoardInfo {
DBoardInitFn *init;
};
static void init_cpus(const char *cpu_type, const char *privdev,
hwaddr periphbase, qemu_irq *pic, bool secure, bool virt)
static void init_cpus(MachineState *ms, const char *cpu_type,
const char *privdev, hwaddr periphbase,
qemu_irq *pic, bool secure, bool virt)
{
DeviceState *dev;
SysBusDevice *busdev;
int n;
unsigned int smp_cpus = ms->smp.cpus;
/* Create the actual CPUs */
for (n = 0; n < smp_cpus; n++) {
@@ -269,6 +271,7 @@ static void a9_daughterboard_init(const VexpressMachineState *vms,
const char *cpu_type,
qemu_irq *pic)
{
MachineState *machine = MACHINE(vms);
MemoryRegion *sysmem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *lowram = g_new(MemoryRegion, 1);
@@ -295,7 +298,7 @@ static void a9_daughterboard_init(const VexpressMachineState *vms,
memory_region_add_subregion(sysmem, 0x60000000, ram);
/* 0x1e000000 A9MPCore (SCU) private memory region */
init_cpus(cpu_type, TYPE_A9MPCORE_PRIV, 0x1e000000, pic,
init_cpus(machine, cpu_type, TYPE_A9MPCORE_PRIV, 0x1e000000, pic,
vms->secure, vms->virt);
/* Daughterboard peripherals : 0x10020000 .. 0x20000000 */
@@ -355,6 +358,7 @@ static void a15_daughterboard_init(const VexpressMachineState *vms,
const char *cpu_type,
qemu_irq *pic)
{
MachineState *machine = MACHINE(vms);
MemoryRegion *sysmem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *sram = g_new(MemoryRegion, 1);
@@ -377,8 +381,8 @@ static void a15_daughterboard_init(const VexpressMachineState *vms,
memory_region_add_subregion(sysmem, 0x80000000, ram);
/* 0x2c000000 A15MPCore private memory region (GIC) */
init_cpus(cpu_type, TYPE_A15MPCORE_PRIV, 0x2c000000, pic, vms->secure,
vms->virt);
init_cpus(machine, cpu_type, TYPE_A15MPCORE_PRIV,
0x2c000000, pic, vms->secure, vms->virt);
/* A15 daughterboard peripherals: */
@@ -706,7 +710,7 @@ static void vexpress_common_init(MachineState *machine)
daughterboard->bootinfo.kernel_filename = machine->kernel_filename;
daughterboard->bootinfo.kernel_cmdline = machine->kernel_cmdline;
daughterboard->bootinfo.initrd_filename = machine->initrd_filename;
daughterboard->bootinfo.nb_cpus = smp_cpus;
daughterboard->bootinfo.nb_cpus = machine->smp.cpus;
daughterboard->bootinfo.board_id = VEXPRESS_BOARD_ID;
daughterboard->bootinfo.loader_start = daughterboard->loader_start;
daughterboard->bootinfo.smp_loader_start = map[VE_SRAM];
hw/arm/virt.c
+9 -2
View File
@@ -559,11 +559,13 @@ static void create_v2m(VirtMachineState *vms, qemu_irq *pic)
static void create_gic(VirtMachineState *vms, qemu_irq *pic)
{
MachineState *ms = MACHINE(vms);
/* We create a standalone GIC */
DeviceState *gicdev;
SysBusDevice *gicbusdev;
const char *gictype;
int type = vms->gic_version, i;
unsigned int smp_cpus = ms->smp.cpus;
uint32_t nb_redist_regions = 0;
gictype = (type == 3) ? gicv3_class_name() : gic_class_name();
@@ -1039,13 +1041,14 @@ static bool virt_firmware_init(VirtMachineState *vms,
static FWCfgState *create_fw_cfg(const VirtMachineState *vms, AddressSpace *as)
{
MachineState *ms = MACHINE(vms);
hwaddr base = vms->memmap[VIRT_FW_CFG].base;
hwaddr size = vms->memmap[VIRT_FW_CFG].size;
FWCfgState *fw_cfg;
char *nodename;
fw_cfg = fw_cfg_init_mem_wide(base + 8, base, 8, base + 16, as);
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)ms->smp.cpus);
nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base);
qemu_fdt_add_subnode(vms->fdt, nodename);
@@ -1345,7 +1348,7 @@ static void virt_build_smbios(VirtMachineState *vms)
vmc->smbios_old_sys_ver ? "1.0" : mc->name, false,
true, SMBIOS_ENTRY_POINT_30);
smbios_get_tables(NULL, 0, &smbios_tables, &smbios_tables_len,
smbios_get_tables(MACHINE(vms), NULL, 0, &smbios_tables, &smbios_tables_len,
&smbios_anchor, &smbios_anchor_len);
if (smbios_anchor) {
@@ -1478,6 +1481,8 @@ static void machvirt_init(MachineState *machine)
MemoryRegion *ram = g_new(MemoryRegion, 1);
bool firmware_loaded;
bool aarch64 = true;
unsigned int smp_cpus = machine->smp.cpus;
unsigned int max_cpus = machine->smp.max_cpus;
/*
* In accelerated mode, the memory map is computed earlier in kvm_type()
@@ -1845,6 +1850,7 @@ static int64_t virt_get_default_cpu_node_id(const MachineState *ms, int idx)
static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms)
{
int n;
unsigned int max_cpus = ms->smp.max_cpus;
VirtMachineState *vms = VIRT_MACHINE(ms);
if (ms->possible_cpus) {
@@ -1946,6 +1952,7 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
assert(!mc->get_hotplug_handler);
mc->get_hotplug_handler = virt_machine_get_hotplug_handler;
hc->plug = virt_machine_device_plug_cb;
mc->numa_mem_supported = true;
}
static void virt_instance_init(Object *obj)
hw/arm/xlnx-zynqmp.c
+10 -6
View File
@@ -21,6 +21,7 @@
#include "cpu.h"
#include "hw/arm/xlnx-zynqmp.h"
#include "hw/intc/arm_gic_common.h"
#include "hw/boards.h"
#include "exec/address-spaces.h"
#include "sysemu/kvm.h"
#include "kvm_arm.h"
@@ -171,12 +172,13 @@ static inline int arm_gic_ppi_index(int cpu_nr, int ppi_index)
return GIC_NUM_SPI_INTR + cpu_nr * GIC_INTERNAL + ppi_index;
}
static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, const char *boot_cpu,
Error **errp)
static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s,
const char *boot_cpu, Error **errp)
{
Error *err = NULL;
int i;
int num_rpus = MIN(smp_cpus - XLNX_ZYNQMP_NUM_APU_CPUS, XLNX_ZYNQMP_NUM_RPU_CPUS);
int num_rpus = MIN(ms->smp.cpus - XLNX_ZYNQMP_NUM_APU_CPUS,
XLNX_ZYNQMP_NUM_RPU_CPUS);
if (num_rpus <= 0) {
/* Don't create rpu-cluster object if there's nothing to put in it */
@@ -221,9 +223,10 @@ static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, const char *boot_cpu,
static void xlnx_zynqmp_init(Object *obj)
{
MachineState *ms = MACHINE(qdev_get_machine());
XlnxZynqMPState *s = XLNX_ZYNQMP(obj);
int i;
int num_apus = MIN(smp_cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
int num_apus = MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
object_initialize_child(obj, "apu-cluster", &s->apu_cluster,
sizeof(s->apu_cluster), TYPE_CPU_CLUSTER,
@@ -290,11 +293,12 @@ static void xlnx_zynqmp_init(Object *obj)
static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
{
MachineState *ms = MACHINE(qdev_get_machine());
XlnxZynqMPState *s = XLNX_ZYNQMP(dev);
MemoryRegion *system_memory = get_system_memory();
uint8_t i;
uint64_t ram_size;
int num_apus = MIN(smp_cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
int num_apus = MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
const char *boot_cpu = s->boot_cpu ? s->boot_cpu : "apu-cpu[0]";
ram_addr_t ddr_low_size, ddr_high_size;
qemu_irq gic_spi[GIC_NUM_SPI_INTR];
@@ -456,7 +460,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
"RPUs just use -smp 6.");
}
xlnx_zynqmp_create_rpu(s, boot_cpu, &err);
xlnx_zynqmp_create_rpu(ms, s, boot_cpu, &err);
if (err) {
error_propagate(errp, err);
return;

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