new x86 CPU core

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@14 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard
2003-03-01 17:13:26 +00:00
parent 7bfdb6d18c
commit 367e86e847
11 changed files with 3834 additions and 546 deletions
+34 -12
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@@ -1,8 +1,9 @@
ARCH=i386
#ARCH=ppc
HOST_CC=gcc
ifeq ($(ARCH),i386)
CFLAGS=-Wall -O2 -g
CFLAGS=-Wall -O2 -g -fomit-frame-pointer
LDFLAGS=-g
LIBS=
CC=gcc
@@ -27,38 +28,59 @@ endif
#########################################################
DEFINES+=-D_GNU_SOURCE -DGEMU -DDOSEMU #-DNO_TRACE_MSGS
DEFINES+=-D_GNU_SOURCE -DGEMU -DDOSEMU -DNO_TRACE_MSGS
DEFINES+=-DCONFIG_PREFIX=\"/usr/local\"
LDSCRIPT=$(ARCH).ld
LIBS+=-ldl
OBJS= i386/fp87.o i386/interp_main.o i386/interp_modrm.o i386/interp_16_32.o \
i386/interp_32_16.o i386/interp_32_32.o i386/emu-utils.o \
i386/dis8086.o i386/emu-ldt.o
OBJS+=translate-i386.o op-i386.o
OBJS+= elfload.o main.o thunk.o syscall.o
SRCS = $(OBJS:.o=.c)
all: gemu
gemu: $(OBJS)
$(CC) -Wl,-T,$(LDSCRIPT) $(LDFLAGS) -o $@ $(OBJS) $(LIBS)
$(CC) -Wl,-T,$(LDSCRIPT) $(LDFLAGS) -o $@ $^ $(LIBS)
depend: $(SRCS)
$(CC) -MM $(CFLAGS) $^ 1>.depend
# old i386 emulator
i386/interp_32_32.o: i386/interp_32_32.c i386/interp_gen.h
i386/interp_gen.h: i386/gencode
./i386/gencode > $@
i386/gencode: i386/gencode.c
$(CC) -O2 -Wall -g $< -o $@
# new i386 emulator
dyngen: dyngen.c
$(HOST_CC) -O2 -Wall -g $< -o $@
translate-i386.o: translate-i386.c op-i386.h cpu-i386.h
op-i386.h: op-i386.o dyngen
./dyngen -o $@ $<
op-i386.o: op-i386.c opreg_template.h ops_template.h
$(CC) $(CFLAGS) $(DEFINES) -c -o $@ $<
%.o: %.c
$(CC) $(CFLAGS) $(DEFINES) -c -o $@ $<
clean:
rm -f *.o *~ i386/*.o i386/*~ gemu hello test1 test2 TAGS
rm -f *.o *~ i386/*.o i386/*~ gemu TAGS
hello: hello.c
$(CC) -nostdlib $(CFLAGS) -static $(LDFLAGS) -o $@ $<
# various test targets
test speed: gemu
make -C tests $@
test1: test1.c
$(CC) $(CFLAGS) -static $(LDFLAGS) -o $@ $<
test2: test2.c
$(CC) $(CFLAGS) -static $(LDFLAGS) -o $@ $<
TAGS:
etags *.[ch] i386/*.[ch]
ifneq ($(wildcard .depend),)
include .depend
+4 -1
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@@ -1,2 +1,5 @@
- swap all elf paramters
- tests
- signals
- threads
- fix printf for doubles (fp87.c bug ?)
- make it self runnable (use same trick as ld.so : include its own relocator and libc)
+148
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@@ -0,0 +1,148 @@
#ifndef CPU_I386_H
#define CPU_I386_H
#define R_EAX 0
#define R_ECX 1
#define R_EDX 2
#define R_EBX 3
#define R_ESP 4
#define R_EBP 5
#define R_ESI 6
#define R_EDI 7
#define R_AL 0
#define R_CL 1
#define R_DL 2
#define R_BL 3
#define R_AH 4
#define R_CH 5
#define R_DH 6
#define R_BH 7
#define R_ES 0
#define R_CS 1
#define R_SS 2
#define R_DS 3
#define R_FS 4
#define R_GS 5
#define CC_C 0x0001
#define CC_P 0x0004
#define CC_A 0x0010
#define CC_Z 0x0040
#define CC_S 0x0080
#define CC_O 0x0800
#define TRAP_FLAG 0x0100
#define INTERRUPT_FLAG 0x0200
#define DIRECTION_FLAG 0x0400
#define IOPL_FLAG_MASK 0x3000
#define NESTED_FLAG 0x4000
#define BYTE_FL 0x8000 /* Intel reserved! */
#define RF_FLAG 0x10000
#define VM_FLAG 0x20000
/* AC 0x40000 */
enum {
CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */
CC_OP_EFLAGS, /* all cc are explicitely computed, CC_SRC = flags */
CC_OP_MUL, /* modify all flags, C, O = (CC_SRC != 0) */
CC_OP_ADDB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
CC_OP_ADDW,
CC_OP_ADDL,
CC_OP_SUBB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
CC_OP_SUBW,
CC_OP_SUBL,
CC_OP_LOGICB, /* modify all flags, CC_DST = res */
CC_OP_LOGICW,
CC_OP_LOGICL,
CC_OP_INCB, /* modify all flags except, CC_DST = res */
CC_OP_INCW,
CC_OP_INCL,
CC_OP_DECB, /* modify all flags except, CC_DST = res */
CC_OP_DECW,
CC_OP_DECL,
CC_OP_SHLB, /* modify all flags, CC_DST = res, CC_SRC.lsb = C */
CC_OP_SHLW,
CC_OP_SHLL,
CC_OP_NB,
};
typedef struct CPU86State {
/* standard registers */
uint32_t regs[8];
uint32_t pc; /* cs_case + eip value */
/* eflags handling */
uint32_t eflags;
uint32_t cc_src;
uint32_t cc_dst;
uint32_t cc_op;
int32_t df; /* D flag : 1 if D = 0, -1 if D = 1 */
/* segments */
uint8_t *segs_base[6];
uint32_t segs[6];
/* emulator internal variables */
uint32_t t0; /* temporary t0 storage */
uint32_t t1; /* temporary t1 storage */
uint32_t a0; /* temporary a0 storage (address) */
} CPU86State;
static inline int ldub(void *ptr)
{
return *(uint8_t *)ptr;
}
static inline int ldsb(void *ptr)
{
return *(int8_t *)ptr;
}
static inline int lduw(void *ptr)
{
return *(uint16_t *)ptr;
}
static inline int ldsw(void *ptr)
{
return *(int16_t *)ptr;
}
static inline int ldl(void *ptr)
{
return *(uint32_t *)ptr;
}
static inline void stb(void *ptr, int v)
{
*(uint8_t *)ptr = v;
}
static inline void stw(void *ptr, int v)
{
*(uint16_t *)ptr = v;
}
static inline void stl(void *ptr, int v)
{
*(uint32_t *)ptr = v;
}
void port_outb(int addr, int val);
void port_outw(int addr, int val);
void port_outl(int addr, int val);
int port_inb(int addr);
int port_inw(int addr);
int port_inl(int addr);
#endif /* CPU_I386_H */
+521
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+8
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@@ -0,0 +1,8 @@
static inline void gen_start(void)
{
}
static inline void gen_end(void)
{
*gen_code_ptr++ = 0xc3; /* ret */
}
+36
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@@ -191,6 +191,41 @@ void INT_handler(int num, void *env)
}
/***********************************************************/
/* new CPU core */
void port_outb(int addr, int val)
{
fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
}
void port_outw(int addr, int val)
{
fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
}
void port_outl(int addr, int val)
{
fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
}
int port_inb(int addr)
{
fprintf(stderr, "inb: port=0x%04x\n", addr);
return 0;
}
int port_inw(int addr)
{
fprintf(stderr, "inw: port=0x%04x\n", addr);
return 0;
}
int port_inl(int addr)
{
fprintf(stderr, "inl: port=0x%04x\n", addr);
return 0;
}
/* XXX: currently we use LDT entries */
#define __USER_CS (0x23|4)
@@ -270,6 +305,7 @@ int main(int argc, char **argv)
LDT[__USER_DS >> 3].dwSelLimit = 0xfffff;
LDT[__USER_DS >> 3].lpSelBase = NULL;
init_npu();
build_decode_tables();
for(;;) {
int err;
+292 -521
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+628
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+19 -1
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@@ -2,7 +2,9 @@ CC=gcc
CFLAGS=-Wall -O2 -g
LDFLAGS=
TESTS=hello test1 test2 sha1 test-i386
TESTS=hello test1 test2 sha1 test-i386
TESTS+=op-i386.o #op-i386.o op-ppc.o op-arm.o op-mips.o op-sparc.o
GEMU=../gemu
all: $(TESTS)
@@ -25,6 +27,22 @@ test: test-i386
$(GEMU) test-i386 > test-i386.out
@if diff -u test-i386.ref test-i386.out ; then echo "Auto Test OK"; fi
# dyngen tests
op-i386.o: op.c
gcc $(CFLAGS) -c -o $@ $<
op-ppc.o: op.c
powerpc-linux-gcc $(CFLAGS) -c -o $@ $<
op-arm.o: op.c
arm-linux-gcc $(CFLAGS) -c -o $@ $<
op-mips.o: op.c
mips-linux-gcc $(CFLAGS) -mno-abicalls -c -o $@ $<
op-sparc.o: op.c
sparc-linux-gcc $(CFLAGS) -mflat -c -o $@ $<
# speed test
sha1: sha1.c
$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $<
+11 -11
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@@ -28,16 +28,16 @@
#define bswap_64(x) \
({ \
__u64 __x = (x); \
((__u64)( \
(__u64)(((__u64)(__x) & (__u64)0x00000000000000ffULL) << 56) | \
(__u64)(((__u64)(__x) & (__u64)0x000000000000ff00ULL) << 40) | \
(__u64)(((__u64)(__x) & (__u64)0x0000000000ff0000ULL) << 24) | \
(__u64)(((__u64)(__x) & (__u64)0x00000000ff000000ULL) << 8) | \
(__u64)(((__u64)(__x) & (__u64)0x000000ff00000000ULL) >> 8) | \
(__u64)(((__u64)(__x) & (__u64)0x0000ff0000000000ULL) >> 24) | \
(__u64)(((__u64)(__x) & (__u64)0x00ff000000000000ULL) >> 40) | \
(__u64)(((__u64)(__x) & (__u64)0xff00000000000000ULL) >> 56) )); \
uint64_t __x = (x); \
((uint64_t)( \
(uint64_t)(((uint64_t)(__x) & (uint64_t)0x00000000000000ffULL) << 56) | \
(uint64_t)(((uint64_t)(__x) & (uint64_t)0x000000000000ff00ULL) << 40) | \
(uint64_t)(((uint64_t)(__x) & (uint64_t)0x0000000000ff0000ULL) << 24) | \
(uint64_t)(((uint64_t)(__x) & (uint64_t)0x00000000ff000000ULL) << 8) | \
(uint64_t)(((uint64_t)(__x) & (uint64_t)0x000000ff00000000ULL) >> 8) | \
(uint64_t)(((uint64_t)(__x) & (uint64_t)0x0000ff0000000000ULL) >> 24) | \
(uint64_t)(((uint64_t)(__x) & (uint64_t)0x00ff000000000000ULL) >> 40) | \
(uint64_t)(((uint64_t)(__x) & (uint64_t)0xff00000000000000ULL) >> 56) )); \
})
#endif
@@ -51,7 +51,7 @@
#define BSWAP_NEEDED
#endif
/* XXX: auto autoconf */
/* XXX: autoconf */
#define TARGET_I386
#define TARGET_LONG_BITS 32
+2133
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