mirror of
https://github.com/izzy2lost/xemu.git
synced 2026-07-06 00:20:22 -07:00
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20150824' into staging
queued tcg patches # gpg: Signature made Mon 24 Aug 2015 19:37:15 BST using RSA key ID 4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" * remotes/rth/tags/pull-tcg-20150824: linux-user: remove useless macros GUEST_BASE and RESERVED_VA linux-user: remove --enable-guest-base/--disable-guest-base tcg/aarch64: Use softmmu fast path for unaligned accesses tcg/s390: Use softmmu fast path for unaligned accesses tcg/ppc: Improve unaligned load/store handling on 64-bit backend tcg/i386: use softmmu fast path for unaligned accesses tcg: Remove tcg_gen_trunc_i64_i32 tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32 tcg: update README about size changing ops tcg/optimize: add optimizations for ext_i32_i64 and extu_i32_i64 ops tcg: implement real ext_i32_i64 and extu_i32_i64 ops tcg: don't abuse TCG type in tcg_gen_trunc_shr_i64_i32 tcg: rename trunc_shr_i32 into trunc_shr_i64_i32 tcg/optimize: allow constant to have copies tcg/optimize: track const/copy status separately tcg/optimize: add temp_is_const and temp_is_copy functions tcg/optimize: optimize temps tracking tcg/optimize: fix constant signedness Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
@@ -1371,7 +1371,6 @@ int load_elf_binary(struct linux_binprm * bprm, struct target_pt_regs * regs,
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info->mmap = 0;
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elf_entry = (abi_ulong) elf_ex.e_entry;
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#if defined(CONFIG_USE_GUEST_BASE)
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/*
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* In case where user has not explicitly set the guest_base, we
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* probe here that should we set it automatically.
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@@ -1392,7 +1391,6 @@ int load_elf_binary(struct linux_binprm * bprm, struct target_pt_regs * regs,
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}
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}
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}
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#endif /* CONFIG_USE_GUEST_BASE */
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/* Do this so that we can load the interpreter, if need be. We will
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change some of these later */
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@@ -35,12 +35,10 @@
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#include "qemu/envlist.h"
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int singlestep;
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#if defined(CONFIG_USE_GUEST_BASE)
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unsigned long mmap_min_addr;
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unsigned long guest_base;
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int have_guest_base;
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unsigned long reserved_va;
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#endif
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static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX;
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const char *qemu_uname_release;
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@@ -682,9 +680,7 @@ static void usage(void)
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"-drop-ld-preload drop LD_PRELOAD for target process\n"
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"-E var=value sets/modifies targets environment variable(s)\n"
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"-U var unsets targets environment variable(s)\n"
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#if defined(CONFIG_USE_GUEST_BASE)
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"-B address set guest_base address to address\n"
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#endif
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"-bsd type select emulated BSD type FreeBSD/NetBSD/OpenBSD (default)\n"
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"\n"
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"Debug options:\n"
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@@ -830,11 +826,9 @@ int main(int argc, char **argv)
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#endif
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exit(1);
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}
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#if defined(CONFIG_USE_GUEST_BASE)
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} else if (!strcmp(r, "B")) {
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guest_base = strtol(argv[optind++], NULL, 0);
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have_guest_base = 1;
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#endif
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} else if (!strcmp(r, "drop-ld-preload")) {
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(void) envlist_unsetenv(envlist, "LD_PRELOAD");
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} else if (!strcmp(r, "bsd")) {
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@@ -923,7 +917,6 @@ int main(int argc, char **argv)
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target_environ = envlist_to_environ(envlist, NULL);
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envlist_free(envlist);
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#if defined(CONFIG_USE_GUEST_BASE)
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/*
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* Now that page sizes are configured in cpu_init() we can do
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* proper page alignment for guest_base.
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@@ -950,7 +943,6 @@ int main(int argc, char **argv)
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fclose(fp);
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}
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}
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#endif /* CONFIG_USE_GUEST_BASE */
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if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) {
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printf("Error loading %s\n", filename);
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@@ -964,9 +956,7 @@ int main(int argc, char **argv)
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free(target_environ);
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if (qemu_log_enabled()) {
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#if defined(CONFIG_USE_GUEST_BASE)
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qemu_log("guest_base 0x%lx\n", guest_base);
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#endif
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log_page_dump();
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qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
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@@ -986,12 +976,10 @@ int main(int argc, char **argv)
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syscall_init();
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signal_init();
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#if defined(CONFIG_USE_GUEST_BASE)
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/* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
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generating the prologue until now so that the prologue can take
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the real value of GUEST_BASE into account. */
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tcg_prologue_init(&tcg_ctx);
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#endif
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/* build Task State */
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memset(ts, 0, sizeof(TaskState));
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@@ -101,9 +101,7 @@ typedef struct TaskState {
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void init_task_state(TaskState *ts);
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extern const char *qemu_uname_release;
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#if defined(CONFIG_USE_GUEST_BASE)
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extern unsigned long mmap_min_addr;
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#endif
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/* ??? See if we can avoid exposing so much of the loader internals. */
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/*
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@@ -293,7 +293,6 @@ cocoa="no"
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softmmu="yes"
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linux_user="no"
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bsd_user="no"
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guest_base="yes"
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aix="no"
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blobs="yes"
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pkgversion=""
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@@ -975,10 +974,6 @@ for opt do
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;;
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--enable-bsd-user) bsd_user="yes"
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;;
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--enable-guest-base) guest_base="yes"
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;;
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--disable-guest-base) guest_base="no"
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;;
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--enable-pie) pie="yes"
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;;
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--disable-pie) pie="no"
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@@ -1314,7 +1309,6 @@ disabled with --disable-FEATURE, default is enabled if available:
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user supported user emulation targets
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linux-user all linux usermode emulation targets
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bsd-user all BSD usermode emulation targets
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guest-base GUEST_BASE support for usermode emulation targets
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docs build documentation
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guest-agent build the QEMU Guest Agent
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guest-agent-msi build guest agent Windows MSI installation package
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@@ -4544,7 +4538,6 @@ fi
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echo "brlapi support $brlapi"
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echo "bluez support $bluez"
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echo "Documentation $docs"
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echo "GUEST_BASE $guest_base"
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echo "PIE $pie"
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echo "vde support $vde"
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echo "netmap support $netmap"
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@@ -5481,9 +5474,6 @@ fi
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if test "$target_user_only" = "yes" -a "$bflt" = "yes"; then
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echo "TARGET_HAS_BFLT=y" >> $config_target_mak
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fi
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if test "$target_user_only" = "yes" -a "$guest_base" = "yes"; then
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echo "CONFIG_USE_GUEST_BASE=y" >> $config_target_mak
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fi
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if test "$target_bsd_user" = "yes" ; then
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echo "CONFIG_BSD_USER=y" >> $config_target_mak
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fi
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@@ -160,18 +160,11 @@ static inline void tswap64s(uint64_t *s)
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/* On some host systems the guest address space is reserved on the host.
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* This allows the guest address space to be offset to a convenient location.
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*/
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#if defined(CONFIG_USE_GUEST_BASE)
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extern unsigned long guest_base;
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extern int have_guest_base;
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extern unsigned long reserved_va;
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#define GUEST_BASE guest_base
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#define RESERVED_VA reserved_va
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#else
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#define GUEST_BASE 0ul
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#define RESERVED_VA 0ul
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#endif
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#define GUEST_ADDR_MAX (RESERVED_VA ? RESERVED_VA : \
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#define GUEST_ADDR_MAX (reserved_va ? reserved_va : \
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(1ul << TARGET_VIRT_ADDR_SPACE_BITS) - 1)
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#endif
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@@ -49,20 +49,20 @@
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#if defined(CONFIG_USER_ONLY)
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/* All direct uses of g2h and h2g need to go away for usermode softmmu. */
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#define g2h(x) ((void *)((unsigned long)(target_ulong)(x) + GUEST_BASE))
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#define g2h(x) ((void *)((unsigned long)(target_ulong)(x) + guest_base))
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#if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS
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#define h2g_valid(x) 1
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#else
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#define h2g_valid(x) ({ \
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unsigned long __guest = (unsigned long)(x) - GUEST_BASE; \
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unsigned long __guest = (unsigned long)(x) - guest_base; \
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(__guest < (1ul << TARGET_VIRT_ADDR_SPACE_BITS)) && \
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(!RESERVED_VA || (__guest < RESERVED_VA)); \
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(!reserved_va || (__guest < reserved_va)); \
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})
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#endif
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#define h2g_nocheck(x) ({ \
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unsigned long __ret = (unsigned long)(x) - GUEST_BASE; \
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unsigned long __ret = (unsigned long)(x) - guest_base; \
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(abi_ulong)__ret; \
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})
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@@ -1756,7 +1756,6 @@ static void probe_guest_base(const char *image_name,
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* it explicitly, and set guest_base appropriately.
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* In case of error we will print a suitable message and exit.
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*/
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#if defined(CONFIG_USE_GUEST_BASE)
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const char *errmsg;
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if (!have_guest_base && !reserved_va) {
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unsigned long host_start, real_start, host_size;
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@@ -1795,7 +1794,6 @@ static void probe_guest_base(const char *image_name,
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exit_errmsg:
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fprintf(stderr, "%s: %s\n", image_name, errmsg);
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exit(-1);
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#endif
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}
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@@ -43,7 +43,6 @@ int gdbstub_port;
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envlist_t *envlist;
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static const char *cpu_model;
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unsigned long mmap_min_addr;
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#if defined(CONFIG_USE_GUEST_BASE)
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unsigned long guest_base;
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int have_guest_base;
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#if (TARGET_LONG_BITS == 32) && (HOST_LONG_BITS == 64)
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@@ -63,7 +62,6 @@ unsigned long reserved_va = 0xf7000000;
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#else
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unsigned long reserved_va;
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#endif
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#endif
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static void usage(void);
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@@ -3584,7 +3582,6 @@ static void handle_arg_cpu(const char *arg)
|
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}
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}
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#if defined(CONFIG_USE_GUEST_BASE)
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static void handle_arg_guest_base(const char *arg)
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{
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guest_base = strtol(arg, NULL, 0);
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@@ -3626,7 +3623,6 @@ static void handle_arg_reserved_va(const char *arg)
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exit(1);
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}
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}
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#endif
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|
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static void handle_arg_singlestep(const char *arg)
|
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{
|
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@@ -3673,12 +3669,10 @@ static const struct qemu_argument arg_table[] = {
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"argv0", "forces target process argv[0] to be 'argv0'"},
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{"r", "QEMU_UNAME", true, handle_arg_uname,
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"uname", "set qemu uname release string to 'uname'"},
|
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#if defined(CONFIG_USE_GUEST_BASE)
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{"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base,
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"address", "set guest_base address to 'address'"},
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{"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va,
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"size", "reserve 'size' bytes for guest virtual address space"},
|
||||
#endif
|
||||
{"d", "QEMU_LOG", true, handle_arg_log,
|
||||
"item[,...]", "enable logging of specified items "
|
||||
"(use '-d help' for a list of items)"},
|
||||
@@ -3954,7 +3948,6 @@ int main(int argc, char **argv, char **envp)
|
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target_environ = envlist_to_environ(envlist, NULL);
|
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envlist_free(envlist);
|
||||
|
||||
#if defined(CONFIG_USE_GUEST_BASE)
|
||||
/*
|
||||
* Now that page sizes are configured in cpu_init() we can do
|
||||
* proper page alignment for guest_base.
|
||||
@@ -3976,7 +3969,6 @@ int main(int argc, char **argv, char **envp)
|
||||
mmap_next_start = reserved_va;
|
||||
}
|
||||
}
|
||||
#endif /* CONFIG_USE_GUEST_BASE */
|
||||
|
||||
/*
|
||||
* Read in mmap_min_addr kernel parameter. This value is used
|
||||
@@ -4050,9 +4042,7 @@ int main(int argc, char **argv, char **envp)
|
||||
free(target_environ);
|
||||
|
||||
if (qemu_log_enabled()) {
|
||||
#if defined(CONFIG_USE_GUEST_BASE)
|
||||
qemu_log("guest_base 0x%lx\n", guest_base);
|
||||
#endif
|
||||
log_page_dump();
|
||||
|
||||
qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
|
||||
@@ -4072,12 +4062,10 @@ int main(int argc, char **argv, char **envp)
|
||||
syscall_init();
|
||||
signal_init();
|
||||
|
||||
#if defined(CONFIG_USE_GUEST_BASE)
|
||||
/* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
|
||||
generating the prologue until now so that the prologue can take
|
||||
the real value of GUEST_BASE into account. */
|
||||
tcg_prologue_init(&tcg_ctx);
|
||||
#endif
|
||||
|
||||
#if defined(TARGET_I386)
|
||||
env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
|
||||
|
||||
+10
-14
@@ -206,7 +206,6 @@ abi_ulong mmap_next_start = TASK_UNMAPPED_BASE;
|
||||
|
||||
unsigned long last_brk;
|
||||
|
||||
#ifdef CONFIG_USE_GUEST_BASE
|
||||
/* Subroutine of mmap_find_vma, used when we have pre-allocated a chunk
|
||||
of guest address space. */
|
||||
static abi_ulong mmap_find_vma_reserved(abi_ulong start, abi_ulong size)
|
||||
@@ -216,14 +215,14 @@ static abi_ulong mmap_find_vma_reserved(abi_ulong start, abi_ulong size)
|
||||
int prot;
|
||||
int looped = 0;
|
||||
|
||||
if (size > RESERVED_VA) {
|
||||
if (size > reserved_va) {
|
||||
return (abi_ulong)-1;
|
||||
}
|
||||
|
||||
size = HOST_PAGE_ALIGN(size);
|
||||
end_addr = start + size;
|
||||
if (end_addr > RESERVED_VA) {
|
||||
end_addr = RESERVED_VA;
|
||||
if (end_addr > reserved_va) {
|
||||
end_addr = reserved_va;
|
||||
}
|
||||
addr = end_addr - qemu_host_page_size;
|
||||
|
||||
@@ -232,7 +231,7 @@ static abi_ulong mmap_find_vma_reserved(abi_ulong start, abi_ulong size)
|
||||
if (looped) {
|
||||
return (abi_ulong)-1;
|
||||
}
|
||||
end_addr = RESERVED_VA;
|
||||
end_addr = reserved_va;
|
||||
addr = end_addr - qemu_host_page_size;
|
||||
looped = 1;
|
||||
continue;
|
||||
@@ -253,7 +252,6 @@ static abi_ulong mmap_find_vma_reserved(abi_ulong start, abi_ulong size)
|
||||
|
||||
return addr;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Find and reserve a free memory area of size 'size'. The search
|
||||
@@ -276,11 +274,9 @@ abi_ulong mmap_find_vma(abi_ulong start, abi_ulong size)
|
||||
|
||||
size = HOST_PAGE_ALIGN(size);
|
||||
|
||||
#ifdef CONFIG_USE_GUEST_BASE
|
||||
if (RESERVED_VA) {
|
||||
if (reserved_va) {
|
||||
return mmap_find_vma_reserved(start, size);
|
||||
}
|
||||
#endif
|
||||
|
||||
addr = start;
|
||||
wrapped = repeat = 0;
|
||||
@@ -671,7 +667,7 @@ int target_munmap(abi_ulong start, abi_ulong len)
|
||||
ret = 0;
|
||||
/* unmap what we can */
|
||||
if (real_start < real_end) {
|
||||
if (RESERVED_VA) {
|
||||
if (reserved_va) {
|
||||
mmap_reserve(real_start, real_end - real_start);
|
||||
} else {
|
||||
ret = munmap(g2h(real_start), real_end - real_start);
|
||||
@@ -701,7 +697,7 @@ abi_long target_mremap(abi_ulong old_addr, abi_ulong old_size,
|
||||
flags,
|
||||
g2h(new_addr));
|
||||
|
||||
if (RESERVED_VA && host_addr != MAP_FAILED) {
|
||||
if (reserved_va && host_addr != MAP_FAILED) {
|
||||
/* If new and old addresses overlap then the above mremap will
|
||||
already have failed with EINVAL. */
|
||||
mmap_reserve(old_addr, old_size);
|
||||
@@ -719,13 +715,13 @@ abi_long target_mremap(abi_ulong old_addr, abi_ulong old_size,
|
||||
old_size, new_size,
|
||||
flags | MREMAP_FIXED,
|
||||
g2h(mmap_start));
|
||||
if ( RESERVED_VA ) {
|
||||
if (reserved_va) {
|
||||
mmap_reserve(old_addr, old_size);
|
||||
}
|
||||
}
|
||||
} else {
|
||||
int prot = 0;
|
||||
if (RESERVED_VA && old_size < new_size) {
|
||||
if (reserved_va && old_size < new_size) {
|
||||
abi_ulong addr;
|
||||
for (addr = old_addr + old_size;
|
||||
addr < old_addr + new_size;
|
||||
@@ -735,7 +731,7 @@ abi_long target_mremap(abi_ulong old_addr, abi_ulong old_size,
|
||||
}
|
||||
if (prot == 0) {
|
||||
host_addr = mremap(g2h(old_addr), old_size, new_size, flags);
|
||||
if (host_addr != MAP_FAILED && RESERVED_VA && old_size > new_size) {
|
||||
if (host_addr != MAP_FAILED && reserved_va && old_size > new_size) {
|
||||
mmap_reserve(old_addr + old_size, new_size - old_size);
|
||||
}
|
||||
} else {
|
||||
|
||||
@@ -2007,7 +2007,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
|
||||
REQUIRE_REG_31(rb);
|
||||
t32 = tcg_temp_new_i32();
|
||||
va = load_gpr(ctx, ra);
|
||||
tcg_gen_trunc_i64_i32(t32, va);
|
||||
tcg_gen_extrl_i64_i32(t32, va);
|
||||
gen_helper_memory_to_s(vc, t32);
|
||||
tcg_temp_free_i32(t32);
|
||||
break;
|
||||
@@ -2027,7 +2027,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
|
||||
REQUIRE_REG_31(rb);
|
||||
t32 = tcg_temp_new_i32();
|
||||
va = load_gpr(ctx, ra);
|
||||
tcg_gen_trunc_i64_i32(t32, va);
|
||||
tcg_gen_extrl_i64_i32(t32, va);
|
||||
gen_helper_memory_to_f(vc, t32);
|
||||
tcg_temp_free_i32(t32);
|
||||
break;
|
||||
|
||||
+30
-30
@@ -528,9 +528,9 @@ static inline void gen_set_NZ64(TCGv_i64 result)
|
||||
TCGv_i64 flag = tcg_temp_new_i64();
|
||||
|
||||
tcg_gen_setcondi_i64(TCG_COND_NE, flag, result, 0);
|
||||
tcg_gen_trunc_i64_i32(cpu_ZF, flag);
|
||||
tcg_gen_extrl_i64_i32(cpu_ZF, flag);
|
||||
tcg_gen_shri_i64(flag, result, 32);
|
||||
tcg_gen_trunc_i64_i32(cpu_NF, flag);
|
||||
tcg_gen_extrl_i64_i32(cpu_NF, flag);
|
||||
tcg_temp_free_i64(flag);
|
||||
}
|
||||
|
||||
@@ -540,8 +540,8 @@ static inline void gen_logic_CC(int sf, TCGv_i64 result)
|
||||
if (sf) {
|
||||
gen_set_NZ64(result);
|
||||
} else {
|
||||
tcg_gen_trunc_i64_i32(cpu_ZF, result);
|
||||
tcg_gen_trunc_i64_i32(cpu_NF, result);
|
||||
tcg_gen_extrl_i64_i32(cpu_ZF, result);
|
||||
tcg_gen_extrl_i64_i32(cpu_NF, result);
|
||||
}
|
||||
tcg_gen_movi_i32(cpu_CF, 0);
|
||||
tcg_gen_movi_i32(cpu_VF, 0);
|
||||
@@ -559,7 +559,7 @@ static void gen_add_CC(int sf, TCGv_i64 dest, TCGv_i64 t0, TCGv_i64 t1)
|
||||
tcg_gen_movi_i64(tmp, 0);
|
||||
tcg_gen_add2_i64(result, flag, t0, tmp, t1, tmp);
|
||||
|
||||
tcg_gen_trunc_i64_i32(cpu_CF, flag);
|
||||
tcg_gen_extrl_i64_i32(cpu_CF, flag);
|
||||
|
||||
gen_set_NZ64(result);
|
||||
|
||||
@@ -568,7 +568,7 @@ static void gen_add_CC(int sf, TCGv_i64 dest, TCGv_i64 t0, TCGv_i64 t1)
|
||||
tcg_gen_andc_i64(flag, flag, tmp);
|
||||
tcg_temp_free_i64(tmp);
|
||||
tcg_gen_shri_i64(flag, flag, 32);
|
||||
tcg_gen_trunc_i64_i32(cpu_VF, flag);
|
||||
tcg_gen_extrl_i64_i32(cpu_VF, flag);
|
||||
|
||||
tcg_gen_mov_i64(dest, result);
|
||||
tcg_temp_free_i64(result);
|
||||
@@ -580,8 +580,8 @@ static void gen_add_CC(int sf, TCGv_i64 dest, TCGv_i64 t0, TCGv_i64 t1)
|
||||
TCGv_i32 tmp = tcg_temp_new_i32();
|
||||
|
||||
tcg_gen_movi_i32(tmp, 0);
|
||||
tcg_gen_trunc_i64_i32(t0_32, t0);
|
||||
tcg_gen_trunc_i64_i32(t1_32, t1);
|
||||
tcg_gen_extrl_i64_i32(t0_32, t0);
|
||||
tcg_gen_extrl_i64_i32(t1_32, t1);
|
||||
tcg_gen_add2_i32(cpu_NF, cpu_CF, t0_32, tmp, t1_32, tmp);
|
||||
tcg_gen_mov_i32(cpu_ZF, cpu_NF);
|
||||
tcg_gen_xor_i32(cpu_VF, cpu_NF, t0_32);
|
||||
@@ -609,7 +609,7 @@ static void gen_sub_CC(int sf, TCGv_i64 dest, TCGv_i64 t0, TCGv_i64 t1)
|
||||
gen_set_NZ64(result);
|
||||
|
||||
tcg_gen_setcond_i64(TCG_COND_GEU, flag, t0, t1);
|
||||
tcg_gen_trunc_i64_i32(cpu_CF, flag);
|
||||
tcg_gen_extrl_i64_i32(cpu_CF, flag);
|
||||
|
||||
tcg_gen_xor_i64(flag, result, t0);
|
||||
tmp = tcg_temp_new_i64();
|
||||
@@ -617,7 +617,7 @@ static void gen_sub_CC(int sf, TCGv_i64 dest, TCGv_i64 t0, TCGv_i64 t1)
|
||||
tcg_gen_and_i64(flag, flag, tmp);
|
||||
tcg_temp_free_i64(tmp);
|
||||
tcg_gen_shri_i64(flag, flag, 32);
|
||||
tcg_gen_trunc_i64_i32(cpu_VF, flag);
|
||||
tcg_gen_extrl_i64_i32(cpu_VF, flag);
|
||||
tcg_gen_mov_i64(dest, result);
|
||||
tcg_temp_free_i64(flag);
|
||||
tcg_temp_free_i64(result);
|
||||
@@ -627,8 +627,8 @@ static void gen_sub_CC(int sf, TCGv_i64 dest, TCGv_i64 t0, TCGv_i64 t1)
|
||||
TCGv_i32 t1_32 = tcg_temp_new_i32();
|
||||
TCGv_i32 tmp;
|
||||
|
||||
tcg_gen_trunc_i64_i32(t0_32, t0);
|
||||
tcg_gen_trunc_i64_i32(t1_32, t1);
|
||||
tcg_gen_extrl_i64_i32(t0_32, t0);
|
||||
tcg_gen_extrl_i64_i32(t1_32, t1);
|
||||
tcg_gen_sub_i32(cpu_NF, t0_32, t1_32);
|
||||
tcg_gen_mov_i32(cpu_ZF, cpu_NF);
|
||||
tcg_gen_setcond_i32(TCG_COND_GEU, cpu_CF, t0_32, t1_32);
|
||||
@@ -670,14 +670,14 @@ static void gen_adc_CC(int sf, TCGv_i64 dest, TCGv_i64 t0, TCGv_i64 t1)
|
||||
tcg_gen_extu_i32_i64(cf_64, cpu_CF);
|
||||
tcg_gen_add2_i64(result, cf_64, t0, tmp, cf_64, tmp);
|
||||
tcg_gen_add2_i64(result, cf_64, result, cf_64, t1, tmp);
|
||||
tcg_gen_trunc_i64_i32(cpu_CF, cf_64);
|
||||
tcg_gen_extrl_i64_i32(cpu_CF, cf_64);
|
||||
gen_set_NZ64(result);
|
||||
|
||||
tcg_gen_xor_i64(vf_64, result, t0);
|
||||
tcg_gen_xor_i64(tmp, t0, t1);
|
||||
tcg_gen_andc_i64(vf_64, vf_64, tmp);
|
||||
tcg_gen_shri_i64(vf_64, vf_64, 32);
|
||||
tcg_gen_trunc_i64_i32(cpu_VF, vf_64);
|
||||
tcg_gen_extrl_i64_i32(cpu_VF, vf_64);
|
||||
|
||||
tcg_gen_mov_i64(dest, result);
|
||||
|
||||
@@ -691,8 +691,8 @@ static void gen_adc_CC(int sf, TCGv_i64 dest, TCGv_i64 t0, TCGv_i64 t1)
|
||||
t1_32 = tcg_temp_new_i32();
|
||||
tmp = tcg_const_i32(0);
|
||||
|
||||
tcg_gen_trunc_i64_i32(t0_32, t0);
|
||||
tcg_gen_trunc_i64_i32(t1_32, t1);
|
||||
tcg_gen_extrl_i64_i32(t0_32, t0);
|
||||
tcg_gen_extrl_i64_i32(t1_32, t1);
|
||||
tcg_gen_add2_i32(cpu_NF, cpu_CF, t0_32, tmp, cpu_CF, tmp);
|
||||
tcg_gen_add2_i32(cpu_NF, cpu_CF, cpu_NF, cpu_CF, t1_32, tmp);
|
||||
|
||||
@@ -1301,7 +1301,7 @@ static void gen_set_nzcv(TCGv_i64 tcg_rt)
|
||||
TCGv_i32 nzcv = tcg_temp_new_i32();
|
||||
|
||||
/* take NZCV from R[t] */
|
||||
tcg_gen_trunc_i64_i32(nzcv, tcg_rt);
|
||||
tcg_gen_extrl_i64_i32(nzcv, tcg_rt);
|
||||
|
||||
/* bit 31, N */
|
||||
tcg_gen_andi_i32(cpu_NF, nzcv, (1U << 31));
|
||||
@@ -3131,8 +3131,8 @@ static void shift_reg(TCGv_i64 dst, TCGv_i64 src, int sf,
|
||||
TCGv_i32 t0, t1;
|
||||
t0 = tcg_temp_new_i32();
|
||||
t1 = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(t0, src);
|
||||
tcg_gen_trunc_i64_i32(t1, shift_amount);
|
||||
tcg_gen_extrl_i64_i32(t0, src);
|
||||
tcg_gen_extrl_i64_i32(t1, shift_amount);
|
||||
tcg_gen_rotr_i32(t0, t0, t1);
|
||||
tcg_gen_extu_i32_i64(dst, t0);
|
||||
tcg_temp_free_i32(t0);
|
||||
@@ -3680,7 +3680,7 @@ static void handle_clz(DisasContext *s, unsigned int sf,
|
||||
gen_helper_clz64(tcg_rd, tcg_rn);
|
||||
} else {
|
||||
TCGv_i32 tcg_tmp32 = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(tcg_tmp32, tcg_rn);
|
||||
tcg_gen_extrl_i64_i32(tcg_tmp32, tcg_rn);
|
||||
gen_helper_clz(tcg_tmp32, tcg_tmp32);
|
||||
tcg_gen_extu_i32_i64(tcg_rd, tcg_tmp32);
|
||||
tcg_temp_free_i32(tcg_tmp32);
|
||||
@@ -3698,7 +3698,7 @@ static void handle_cls(DisasContext *s, unsigned int sf,
|
||||
gen_helper_cls64(tcg_rd, tcg_rn);
|
||||
} else {
|
||||
TCGv_i32 tcg_tmp32 = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(tcg_tmp32, tcg_rn);
|
||||
tcg_gen_extrl_i64_i32(tcg_tmp32, tcg_rn);
|
||||
gen_helper_cls32(tcg_tmp32, tcg_tmp32);
|
||||
tcg_gen_extu_i32_i64(tcg_rd, tcg_tmp32);
|
||||
tcg_temp_free_i32(tcg_tmp32);
|
||||
@@ -3716,7 +3716,7 @@ static void handle_rbit(DisasContext *s, unsigned int sf,
|
||||
gen_helper_rbit64(tcg_rd, tcg_rn);
|
||||
} else {
|
||||
TCGv_i32 tcg_tmp32 = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(tcg_tmp32, tcg_rn);
|
||||
tcg_gen_extrl_i64_i32(tcg_tmp32, tcg_rn);
|
||||
gen_helper_rbit(tcg_tmp32, tcg_tmp32);
|
||||
tcg_gen_extu_i32_i64(tcg_rd, tcg_tmp32);
|
||||
tcg_temp_free_i32(tcg_tmp32);
|
||||
@@ -5475,16 +5475,16 @@ static void disas_simd_across_lanes(DisasContext *s, uint32_t insn)
|
||||
assert(elements == 4);
|
||||
|
||||
read_vec_element(s, tcg_elt, rn, 0, MO_32);
|
||||
tcg_gen_trunc_i64_i32(tcg_elt1, tcg_elt);
|
||||
tcg_gen_extrl_i64_i32(tcg_elt1, tcg_elt);
|
||||
read_vec_element(s, tcg_elt, rn, 1, MO_32);
|
||||
tcg_gen_trunc_i64_i32(tcg_elt2, tcg_elt);
|
||||
tcg_gen_extrl_i64_i32(tcg_elt2, tcg_elt);
|
||||
|
||||
do_minmaxop(s, tcg_elt1, tcg_elt2, opcode, is_min, fpst);
|
||||
|
||||
read_vec_element(s, tcg_elt, rn, 2, MO_32);
|
||||
tcg_gen_trunc_i64_i32(tcg_elt2, tcg_elt);
|
||||
tcg_gen_extrl_i64_i32(tcg_elt2, tcg_elt);
|
||||
read_vec_element(s, tcg_elt, rn, 3, MO_32);
|
||||
tcg_gen_trunc_i64_i32(tcg_elt3, tcg_elt);
|
||||
tcg_gen_extrl_i64_i32(tcg_elt3, tcg_elt);
|
||||
|
||||
do_minmaxop(s, tcg_elt2, tcg_elt3, opcode, is_min, fpst);
|
||||
|
||||
@@ -7647,7 +7647,7 @@ static void handle_2misc_narrow(DisasContext *s, bool scalar,
|
||||
static NeonGenNarrowFn * const xtnfns[3] = {
|
||||
gen_helper_neon_narrow_u8,
|
||||
gen_helper_neon_narrow_u16,
|
||||
tcg_gen_trunc_i64_i32,
|
||||
tcg_gen_extrl_i64_i32,
|
||||
};
|
||||
static NeonGenNarrowEnvFn * const sqxtunfns[3] = {
|
||||
gen_helper_neon_unarrow_sat8,
|
||||
@@ -7681,10 +7681,10 @@ static void handle_2misc_narrow(DisasContext *s, bool scalar,
|
||||
} else {
|
||||
TCGv_i32 tcg_lo = tcg_temp_new_i32();
|
||||
TCGv_i32 tcg_hi = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(tcg_lo, tcg_op);
|
||||
tcg_gen_extrl_i64_i32(tcg_lo, tcg_op);
|
||||
gen_helper_vfp_fcvt_f32_to_f16(tcg_lo, tcg_lo, cpu_env);
|
||||
tcg_gen_shri_i64(tcg_op, tcg_op, 32);
|
||||
tcg_gen_trunc_i64_i32(tcg_hi, tcg_op);
|
||||
tcg_gen_extrl_i64_i32(tcg_hi, tcg_op);
|
||||
gen_helper_vfp_fcvt_f32_to_f16(tcg_hi, tcg_hi, cpu_env);
|
||||
tcg_gen_deposit_i32(tcg_res[pass], tcg_lo, tcg_hi, 16, 16);
|
||||
tcg_temp_free_i32(tcg_lo);
|
||||
@@ -8593,7 +8593,7 @@ static void handle_3rd_wide(DisasContext *s, int is_q, int is_u, int size,
|
||||
static void do_narrow_high_u32(TCGv_i32 res, TCGv_i64 in)
|
||||
{
|
||||
tcg_gen_shri_i64(in, in, 32);
|
||||
tcg_gen_trunc_i64_i32(res, in);
|
||||
tcg_gen_extrl_i64_i32(res, in);
|
||||
}
|
||||
|
||||
static void do_narrow_round_high_u32(TCGv_i32 res, TCGv_i64 in)
|
||||
|
||||
+23
-23
@@ -1557,7 +1557,7 @@ static inline int gen_iwmmxt_shift(uint32_t insn, uint32_t mask, TCGv_i32 dest)
|
||||
} else {
|
||||
tmp = tcg_temp_new_i32();
|
||||
iwmmxt_load_reg(cpu_V0, rd);
|
||||
tcg_gen_trunc_i64_i32(tmp, cpu_V0);
|
||||
tcg_gen_extrl_i64_i32(tmp, cpu_V0);
|
||||
}
|
||||
tcg_gen_andi_i32(tmp, tmp, mask);
|
||||
tcg_gen_mov_i32(dest, tmp);
|
||||
@@ -1581,9 +1581,9 @@ static int disas_iwmmxt_insn(DisasContext *s, uint32_t insn)
|
||||
rdhi = (insn >> 16) & 0xf;
|
||||
if (insn & ARM_CP_RW_BIT) { /* TMRRC */
|
||||
iwmmxt_load_reg(cpu_V0, wrd);
|
||||
tcg_gen_trunc_i64_i32(cpu_R[rdlo], cpu_V0);
|
||||
tcg_gen_extrl_i64_i32(cpu_R[rdlo], cpu_V0);
|
||||
tcg_gen_shri_i64(cpu_V0, cpu_V0, 32);
|
||||
tcg_gen_trunc_i64_i32(cpu_R[rdhi], cpu_V0);
|
||||
tcg_gen_extrl_i64_i32(cpu_R[rdhi], cpu_V0);
|
||||
} else { /* TMCRR */
|
||||
tcg_gen_concat_i32_i64(cpu_V0, cpu_R[rdlo], cpu_R[rdhi]);
|
||||
iwmmxt_store_reg(cpu_V0, wrd);
|
||||
@@ -1638,15 +1638,15 @@ static int disas_iwmmxt_insn(DisasContext *s, uint32_t insn)
|
||||
if (insn & (1 << 22)) { /* WSTRD */
|
||||
gen_aa32_st64(cpu_M0, addr, get_mem_index(s));
|
||||
} else { /* WSTRW wRd */
|
||||
tcg_gen_trunc_i64_i32(tmp, cpu_M0);
|
||||
tcg_gen_extrl_i64_i32(tmp, cpu_M0);
|
||||
gen_aa32_st32(tmp, addr, get_mem_index(s));
|
||||
}
|
||||
} else {
|
||||
if (insn & (1 << 22)) { /* WSTRH */
|
||||
tcg_gen_trunc_i64_i32(tmp, cpu_M0);
|
||||
tcg_gen_extrl_i64_i32(tmp, cpu_M0);
|
||||
gen_aa32_st16(tmp, addr, get_mem_index(s));
|
||||
} else { /* WSTRB */
|
||||
tcg_gen_trunc_i64_i32(tmp, cpu_M0);
|
||||
tcg_gen_extrl_i64_i32(tmp, cpu_M0);
|
||||
gen_aa32_st8(tmp, addr, get_mem_index(s));
|
||||
}
|
||||
}
|
||||
@@ -1946,7 +1946,7 @@ static int disas_iwmmxt_insn(DisasContext *s, uint32_t insn)
|
||||
switch ((insn >> 22) & 3) {
|
||||
case 0:
|
||||
tcg_gen_shri_i64(cpu_M0, cpu_M0, (insn & 7) << 3);
|
||||
tcg_gen_trunc_i64_i32(tmp, cpu_M0);
|
||||
tcg_gen_extrl_i64_i32(tmp, cpu_M0);
|
||||
if (insn & 8) {
|
||||
tcg_gen_ext8s_i32(tmp, tmp);
|
||||
} else {
|
||||
@@ -1955,7 +1955,7 @@ static int disas_iwmmxt_insn(DisasContext *s, uint32_t insn)
|
||||
break;
|
||||
case 1:
|
||||
tcg_gen_shri_i64(cpu_M0, cpu_M0, (insn & 3) << 4);
|
||||
tcg_gen_trunc_i64_i32(tmp, cpu_M0);
|
||||
tcg_gen_extrl_i64_i32(tmp, cpu_M0);
|
||||
if (insn & 8) {
|
||||
tcg_gen_ext16s_i32(tmp, tmp);
|
||||
} else {
|
||||
@@ -1964,7 +1964,7 @@ static int disas_iwmmxt_insn(DisasContext *s, uint32_t insn)
|
||||
break;
|
||||
case 2:
|
||||
tcg_gen_shri_i64(cpu_M0, cpu_M0, (insn & 1) << 5);
|
||||
tcg_gen_trunc_i64_i32(tmp, cpu_M0);
|
||||
tcg_gen_extrl_i64_i32(tmp, cpu_M0);
|
||||
break;
|
||||
}
|
||||
store_reg(s, rd, tmp);
|
||||
@@ -2627,9 +2627,9 @@ static int disas_dsp_insn(DisasContext *s, uint32_t insn)
|
||||
|
||||
if (insn & ARM_CP_RW_BIT) { /* MRA */
|
||||
iwmmxt_load_reg(cpu_V0, acc);
|
||||
tcg_gen_trunc_i64_i32(cpu_R[rdlo], cpu_V0);
|
||||
tcg_gen_extrl_i64_i32(cpu_R[rdlo], cpu_V0);
|
||||
tcg_gen_shri_i64(cpu_V0, cpu_V0, 32);
|
||||
tcg_gen_trunc_i64_i32(cpu_R[rdhi], cpu_V0);
|
||||
tcg_gen_extrl_i64_i32(cpu_R[rdhi], cpu_V0);
|
||||
tcg_gen_andi_i32(cpu_R[rdhi], cpu_R[rdhi], (1 << (40 - 32)) - 1);
|
||||
} else { /* MAR */
|
||||
tcg_gen_concat_i32_i64(cpu_V0, cpu_R[rdlo], cpu_R[rdhi]);
|
||||
@@ -2951,7 +2951,7 @@ static int handle_vcvt(uint32_t insn, uint32_t rd, uint32_t rm, uint32_t dp,
|
||||
} else {
|
||||
gen_helper_vfp_tould(tcg_res, tcg_double, tcg_shift, fpst);
|
||||
}
|
||||
tcg_gen_trunc_i64_i32(tcg_tmp, tcg_res);
|
||||
tcg_gen_extrl_i64_i32(tcg_tmp, tcg_res);
|
||||
tcg_gen_st_f32(tcg_tmp, cpu_env, vfp_reg_offset(0, rd));
|
||||
tcg_temp_free_i32(tcg_tmp);
|
||||
tcg_temp_free_i64(tcg_res);
|
||||
@@ -4683,7 +4683,7 @@ static inline void gen_neon_narrow(int size, TCGv_i32 dest, TCGv_i64 src)
|
||||
switch (size) {
|
||||
case 0: gen_helper_neon_narrow_u8(dest, src); break;
|
||||
case 1: gen_helper_neon_narrow_u16(dest, src); break;
|
||||
case 2: tcg_gen_trunc_i64_i32(dest, src); break;
|
||||
case 2: tcg_gen_extrl_i64_i32(dest, src); break;
|
||||
default: abort();
|
||||
}
|
||||
}
|
||||
@@ -6254,7 +6254,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
|
||||
break;
|
||||
case 2:
|
||||
tcg_gen_shri_i64(cpu_V0, cpu_V0, 32);
|
||||
tcg_gen_trunc_i64_i32(tmp, cpu_V0);
|
||||
tcg_gen_extrl_i64_i32(tmp, cpu_V0);
|
||||
break;
|
||||
default: abort();
|
||||
}
|
||||
@@ -6269,7 +6269,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
|
||||
case 2:
|
||||
tcg_gen_addi_i64(cpu_V0, cpu_V0, 1u << 31);
|
||||
tcg_gen_shri_i64(cpu_V0, cpu_V0, 32);
|
||||
tcg_gen_trunc_i64_i32(tmp, cpu_V0);
|
||||
tcg_gen_extrl_i64_i32(tmp, cpu_V0);
|
||||
break;
|
||||
default: abort();
|
||||
}
|
||||
@@ -7224,11 +7224,11 @@ static int disas_coproc_insn(DisasContext *s, uint32_t insn)
|
||||
tcg_gen_ld_i64(tmp64, cpu_env, ri->fieldoffset);
|
||||
}
|
||||
tmp = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(tmp, tmp64);
|
||||
tcg_gen_extrl_i64_i32(tmp, tmp64);
|
||||
store_reg(s, rt, tmp);
|
||||
tcg_gen_shri_i64(tmp64, tmp64, 32);
|
||||
tmp = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(tmp, tmp64);
|
||||
tcg_gen_extrl_i64_i32(tmp, tmp64);
|
||||
tcg_temp_free_i64(tmp64);
|
||||
store_reg(s, rt2, tmp);
|
||||
} else {
|
||||
@@ -7334,11 +7334,11 @@ static void gen_storeq_reg(DisasContext *s, int rlow, int rhigh, TCGv_i64 val)
|
||||
{
|
||||
TCGv_i32 tmp;
|
||||
tmp = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(tmp, val);
|
||||
tcg_gen_extrl_i64_i32(tmp, val);
|
||||
store_reg(s, rlow, tmp);
|
||||
tmp = tcg_temp_new_i32();
|
||||
tcg_gen_shri_i64(val, val, 32);
|
||||
tcg_gen_trunc_i64_i32(tmp, val);
|
||||
tcg_gen_extrl_i64_i32(tmp, val);
|
||||
store_reg(s, rhigh, tmp);
|
||||
}
|
||||
|
||||
@@ -8013,7 +8013,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
|
||||
tmp64 = gen_muls_i64_i32(tmp, tmp2);
|
||||
tcg_gen_shri_i64(tmp64, tmp64, 16);
|
||||
tmp = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(tmp, tmp64);
|
||||
tcg_gen_extrl_i64_i32(tmp, tmp64);
|
||||
tcg_temp_free_i64(tmp64);
|
||||
if ((sh & 2) == 0) {
|
||||
tmp2 = load_reg(s, rn);
|
||||
@@ -8679,7 +8679,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
|
||||
}
|
||||
tcg_gen_shri_i64(tmp64, tmp64, 32);
|
||||
tmp = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(tmp, tmp64);
|
||||
tcg_gen_extrl_i64_i32(tmp, tmp64);
|
||||
tcg_temp_free_i64(tmp64);
|
||||
store_reg(s, rn, tmp);
|
||||
break;
|
||||
@@ -9749,7 +9749,7 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
|
||||
tmp64 = gen_muls_i64_i32(tmp, tmp2);
|
||||
tcg_gen_shri_i64(tmp64, tmp64, 16);
|
||||
tmp = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(tmp, tmp64);
|
||||
tcg_gen_extrl_i64_i32(tmp, tmp64);
|
||||
tcg_temp_free_i64(tmp64);
|
||||
if (rs != 15)
|
||||
{
|
||||
@@ -9773,7 +9773,7 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
|
||||
}
|
||||
tcg_gen_shri_i64(tmp64, tmp64, 32);
|
||||
tmp = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(tmp, tmp64);
|
||||
tcg_gen_extrl_i64_i32(tmp, tmp64);
|
||||
tcg_temp_free_i64(tmp64);
|
||||
break;
|
||||
case 7: /* Unsigned sum of absolute differences. */
|
||||
|
||||
@@ -2604,9 +2604,9 @@ static int dec_movem_mr(CPUCRISState *env, DisasContext *dc)
|
||||
tcg_temp_free(addr);
|
||||
|
||||
for (i = 0; i < (nr >> 1); i++) {
|
||||
tcg_gen_trunc_i64_i32(cpu_R[i * 2], tmp[i]);
|
||||
tcg_gen_extrl_i64_i32(cpu_R[i * 2], tmp[i]);
|
||||
tcg_gen_shri_i64(tmp[i], tmp[i], 32);
|
||||
tcg_gen_trunc_i64_i32(cpu_R[i * 2 + 1], tmp[i]);
|
||||
tcg_gen_extrl_i64_i32(cpu_R[i * 2 + 1], tmp[i]);
|
||||
tcg_temp_free_i64(tmp[i]);
|
||||
}
|
||||
if (nr & 1) {
|
||||
|
||||
@@ -2680,7 +2680,7 @@ DISAS_INSN(from_mac)
|
||||
if (s->env->macsr & MACSR_FI) {
|
||||
gen_helper_get_macf(rx, cpu_env, acc);
|
||||
} else if ((s->env->macsr & MACSR_OMC) == 0) {
|
||||
tcg_gen_trunc_i64_i32(rx, acc);
|
||||
tcg_gen_extrl_i64_i32(rx, acc);
|
||||
} else if (s->env->macsr & MACSR_SU) {
|
||||
gen_helper_get_macs(rx, acc);
|
||||
} else {
|
||||
|
||||
@@ -598,9 +598,9 @@ static void t_gen_muls(TCGv d, TCGv d2, TCGv a, TCGv b)
|
||||
tcg_gen_ext_i32_i64(t1, b);
|
||||
tcg_gen_mul_i64(t0, t0, t1);
|
||||
|
||||
tcg_gen_trunc_i64_i32(d, t0);
|
||||
tcg_gen_extrl_i64_i32(d, t0);
|
||||
tcg_gen_shri_i64(t0, t0, 32);
|
||||
tcg_gen_trunc_i64_i32(d2, t0);
|
||||
tcg_gen_extrl_i64_i32(d2, t0);
|
||||
|
||||
tcg_temp_free_i64(t0);
|
||||
tcg_temp_free_i64(t1);
|
||||
@@ -618,9 +618,9 @@ static void t_gen_mulu(TCGv d, TCGv d2, TCGv a, TCGv b)
|
||||
tcg_gen_extu_i32_i64(t1, b);
|
||||
tcg_gen_mul_i64(t0, t0, t1);
|
||||
|
||||
tcg_gen_trunc_i64_i32(d, t0);
|
||||
tcg_gen_extrl_i64_i32(d, t0);
|
||||
tcg_gen_shri_i64(t0, t0, 32);
|
||||
tcg_gen_trunc_i64_i32(d2, t0);
|
||||
tcg_gen_extrl_i64_i32(d2, t0);
|
||||
|
||||
tcg_temp_free_i64(t0);
|
||||
tcg_temp_free_i64(t1);
|
||||
|
||||
@@ -1629,7 +1629,7 @@ static void gen_load_fpr32(DisasContext *ctx, TCGv_i32 t, int reg)
|
||||
if (ctx->hflags & MIPS_HFLAG_FRE) {
|
||||
generate_exception(ctx, EXCP_RI);
|
||||
}
|
||||
tcg_gen_trunc_i64_i32(t, fpu_f64[reg]);
|
||||
tcg_gen_extrl_i64_i32(t, fpu_f64[reg]);
|
||||
}
|
||||
|
||||
static void gen_store_fpr32(DisasContext *ctx, TCGv_i32 t, int reg)
|
||||
@@ -1649,7 +1649,7 @@ static void gen_load_fpr32h(DisasContext *ctx, TCGv_i32 t, int reg)
|
||||
if (ctx->hflags & MIPS_HFLAG_F64) {
|
||||
TCGv_i64 t64 = tcg_temp_new_i64();
|
||||
tcg_gen_shri_i64(t64, fpu_f64[reg], 32);
|
||||
tcg_gen_trunc_i64_i32(t, t64);
|
||||
tcg_gen_extrl_i64_i32(t, t64);
|
||||
tcg_temp_free_i64(t64);
|
||||
} else {
|
||||
gen_load_fpr32(ctx, t, reg | 1);
|
||||
|
||||
+11
-11
@@ -279,7 +279,7 @@ static void dec_calc(DisasContext *dc, uint32_t insn)
|
||||
tcg_gen_extu_i32_i64(ta, cpu_R[ra]);
|
||||
tcg_gen_extu_i32_i64(tb, cpu_R[rb]);
|
||||
tcg_gen_add_i64(td, ta, tb);
|
||||
tcg_gen_trunc_i64_i32(res, td);
|
||||
tcg_gen_extrl_i64_i32(res, td);
|
||||
tcg_gen_shri_i64(td, td, 31);
|
||||
tcg_gen_andi_i64(td, td, 0x3);
|
||||
/* Jump to lab when no overflow. */
|
||||
@@ -324,7 +324,7 @@ static void dec_calc(DisasContext *dc, uint32_t insn)
|
||||
tcg_gen_shri_i64(tcy, tcy, 10);
|
||||
tcg_gen_add_i64(td, ta, tb);
|
||||
tcg_gen_add_i64(td, td, tcy);
|
||||
tcg_gen_trunc_i64_i32(res, td);
|
||||
tcg_gen_extrl_i64_i32(res, td);
|
||||
tcg_gen_shri_i64(td, td, 32);
|
||||
tcg_gen_andi_i64(td, td, 0x3);
|
||||
/* Jump to lab when no overflow. */
|
||||
@@ -366,7 +366,7 @@ static void dec_calc(DisasContext *dc, uint32_t insn)
|
||||
tcg_gen_extu_i32_i64(ta, cpu_R[ra]);
|
||||
tcg_gen_extu_i32_i64(tb, cpu_R[rb]);
|
||||
tcg_gen_sub_i64(td, ta, tb);
|
||||
tcg_gen_trunc_i64_i32(res, td);
|
||||
tcg_gen_extrl_i64_i32(res, td);
|
||||
tcg_gen_shri_i64(td, td, 31);
|
||||
tcg_gen_andi_i64(td, td, 0x3);
|
||||
/* Jump to lab when no overflow. */
|
||||
@@ -779,9 +779,9 @@ static void dec_misc(DisasContext *dc, uint32_t insn)
|
||||
tcg_gen_ext_i32_i64(t1, dst);
|
||||
tcg_gen_concat_i32_i64(t2, maclo, machi);
|
||||
tcg_gen_add_i64(t2, t2, t1);
|
||||
tcg_gen_trunc_i64_i32(maclo, t2);
|
||||
tcg_gen_extrl_i64_i32(maclo, t2);
|
||||
tcg_gen_shri_i64(t2, t2, 32);
|
||||
tcg_gen_trunc_i64_i32(machi, t2);
|
||||
tcg_gen_extrl_i64_i32(machi, t2);
|
||||
tcg_temp_free_i32(dst);
|
||||
tcg_temp_free(ttmp);
|
||||
tcg_temp_free_i64(t1);
|
||||
@@ -898,7 +898,7 @@ static void dec_misc(DisasContext *dc, uint32_t insn)
|
||||
TCGv_i32 sr_ove = tcg_temp_local_new_i32();
|
||||
tcg_gen_extu_i32_i64(ta, cpu_R[ra]);
|
||||
tcg_gen_addi_i64(td, ta, sign_extend(I16, 16));
|
||||
tcg_gen_trunc_i64_i32(res, td);
|
||||
tcg_gen_extrl_i64_i32(res, td);
|
||||
tcg_gen_shri_i64(td, td, 32);
|
||||
tcg_gen_andi_i64(td, td, 0x3);
|
||||
/* Jump to lab when no overflow. */
|
||||
@@ -934,7 +934,7 @@ static void dec_misc(DisasContext *dc, uint32_t insn)
|
||||
tcg_gen_extu_i32_i64(tcy, sr_cy);
|
||||
tcg_gen_addi_i64(td, ta, sign_extend(I16, 16));
|
||||
tcg_gen_add_i64(td, td, tcy);
|
||||
tcg_gen_trunc_i64_i32(res, td);
|
||||
tcg_gen_extrl_i64_i32(res, td);
|
||||
tcg_gen_shri_i64(td, td, 32);
|
||||
tcg_gen_andi_i64(td, td, 0x3);
|
||||
/* Jump to lab when no overflow. */
|
||||
@@ -1073,9 +1073,9 @@ static void dec_mac(DisasContext *dc, uint32_t insn)
|
||||
tcg_gen_ext_i32_i64(t1, t0);
|
||||
tcg_gen_concat_i32_i64(t2, maclo, machi);
|
||||
tcg_gen_add_i64(t2, t2, t1);
|
||||
tcg_gen_trunc_i64_i32(maclo, t2);
|
||||
tcg_gen_extrl_i64_i32(maclo, t2);
|
||||
tcg_gen_shri_i64(t2, t2, 32);
|
||||
tcg_gen_trunc_i64_i32(machi, t2);
|
||||
tcg_gen_extrl_i64_i32(machi, t2);
|
||||
tcg_temp_free_i32(t0);
|
||||
tcg_temp_free_i64(t1);
|
||||
tcg_temp_free_i64(t2);
|
||||
@@ -1092,9 +1092,9 @@ static void dec_mac(DisasContext *dc, uint32_t insn)
|
||||
tcg_gen_ext_i32_i64(t1, t0);
|
||||
tcg_gen_concat_i32_i64(t2, maclo, machi);
|
||||
tcg_gen_sub_i64(t2, t2, t1);
|
||||
tcg_gen_trunc_i64_i32(maclo, t2);
|
||||
tcg_gen_extrl_i64_i32(maclo, t2);
|
||||
tcg_gen_shri_i64(t2, t2, 32);
|
||||
tcg_gen_trunc_i64_i32(machi, t2);
|
||||
tcg_gen_extrl_i64_i32(machi, t2);
|
||||
tcg_temp_free_i32(t0);
|
||||
tcg_temp_free_i64(t1);
|
||||
tcg_temp_free_i64(t2);
|
||||
|
||||
+15
-15
@@ -811,7 +811,7 @@ static void disas_jcc(DisasContext *s, DisasCompare *c, uint32_t mask)
|
||||
case CC_OP_LTGT0_32:
|
||||
c->is_64 = false;
|
||||
c->u.s32.a = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(c->u.s32.a, cc_dst);
|
||||
tcg_gen_extrl_i64_i32(c->u.s32.a, cc_dst);
|
||||
c->u.s32.b = tcg_const_i32(0);
|
||||
break;
|
||||
case CC_OP_LTGT_32:
|
||||
@@ -819,9 +819,9 @@ static void disas_jcc(DisasContext *s, DisasCompare *c, uint32_t mask)
|
||||
case CC_OP_SUBU_32:
|
||||
c->is_64 = false;
|
||||
c->u.s32.a = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(c->u.s32.a, cc_src);
|
||||
tcg_gen_extrl_i64_i32(c->u.s32.a, cc_src);
|
||||
c->u.s32.b = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(c->u.s32.b, cc_dst);
|
||||
tcg_gen_extrl_i64_i32(c->u.s32.b, cc_dst);
|
||||
break;
|
||||
|
||||
case CC_OP_LTGT0_64:
|
||||
@@ -851,11 +851,11 @@ static void disas_jcc(DisasContext *s, DisasCompare *c, uint32_t mask)
|
||||
c->is_64 = false;
|
||||
c->u.s32.a = tcg_temp_new_i32();
|
||||
c->u.s32.b = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(c->u.s32.a, cc_vr);
|
||||
tcg_gen_extrl_i64_i32(c->u.s32.a, cc_vr);
|
||||
if (cond == TCG_COND_EQ || cond == TCG_COND_NE) {
|
||||
tcg_gen_movi_i32(c->u.s32.b, 0);
|
||||
} else {
|
||||
tcg_gen_trunc_i64_i32(c->u.s32.b, cc_src);
|
||||
tcg_gen_extrl_i64_i32(c->u.s32.b, cc_src);
|
||||
}
|
||||
break;
|
||||
|
||||
@@ -1532,7 +1532,7 @@ static ExitStatus op_bct32(DisasContext *s, DisasOps *o)
|
||||
store_reg32_i64(r1, t);
|
||||
c.u.s32.a = tcg_temp_new_i32();
|
||||
c.u.s32.b = tcg_const_i32(0);
|
||||
tcg_gen_trunc_i64_i32(c.u.s32.a, t);
|
||||
tcg_gen_extrl_i64_i32(c.u.s32.a, t);
|
||||
tcg_temp_free_i64(t);
|
||||
|
||||
return help_branch(s, &c, is_imm, imm, o->in2);
|
||||
@@ -1556,7 +1556,7 @@ static ExitStatus op_bcth(DisasContext *s, DisasOps *o)
|
||||
store_reg32h_i64(r1, t);
|
||||
c.u.s32.a = tcg_temp_new_i32();
|
||||
c.u.s32.b = tcg_const_i32(0);
|
||||
tcg_gen_trunc_i64_i32(c.u.s32.a, t);
|
||||
tcg_gen_extrl_i64_i32(c.u.s32.a, t);
|
||||
tcg_temp_free_i64(t);
|
||||
|
||||
return help_branch(s, &c, 1, imm, o->in2);
|
||||
@@ -1599,8 +1599,8 @@ static ExitStatus op_bx32(DisasContext *s, DisasOps *o)
|
||||
tcg_gen_add_i64(t, regs[r1], regs[r3]);
|
||||
c.u.s32.a = tcg_temp_new_i32();
|
||||
c.u.s32.b = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(c.u.s32.a, t);
|
||||
tcg_gen_trunc_i64_i32(c.u.s32.b, regs[r3 | 1]);
|
||||
tcg_gen_extrl_i64_i32(c.u.s32.a, t);
|
||||
tcg_gen_extrl_i64_i32(c.u.s32.b, regs[r3 | 1]);
|
||||
store_reg32_i64(r1, t);
|
||||
tcg_temp_free_i64(t);
|
||||
|
||||
@@ -1905,7 +1905,7 @@ static ExitStatus op_clm(DisasContext *s, DisasOps *o)
|
||||
{
|
||||
TCGv_i32 m3 = tcg_const_i32(get_field(s->fields, m3));
|
||||
TCGv_i32 t1 = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(t1, o->in1);
|
||||
tcg_gen_extrl_i64_i32(t1, o->in1);
|
||||
potential_page_fault(s);
|
||||
gen_helper_clm(cc_op, cpu_env, t1, m3, o->in2);
|
||||
set_cc_static(s);
|
||||
@@ -1977,7 +1977,7 @@ static ExitStatus op_cs(DisasContext *s, DisasOps *o)
|
||||
|
||||
/* Store CC back to cc_op. Wait until after the store so that any
|
||||
exception gets the old cc_op value. */
|
||||
tcg_gen_trunc_i64_i32(cc_op, cc);
|
||||
tcg_gen_extrl_i64_i32(cc_op, cc);
|
||||
tcg_temp_free_i64(cc);
|
||||
set_cc_static(s);
|
||||
return NO_EXIT;
|
||||
@@ -2027,7 +2027,7 @@ static ExitStatus op_cdsg(DisasContext *s, DisasOps *o)
|
||||
/* Save back state now that we've passed all exceptions. */
|
||||
tcg_gen_mov_i64(regs[r1], outh);
|
||||
tcg_gen_mov_i64(regs[r1 + 1], outl);
|
||||
tcg_gen_trunc_i64_i32(cc_op, cc);
|
||||
tcg_gen_extrl_i64_i32(cc_op, cc);
|
||||
tcg_temp_free_i64(outh);
|
||||
tcg_temp_free_i64(outl);
|
||||
tcg_temp_free_i64(cc);
|
||||
@@ -2051,7 +2051,7 @@ static ExitStatus op_cvd(DisasContext *s, DisasOps *o)
|
||||
{
|
||||
TCGv_i64 t1 = tcg_temp_new_i64();
|
||||
TCGv_i32 t2 = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(t2, o->in1);
|
||||
tcg_gen_extrl_i64_i32(t2, o->in1);
|
||||
gen_helper_cvd(t1, t2);
|
||||
tcg_temp_free_i32(t2);
|
||||
tcg_gen_qemu_st64(t1, o->in2, get_mem_index(s));
|
||||
@@ -3235,8 +3235,8 @@ static ExitStatus op_rll32(DisasContext *s, DisasOps *o)
|
||||
TCGv_i32 t1 = tcg_temp_new_i32();
|
||||
TCGv_i32 t2 = tcg_temp_new_i32();
|
||||
TCGv_i32 to = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(t1, o->in1);
|
||||
tcg_gen_trunc_i64_i32(t2, o->in2);
|
||||
tcg_gen_extrl_i64_i32(t1, o->in1);
|
||||
tcg_gen_extrl_i64_i32(t2, o->in2);
|
||||
tcg_gen_rotl_i32(to, t1, t2);
|
||||
tcg_gen_extu_i32_i64(o->out, to);
|
||||
tcg_temp_free_i32(t1);
|
||||
|
||||
@@ -288,10 +288,10 @@ static inline void gen_load_fpr64(TCGv_i64 t, int reg)
|
||||
static inline void gen_store_fpr64 (TCGv_i64 t, int reg)
|
||||
{
|
||||
TCGv_i32 tmp = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(tmp, t);
|
||||
tcg_gen_extrl_i64_i32(tmp, t);
|
||||
tcg_gen_mov_i32(cpu_fregs[reg + 1], tmp);
|
||||
tcg_gen_shri_i64(t, t, 32);
|
||||
tcg_gen_trunc_i64_i32(tmp, t);
|
||||
tcg_gen_extrl_i64_i32(tmp, t);
|
||||
tcg_gen_mov_i32(cpu_fregs[reg], tmp);
|
||||
tcg_temp_free_i32(tmp);
|
||||
}
|
||||
|
||||
@@ -164,7 +164,7 @@ static TCGv_i32 gen_load_fpr_F(DisasContext *dc, unsigned int src)
|
||||
TCGv_i64 t = tcg_temp_new_i64();
|
||||
|
||||
tcg_gen_shri_i64(t, cpu_fpr[src / 2], 32);
|
||||
tcg_gen_trunc_i64_i32(ret, t);
|
||||
tcg_gen_extrl_i64_i32(ret, t);
|
||||
tcg_temp_free_i64(t);
|
||||
|
||||
return ret;
|
||||
@@ -379,8 +379,8 @@ static TCGv_i32 gen_add32_carry32(void)
|
||||
#if TARGET_LONG_BITS == 64
|
||||
cc_src1_32 = tcg_temp_new_i32();
|
||||
cc_src2_32 = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(cc_src1_32, cpu_cc_dst);
|
||||
tcg_gen_trunc_i64_i32(cc_src2_32, cpu_cc_src);
|
||||
tcg_gen_extrl_i64_i32(cc_src1_32, cpu_cc_dst);
|
||||
tcg_gen_extrl_i64_i32(cc_src2_32, cpu_cc_src);
|
||||
#else
|
||||
cc_src1_32 = cpu_cc_dst;
|
||||
cc_src2_32 = cpu_cc_src;
|
||||
@@ -405,8 +405,8 @@ static TCGv_i32 gen_sub32_carry32(void)
|
||||
#if TARGET_LONG_BITS == 64
|
||||
cc_src1_32 = tcg_temp_new_i32();
|
||||
cc_src2_32 = tcg_temp_new_i32();
|
||||
tcg_gen_trunc_i64_i32(cc_src1_32, cpu_cc_src);
|
||||
tcg_gen_trunc_i64_i32(cc_src2_32, cpu_cc_src2);
|
||||
tcg_gen_extrl_i64_i32(cc_src1_32, cpu_cc_src);
|
||||
tcg_gen_extrl_i64_i32(cc_src2_32, cpu_cc_src2);
|
||||
#else
|
||||
cc_src1_32 = cpu_cc_src;
|
||||
cc_src2_32 = cpu_cc_src2;
|
||||
@@ -2254,11 +2254,11 @@ static void gen_fmovs(DisasContext *dc, DisasCompare *cmp, int rd, int rs)
|
||||
the later. */
|
||||
c32 = tcg_temp_new_i32();
|
||||
if (cmp->is_bool) {
|
||||
tcg_gen_trunc_i64_i32(c32, cmp->c1);
|
||||
tcg_gen_extrl_i64_i32(c32, cmp->c1);
|
||||
} else {
|
||||
TCGv_i64 c64 = tcg_temp_new_i64();
|
||||
tcg_gen_setcond_i64(cmp->cond, c64, cmp->c1, cmp->c2);
|
||||
tcg_gen_trunc_i64_i32(c32, c64);
|
||||
tcg_gen_extrl_i64_i32(c32, c64);
|
||||
tcg_temp_free_i64(c64);
|
||||
}
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user