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target/microblaze: Have do_load/store() take a TCGv_i32 address argument

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All callers of do_load() and do_store() pass a TCGv_i32 address
type, have both functions take a TCGv_i32.

Suggested-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20251015180115.97493-7-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé
2025-10-16 17:07:27 +02:00
parent 1bf79694bc
commit 2c12ba4d8b
1 changed files with 4 additions and 4 deletions
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target/microblaze/translate.c
+4 -4
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@@ -708,7 +708,7 @@ static inline MemOp mo_endian(DisasContext *dc)
return dc->cfg->endi ? MO_LE : MO_BE;
}
static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop,
static bool do_load(DisasContext *dc, int rd, TCGv_i32 addr, MemOp mop,
int mem_index, bool rev)
{
MemOp size = mop & MO_SIZE;
@@ -726,7 +726,7 @@ static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop,
mop ^= MO_BSWAP;
}
if (size < MO_32) {
tcg_gen_xori_tl(addr, addr, 3 - size);
tcg_gen_xori_i32(addr, addr, 3 - size);
}
}
@@ -868,7 +868,7 @@ static bool trans_lwx(DisasContext *dc, arg_typea *arg)
return true;
}
static bool do_store(DisasContext *dc, int rd, TCGv addr, MemOp mop,
static bool do_store(DisasContext *dc, int rd, TCGv_i32 addr, MemOp mop,
int mem_index, bool rev)
{
MemOp size = mop & MO_SIZE;
@@ -886,7 +886,7 @@ static bool do_store(DisasContext *dc, int rd, TCGv addr, MemOp mop,
mop ^= MO_BSWAP;
}
if (size < MO_32) {
tcg_gen_xori_tl(addr, addr, 3 - size);
tcg_gen_xori_i32(addr, addr, 3 - size);
}
}