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Merge remote-tracking branch 'rth/tcg-ppc-pull' into staging
# By Richard Henderson (19) and Paolo Bonzini (2) # Via Richard Henderson * rth/tcg-ppc-pull: (21 commits) tcg-ppc64: Implement CONFIG_QEMU_LDST_OPTIMIZATION tcg-ppc64: Add _noaddr functions for emitting forward branches tcg-ppc64: Streamline tcg_out_tlb_read tcg-ppc64: Implement tcg_register_jit tcg-ppc64: Handle long offsets better tcg-ppc64: Tidy register allocation order tcg-ppc64: Look through a constant function descriptor tcg-ppc64: Fold constant call address into descriptor load tcg-ppc64: Don't load the static chain from TCG tcg-ppc64: Avoid code for nop move tcg-ppc64: Use tcg_out64 tcg-ppc64: Use TCG_REG_Rn constants tcg-ppc64: More use of TAI and SAI helper macros tcg-ppc64: Reformat tcg-target.c tcg-ppc: Fix and cleanup tcg_out_tlb_check tcg-ppc: Use conditional branch and link to slow path tcg-ppc: Cleanup tcg_out_qemu_ld/st_slow_path tcg-ppc: Avoid code for nop move tcg-ppc: use new return-argument ld/st helpers tcg-ppc: fix qemu_ld/qemu_st for AIX ABI ... Message-id: 1380126458-3247-1-git-send-email-rth@twiddle.net
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@@ -978,6 +978,14 @@ for opt do
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done
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case "$cpu" in
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ppc)
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CPU_CFLAGS="-m32"
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LDFLAGS="-m32 $LDFLAGS"
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;;
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ppc64)
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CPU_CFLAGS="-m64"
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LDFLAGS="-m64 $LDFLAGS"
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;;
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sparc)
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LDFLAGS="-m32 $LDFLAGS"
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CPU_CFLAGS="-m32 -mcpu=ultrasparc"
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@@ -3787,7 +3795,7 @@ echo "libs_softmmu=$libs_softmmu" >> $config_host_mak
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echo "ARCH=$ARCH" >> $config_host_mak
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case "$cpu" in
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arm|i386|x86_64|x32|ppc|aarch64)
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aarch64 | arm | i386 | x86_64 | x32 | ppc*)
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# The TCG interpreter currently does not support ld/st optimization.
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if test "$tcg_interpreter" = "no" ; then
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echo "CONFIG_QEMU_LDST_OPTIMIZATION=y" >> $config_host_mak
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@@ -324,9 +324,7 @@ extern uintptr_t tci_tb_ptr;
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In some implementations, we pass the "logical" return address manually;
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in others, we must infer the logical return from the true return. */
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#if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
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# if defined (_ARCH_PPC) && !defined (_ARCH_PPC64)
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# define GETRA_LDST(RA) (*(int32_t *)((RA) - 4))
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# elif defined(__arm__)
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# if defined(__arm__)
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/* We define two insns between the return address and the branch back to
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straight-line. Find and decode that branch insn. */
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# define GETRA_LDST(RA) tcg_getra_ldst(RA)
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+211
-283
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Load Diff
+623
-502
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Load Diff
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