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hw/riscv/virt: Use setprop_sized_cells for pcie
The current device tree property uses two cells for the address (and for the size), but assumes the they are less than 32 bits by hard coding the high cell to zero. Use qemu_fdt_setprop_sized_cells to do the job of splitting the upper and lower 32 bits across cells. Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Message-ID: <20250604025450.85327-13-joel@jms.id.au> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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Alistair Francis
parent
0e7e0ee639
commit
2454fc95ec
+2
-2
@@ -894,8 +894,8 @@ static void create_fdt_pcie(RISCVVirtState *s,
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if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) {
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qemu_fdt_setprop_cell(ms->fdt, name, "msi-parent", msi_pcie_phandle);
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}
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qemu_fdt_setprop_cells(ms->fdt, name, "reg", 0,
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s->memmap[VIRT_PCIE_ECAM].base, 0, s->memmap[VIRT_PCIE_ECAM].size);
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qemu_fdt_setprop_sized_cells(ms->fdt, name, "reg", 2,
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s->memmap[VIRT_PCIE_ECAM].base, 2, s->memmap[VIRT_PCIE_ECAM].size);
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qemu_fdt_setprop_sized_cells(ms->fdt, name, "ranges",
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1, FDT_PCI_RANGE_IOPORT, 2, 0,
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2, s->memmap[VIRT_PCIE_PIO].base, 2, s->memmap[VIRT_PCIE_PIO].size,
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