Rename cpu_reset() to cpu_state_reset()

Frees the identifier cpu_reset for QOM CPUs (manual rename).

Don't hide the parameter type behind explicit casts, use static
functions with strongly typed argument to indirect.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Andreas Färber
2012-03-14 22:20:24 +01:00
parent fc0b2c0f1a
commit 1bba0dc932
48 changed files with 98 additions and 61 deletions
+1 -1
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@@ -917,7 +917,7 @@ int main(int argc, char **argv)
exit(1);
}
#if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
cpu_reset(env);
cpu_state_reset(env);
#endif
thread_env = env;
+1 -1
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@@ -433,7 +433,7 @@ void cpu_watchpoint_remove_all(CPUState *env, int mask);
#define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
void cpu_single_step(CPUState *env, int enabled);
void cpu_reset(CPUState *s);
void cpu_state_reset(CPUState *s);
int cpu_is_stopped(CPUState *env);
void run_on_cpu(CPUState *env, void (*func)(void *data), void *data);
+1 -1
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@@ -340,7 +340,7 @@ int cpu_exec(CPUState *env)
}
#elif defined(TARGET_PPC)
if ((interrupt_request & CPU_INTERRUPT_RESET)) {
cpu_reset(env);
cpu_state_reset(env);
}
if (interrupt_request & CPU_INTERRUPT_HARD) {
ppc_hw_interrupt(env);
+1 -1
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@@ -858,7 +858,7 @@ int main(int argc, char **argv)
/* NOTE: we need to init the CPU at this stage to get
qemu_host_page_size */
env = cpu_init(cpu_model);
cpu_reset(env);
cpu_state_reset(env);
printf("Starting %s with qemu\n----------------\n", filename);
+1 -1
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@@ -277,7 +277,7 @@ static void do_cpu_reset(void *opaque)
CPUState *env = opaque;
const struct arm_boot_info *info = env->boot_info;
cpu_reset(env);
cpu_state_reset(env);
if (info) {
if (!info->is_linux) {
/* Jump to the entry point. */
+1 -1
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@@ -149,7 +149,7 @@ static void armv7m_bitband_init(void)
static void armv7m_reset(void *opaque)
{
cpu_reset((CPUState *)opaque);
cpu_state_reset((CPUState *)opaque);
}
/* Init CPU and memory for a v7-M based board.
+1 -1
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@@ -34,7 +34,7 @@ static void main_cpu_reset(void *opaque)
li = env->load_info;
cpu_reset(env);
cpu_state_reset(env);
if (!li) {
/* nothing more to do. */
+1 -1
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@@ -51,7 +51,7 @@ static void main_cpu_reset(void *opaque)
ResetData *s = (ResetData *)opaque;
CPUState *env = s->env;
cpu_reset(env);
cpu_state_reset(env);
env->halted = 0;
env->pc = s->entry;
+1 -1
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@@ -56,7 +56,7 @@ static void main_cpu_reset(void *opaque)
ResetInfo *reset_info = opaque;
CPUState *env = reset_info->env;
cpu_reset(env);
cpu_state_reset(env);
/* init defaults */
env->pc = (uint32_t)reset_info->bootstrap_pc;
+1 -1
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@@ -45,7 +45,7 @@ static void main_cpu_reset(void *opaque)
{
CPUState *env = opaque;
cpu_reset(env);
cpu_state_reset(env);
env->regs[5] = boot_info.cmdline;
env->regs[7] = boot_info.fdt;
env->sregs[SR_PC] = boot_info.bootstrap_pc;
+1 -1
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@@ -61,7 +61,7 @@ static void main_cpu_reset(void *opaque)
ResetInfo *reset_info = opaque;
CPUState *env = reset_info->env;
cpu_reset(env);
cpu_state_reset(env);
/* init defaults */
env->pc = reset_info->bootstrap_pc;
+1 -1
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@@ -200,7 +200,7 @@ static void main_cpu_reset(void *opaque)
{
CPUState *env = opaque;
cpu_reset(env);
cpu_state_reset(env);
/* TODO: 2E reset stuff */
if (loaderparams.kernel_filename) {
env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
+1 -1
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@@ -51,7 +51,7 @@ enum jazz_model_e
static void main_cpu_reset(void *opaque)
{
CPUState *env = opaque;
cpu_reset(env);
cpu_state_reset(env);
}
static uint64_t rtc_read(void *opaque, target_phys_addr_t addr, unsigned size)
+1 -1
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@@ -745,7 +745,7 @@ static void malta_mips_config(CPUState *env)
static void main_cpu_reset(void *opaque)
{
CPUState *env = opaque;
cpu_reset(env);
cpu_state_reset(env);
/* The bootloader does not need to be rewritten as it is located in a
read only location. The kernel location and the arguments table
+1 -1
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@@ -107,7 +107,7 @@ static void main_cpu_reset(void *opaque)
ResetData *s = (ResetData *)opaque;
CPUState *env = s->env;
cpu_reset(env);
cpu_state_reset(env);
env->active_tc.PC = s->vector & ~(target_ulong)1;
if (s->vector & 1) {
env->hflags |= MIPS_HFLAG_M16;
+1 -1
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@@ -145,7 +145,7 @@ static void main_cpu_reset(void *opaque)
ResetData *s = (ResetData *)opaque;
CPUState *env = s->env;
cpu_reset(env);
cpu_state_reset(env);
env->active_tc.PC = s->vector;
}
+1 -1
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@@ -3702,7 +3702,7 @@ static void omap1_mpu_reset(void *opaque)
omap_lpg_reset(mpu->led[0]);
omap_lpg_reset(mpu->led[1]);
omap_clkm_reset(mpu);
cpu_reset(mpu->env);
cpu_state_reset(mpu->env);
}
static const struct omap_map_s {
+1 -1
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@@ -2224,7 +2224,7 @@ static void omap2_mpu_reset(void *opaque)
omap_mcspi_reset(mpu->mcspi[1]);
omap_i2c_reset(mpu->i2c[0]);
omap_i2c_reset(mpu->i2c[1]);
cpu_reset(mpu->env);
cpu_state_reset(mpu->env);
}
static int omap2_validate_addr(struct omap_mpu_state_s *s,
+1 -1
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@@ -928,7 +928,7 @@ static void pc_cpu_reset(void *opaque)
{
CPUState *env = opaque;
cpu_reset(env);
cpu_state_reset(env);
env->halted = !cpu_is_bsp(env);
}
+1 -1
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@@ -147,7 +147,7 @@ static void main_cpu_reset(void *opaque)
{
CPUState *env = opaque;
cpu_reset(env);
cpu_state_reset(env);
env->gpr[1] = (16<<20) - 8;
env->gpr[3] = FDT_ADDR;
env->nip = entry;

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