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Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190607-2' into staging

Browse Source 
s390x updates:
- tcg: finalize implementation for the vector facility and
  add it to the 'qemu' cpu model
- linux-user: properly generate ELF_HWCAP

# gpg: Signature made Fri 07 Jun 2019 15:14:42 BST
# gpg:                using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02FAF
# gpg:                issuer "cohuck@redhat.com"
# gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" [unknown]
# gpg:                 aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" [full]
# gpg:                 aka "Cornelia Huck <cornelia.huck@de.ibm.com>" [full]
# gpg:                 aka "Cornelia Huck <cohuck@kernel.org>" [unknown]
# gpg:                 aka "Cornelia Huck <cohuck@redhat.com>" [unknown]
# Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0  18CE DECF 6B93 C6F0 2FAF

* remotes/cohuck/tags/s390x-20190607-2: (34 commits)
  linux-user: elf: ELF_HWCAP for s390x
  s390x/tcg: Use tcg_gen_gvec_bitsel for VECTOR SELECT
  s390x: Bump the "qemu" CPU model up to a stripped-down z13
  s390x/tcg: We support the Vector Facility
  s390x/tcg: Allow linux-user to use vector instructions
  s390x/tcg: Implement VECTOR FP TEST DATA CLASS IMMEDIATE
  s390x/tcg: Implement VECTOR FP SUBTRACT
  s390x/tcg: Implement VECTOR FP SQUARE ROOT
  s390x/tcg: Implement VECTOR FP PERFORM SIGN OPERATION
  s390x/tcg: Implement VECTOR FP MULTIPLY AND (ADD|SUBTRACT)
  s390x/tcg: Implement VECTOR FP MULTIPLY
  s390x/tcg: Implement VECTOR LOAD ROUNDED
  s390x/tcg: Implement VECTOR LOAD LENGTHENED
  s390x/tcg: Implement VECTOR LOAD FP INTEGER
  s390x/tcg: Implement VECTOR FP DIVIDE
  s390x/tcg: Implement VECTOR FP CONVERT TO LOGICAL 64-BIT
  s390x/tcg: Implement VECTOR FP CONVERT TO FIXED 64-BIT
  s390x/tcg: Implement VECTOR FP CONVERT FROM LOGICAL 64-BIT
  s390x/tcg: Implement VECTOR FP CONVERT FROM FIXED 64-BIT
  s390x/tcg: Implement VECTOR FP COMPARE (EQUAL|HIGH|HIGH OR EQUAL)
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
2019-06-07 15:24:13 +01:00
parent 9021fcfb88 c984c4e8e3
commit 185b7ccc11
27 changed files with 1931 additions and 139 deletions
Download Patch File Download Diff File Expand all files Collapse all files
MAINTAINERS
+1
View File
@@ -102,6 +102,7 @@ F: pc-bios/s390-ccw/
F: pc-bios/s390-ccw.img
F: target/s390x/
F: docs/vfio-ap.txt
F: tests/migration/s390x/
K: ^Subject:.*(?i)s390x?
T: git https://github.com/cohuck/qemu.git s390-next
L: qemu-s390x@nongnu.org
hw/s390x/s390-virtio-ccw.c
+2
View File
@@ -669,7 +669,9 @@ DEFINE_CCW_MACHINE(4_1, "4.1", true);
static void ccw_machine_4_0_instance_options(MachineState *machine)
{
static const S390FeatInit qemu_cpu_feat = { S390_FEAT_LIST_QEMU_V4_0 };
ccw_machine_4_1_instance_options(machine);
s390_set_qemu_cpu_model(0x2827, 12, 2, qemu_cpu_feat);
}
static void ccw_machine_4_0_class_options(MachineClass *mc)
include/elf.h
+1
View File
@@ -598,6 +598,7 @@ typedef struct {
#define HWCAP_S390_ETF3EH 256
#define HWCAP_S390_HIGH_GPRS 512
#define HWCAP_S390_TE 1024
#define HWCAP_S390_VXRS 2048
/* M68K specific definitions. */
/* We use the top 24 bits to encode information about the
linux-user/elfload.c
+28
View File
@@ -1308,6 +1308,34 @@ static inline void init_thread(struct target_pt_regs *regs,
#define ELF_DATA ELFDATA2MSB
#define ELF_ARCH EM_S390
#include "elf.h"
#define ELF_HWCAP get_elf_hwcap()
#define GET_FEATURE(_feat, _hwcap) \
do { if (s390_has_feat(_feat)) { hwcap |= _hwcap; } } while (0)
static uint32_t get_elf_hwcap(void)
{
/*
* Let's assume we always have esan3 and zarch.
* 31-bit processes can use 64-bit registers (high gprs).
*/
uint32_t hwcap = HWCAP_S390_ESAN3 | HWCAP_S390_ZARCH | HWCAP_S390_HIGH_GPRS;
GET_FEATURE(S390_FEAT_STFLE, HWCAP_S390_STFLE);
GET_FEATURE(S390_FEAT_MSA, HWCAP_S390_MSA);
GET_FEATURE(S390_FEAT_LONG_DISPLACEMENT, HWCAP_S390_LDISP);
GET_FEATURE(S390_FEAT_EXTENDED_IMMEDIATE, HWCAP_S390_EIMM);
if (s390_has_feat(S390_FEAT_EXTENDED_TRANSLATION_3) &&
s390_has_feat(S390_FEAT_ETF3_ENH)) {
hwcap |= HWCAP_S390_ETF3EH;
}
GET_FEATURE(S390_FEAT_VECTOR, HWCAP_S390_VXRS);
return hwcap;
}
static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop)
{
regs->psw.addr = infop->entry;
linux-user/s390x/signal.c
+2 -2
View File
@@ -123,7 +123,7 @@ static void save_sigregs(CPUS390XState *env, target_sigregs *sregs)
*/
//save_fp_regs(&current->thread.fp_regs); FIXME
for (i = 0; i < 16; i++) {
__put_user(get_freg(env, i)->ll, &sregs->fpregs.fprs[i]);
__put_user(*get_freg(env, i), &sregs->fpregs.fprs[i]);
}
}
@@ -254,7 +254,7 @@ restore_sigregs(CPUS390XState *env, target_sigregs *sc)
__get_user(env->aregs[i], &sc->regs.acrs[i]);
}
for (i = 0; i < 16; i++) {
__get_user(get_freg(env, i)->ll, &sc->fpregs.fprs[i]);
__get_user(*get_freg(env, i), &sc->fpregs.fprs[i]);
}
return err;
target/s390x/Makefile.objs
+2 -1
View File
@@ -1,7 +1,8 @@
obj-y += cpu.o cpu_models.o cpu_features.o gdbstub.o interrupt.o helper.o
obj-$(CONFIG_TCG) += translate.o cc_helper.o excp_helper.o fpu_helper.o
obj-$(CONFIG_TCG) += int_helper.o mem_helper.o misc_helper.o crypto_helper.o
obj-$(CONFIG_TCG) += vec_helper.o vec_int_helper.o
obj-$(CONFIG_TCG) += vec_helper.o vec_int_helper.o vec_string_helper.o
obj-$(CONFIG_TCG) += vec_fpu_helper.o
obj-$(CONFIG_SOFTMMU) += machine.o ioinst.o arch_dump.o mmu_helper.o diag.o
obj-$(CONFIG_SOFTMMU) += sigp.o
obj-$(CONFIG_KVM) += kvm.o
target/s390x/arch_dump.c
+4 -4
View File
@@ -104,7 +104,7 @@ static void s390x_write_elf64_fpregset(Note *note, S390CPU *cpu, int id)
note->hdr.n_type = cpu_to_be32(NT_FPREGSET);
note->contents.fpregset.fpc = cpu_to_be32(cpu->env.fpc);
for (i = 0; i <= 15; i++) {
note->contents.fpregset.fprs[i] = cpu_to_be64(get_freg(cs, i)->ll);
note->contents.fpregset.fprs[i] = cpu_to_be64(*get_freg(cs, i));
}
}
@@ -114,7 +114,7 @@ static void s390x_write_elf64_vregslo(Note *note, S390CPU *cpu, int id)
note->hdr.n_type = cpu_to_be32(NT_S390_VXRS_LOW);
for (i = 0; i <= 15; i++) {
note->contents.vregslo.vregs[i] = cpu_to_be64(cpu->env.vregs[i][1].ll);
note->contents.vregslo.vregs[i] = cpu_to_be64(cpu->env.vregs[i][1]);
}
}
@@ -127,8 +127,8 @@ static void s390x_write_elf64_vregshi(Note *note, S390CPU *cpu, int id)
note->hdr.n_type = cpu_to_be32(NT_S390_VXRS_HIGH);
for (i = 0; i <= 15; i++) {
temp_vregshi->vregs[i][0] = cpu_to_be64(cpu->env.vregs[i + 16][0].ll);
temp_vregshi->vregs[i][1] = cpu_to_be64(cpu->env.vregs[i + 16][1].ll);
temp_vregshi->vregs[i][0] = cpu_to_be64(cpu->env.vregs[i + 16][0]);
temp_vregshi->vregs[i][1] = cpu_to_be64(cpu->env.vregs[i + 16][1]);
}
}
target/s390x/cpu.c
+3
View File
@@ -145,6 +145,9 @@ static void s390_cpu_full_reset(CPUState *s)
#if defined(CONFIG_USER_ONLY)
/* user mode should always be allowed to use the full FPU */
env->cregs[0] |= CR0_AFP;
if (s390_has_feat(S390_FEAT_VECTOR)) {
env->cregs[0] |= CR0_VECTOR;
}
#endif
/* architectured initial value for Breaking-Event-Address register */
target/s390x/cpu.h
+3 -2
View File
@@ -66,7 +66,7 @@ struct CPUS390XState {
* The floating point registers are part of the vector registers.
* vregs[0][0] -> vregs[15][0] are 16 floating point registers
*/
CPU_DoubleU vregs[32][2]; /* vector registers */
uint64_t vregs[32][2] QEMU_ALIGNED(16); /* vector registers */
uint32_t aregs[16]; /* access registers */
uint8_t riccb[64]; /* runtime instrumentation control */
uint64_t gscb[4]; /* guarded storage control */
@@ -153,7 +153,7 @@ struct CPUS390XState {
};
static inline CPU_DoubleU *get_freg(CPUS390XState *cs, int nr)
static inline uint64_t *get_freg(CPUS390XState *cs, int nr)
{
return &cs->vregs[nr][0];
}
@@ -215,6 +215,7 @@ extern const struct VMStateDescription vmstate_s390_cpu;
#define PGM_SPECIAL_OP 0x0013
#define PGM_OPERAND 0x0015
#define PGM_TRACE_TABLE 0x0016
#define PGM_VECTOR_PROCESSING 0x001b
#define PGM_SPACE_SWITCH 0x001c
#define PGM_HFP_SQRT 0x001d
#define PGM_PC_TRANS_SPEC 0x001f
target/s390x/cpu_models.c
+2 -2
View File
@@ -86,8 +86,8 @@ static S390CPUDef s390_cpu_defs[] = {
CPUDEF_INIT(0x8562, 15, 1, 47, 0x08000000U, "gen15b", "IBM 8562 GA1"),
};
#define QEMU_MAX_CPU_TYPE 0x2827
#define QEMU_MAX_CPU_GEN 12
#define QEMU_MAX_CPU_TYPE 0x2964
#define QEMU_MAX_CPU_GEN 13
#define QEMU_MAX_CPU_EC_GA 2
static const S390FeatInit qemu_max_cpu_feat_init = { S390_FEAT_LIST_QEMU_MAX };
static S390FeatBitmap qemu_max_cpu_feat;
target/s390x/excp_helper.c
+18 -3
View File
@@ -62,6 +62,21 @@ void QEMU_NORETURN tcg_s390_data_exception(CPUS390XState *env, uint32_t dxc,
tcg_s390_program_interrupt(env, PGM_DATA, ILEN_AUTO, ra);
}
void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc,
uintptr_t ra)
{
g_assert(vxc <= 0xff);
#if !defined(CONFIG_USER_ONLY)
/* Always store the VXC into the lowcore, without AFP it is undefined */
stl_phys(CPU(s390_env_get_cpu(env))->as,
env->psa + offsetof(LowCore, data_exc_code), vxc);
#endif
/* Always store the VXC into the FPC, without AFP it is undefined */
env->fpc = deposit32(env->fpc, 8, 8, vxc);
tcg_s390_program_interrupt(env, PGM_VECTOR_PROCESSING, ILEN_AUTO, ra);
}
void HELPER(data_exception)(CPUS390XState *env, uint32_t dxc)
{
tcg_s390_data_exception(env, dxc, GETPC());
@@ -390,8 +405,8 @@ static int mchk_store_vregs(CPUS390XState *env, uint64_t mcesao)
}
for (i = 0; i < 32; i++) {
sa->vregs[i][0] = cpu_to_be64(env->vregs[i][0].ll);
sa->vregs[i][1] = cpu_to_be64(env->vregs[i][1].ll);
sa->vregs[i][0] = cpu_to_be64(env->vregs[i][0]);
sa->vregs[i][1] = cpu_to_be64(env->vregs[i][1]);
}
cpu_physical_memory_unmap(sa, len, 1, len);
@@ -429,7 +444,7 @@ static void do_mchk_interrupt(CPUS390XState *env)
lowcore->ar_access_id = 1;
for (i = 0; i < 16; i++) {
lowcore->floating_pt_save_area[i] = cpu_to_be64(get_freg(env, i)->ll);
lowcore->floating_pt_save_area[i] = cpu_to_be64(*get_freg(env, i));
lowcore->gpregs_save_area[i] = cpu_to_be64(env->regs[i]);
lowcore->access_regs_save_area[i] = cpu_to_be32(env->aregs[i]);
lowcore->cregs_save_area[i] = cpu_to_be64(env->cregs[i]);
target/s390x/fpu_helper.c
+2 -2
View File
@@ -112,7 +112,7 @@ static void handle_exceptions(CPUS390XState *env, bool XxC, uintptr_t retaddr)
}
}
static inline int float_comp_to_cc(CPUS390XState *env, int float_compare)
int float_comp_to_cc(CPUS390XState *env, int float_compare)
{
S390CPU *cpu = s390_env_get_cpu(env);
@@ -746,7 +746,7 @@ static inline uint16_t dcmask(int bit, bool neg)
}
#define DEF_FLOAT_DCMASK(_TYPE) \
static uint16_t _TYPE##_dcmask(CPUS390XState *env, _TYPE f1) \
uint16_t _TYPE##_dcmask(CPUS390XState *env, _TYPE f1) \
{ \
const bool neg = _TYPE##_is_neg(f1); \
\
target/s390x/gdbstub.c
+8 -8
View File
@@ -116,7 +116,7 @@ static int cpu_read_fp_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
case S390_FPC_REGNUM:
return gdb_get_reg32(mem_buf, env->fpc);
case S390_F0_REGNUM ... S390_F15_REGNUM:
return gdb_get_reg64(mem_buf, get_freg(env, n - S390_F0_REGNUM)->ll);
return gdb_get_reg64(mem_buf, *get_freg(env, n - S390_F0_REGNUM));
default:
return 0;
}
@@ -129,7 +129,7 @@ static int cpu_write_fp_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
env->fpc = ldl_p(mem_buf);
return 4;
case S390_F0_REGNUM ... S390_F15_REGNUM:
get_freg(env, n - S390_F0_REGNUM)->ll = ldtul_p(mem_buf);
*get_freg(env, n - S390_F0_REGNUM) = ldtul_p(mem_buf);
return 8;
default:
return 0;
@@ -150,11 +150,11 @@ static int cpu_read_vreg(CPUS390XState *env, uint8_t *mem_buf, int n)
switch (n) {
case S390_V0L_REGNUM ... S390_V15L_REGNUM:
ret = gdb_get_reg64(mem_buf, env->vregs[n][1].ll);
ret = gdb_get_reg64(mem_buf, env->vregs[n][1]);
break;
case S390_V16_REGNUM ... S390_V31_REGNUM:
ret = gdb_get_reg64(mem_buf, env->vregs[n][0].ll);
ret += gdb_get_reg64(mem_buf + 8, env->vregs[n][1].ll);
ret = gdb_get_reg64(mem_buf, env->vregs[n][0]);
ret += gdb_get_reg64(mem_buf + 8, env->vregs[n][1]);
break;
default:
ret = 0;
@@ -167,11 +167,11 @@ static int cpu_write_vreg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
switch (n) {
case S390_V0L_REGNUM ... S390_V15L_REGNUM:
env->vregs[n][1].ll = ldtul_p(mem_buf + 8);
env->vregs[n][1] = ldtul_p(mem_buf + 8);
return 8;
case S390_V16_REGNUM ... S390_V31_REGNUM:
env->vregs[n][0].ll = ldtul_p(mem_buf);
env->vregs[n][1].ll = ldtul_p(mem_buf + 8);
env->vregs[n][0] = ldtul_p(mem_buf);
env->vregs[n][1] = ldtul_p(mem_buf + 8);
return 16;
default:
return 0;
target/s390x/gen-features.c
+7 -3
View File
@@ -689,7 +689,7 @@ static uint16_t qemu_V3_1[] = {
S390_FEAT_MSA_EXT_4,
};
static uint16_t qemu_LATEST[] = {
static uint16_t qemu_V4_0[] = {
/*
* Only BFP bits are implemented (HFP, DFP, PFPO and DIVIDE TO INTEGER not
* implemented yet).
@@ -698,10 +698,13 @@ static uint16_t qemu_LATEST[] = {
S390_FEAT_ZPCI,
};
static uint16_t qemu_LATEST[] = {
S390_FEAT_STFLE_53,
S390_FEAT_VECTOR,
};
/* add all new definitions before this point */
static uint16_t qemu_MAX[] = {
/* z13+ features */
S390_FEAT_STFLE_53,
/* generates a dependency warning, leave it out for now */
S390_FEAT_MSA_EXT_5,
};
@@ -820,6 +823,7 @@ static FeatGroupDefSpec FeatGroupDef[] = {
static FeatGroupDefSpec QemuFeatDef[] = {
QEMU_FEAT_INITIALIZER(V2_11),
QEMU_FEAT_INITIALIZER(V3_1),
QEMU_FEAT_INITIALIZER(V4_0),
QEMU_FEAT_INITIALIZER(LATEST),
QEMU_FEAT_INITIALIZER(MAX),
};
target/s390x/helper.c
+5 -5
View File
@@ -249,7 +249,7 @@ int s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch)
cpu_physical_memory_write(offsetof(LowCore, ar_access_id), &ar_id, 1);
}
for (i = 0; i < 16; ++i) {
sa->fprs[i] = cpu_to_be64(get_freg(&cpu->env, i)->ll);
sa->fprs[i] = cpu_to_be64(*get_freg(&cpu->env, i));
}
for (i = 0; i < 16; ++i) {
sa->grs[i] = cpu_to_be64(cpu->env.regs[i]);
@@ -299,8 +299,8 @@ int s390_store_adtl_status(S390CPU *cpu, hwaddr addr, hwaddr len)
if (s390_has_feat(S390_FEAT_VECTOR)) {
for (i = 0; i < 32; i++) {
sa->vregs[i][0] = cpu_to_be64(cpu->env.vregs[i][0].ll);
sa->vregs[i][1] = cpu_to_be64(cpu->env.vregs[i][1].ll);
sa->vregs[i][0] = cpu_to_be64(cpu->env.vregs[i][0]);
sa->vregs[i][1] = cpu_to_be64(cpu->env.vregs[i][1]);
}
}
if (s390_has_feat(S390_FEAT_GUARDED_STORAGE) && len >= ADTL_GS_MIN_SIZE) {
@@ -341,13 +341,13 @@ void s390_cpu_dump_state(CPUState *cs, FILE *f, int flags)
if (s390_has_feat(S390_FEAT_VECTOR)) {
for (i = 0; i < 32; i++) {
qemu_fprintf(f, "V%02d=%016" PRIx64 "%016" PRIx64 "%c",
i, env->vregs[i][0].ll, env->vregs[i][1].ll,
i, env->vregs[i][0], env->vregs[i][1],
i % 2 ? '\n' : ' ');
}
} else {
for (i = 0; i < 16; i++) {
qemu_fprintf(f, "F%02d=%016" PRIx64 "%c",
i, get_freg(env, i)->ll,
i, *get_freg(env, i),
(i % 4) == 3 ? '\n' : ' ');
}
}
target/s390x/helper.h
+84
View File
@@ -211,6 +211,90 @@ DEF_HELPER_FLAGS_4(gvec_vscbi8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_4(gvec_vscbi16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_4(gvec_vtm, void, ptr, cptr, env, i32)
/* === Vector String Instructions === */
DEF_HELPER_FLAGS_4(gvec_vfae8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_4(gvec_vfae16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_4(gvec_vfae32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_5(gvec_vfae_cc8, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfae_cc16, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfae_cc32, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vfee8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_4(gvec_vfee16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_4(gvec_vfee32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_5(gvec_vfee_cc8, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfee_cc16, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfee_cc32, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vfene8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_4(gvec_vfene16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_4(gvec_vfene32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_5(gvec_vfene_cc8, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfene_cc16, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfene_cc32, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_3(gvec_vistr8, TCG_CALL_NO_RWG, void, ptr, cptr, i32)
DEF_HELPER_FLAGS_3(gvec_vistr16, TCG_CALL_NO_RWG, void, ptr, cptr, i32)
DEF_HELPER_FLAGS_3(gvec_vistr32, TCG_CALL_NO_RWG, void, ptr, cptr, i32)
DEF_HELPER_4(gvec_vistr_cc8, void, ptr, cptr, env, i32)
DEF_HELPER_4(gvec_vistr_cc16, void, ptr, cptr, env, i32)
DEF_HELPER_4(gvec_vistr_cc32, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vstrc8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_5(gvec_vstrc16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_5(gvec_vstrc32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_5(gvec_vstrc_rt8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_5(gvec_vstrc_rt16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_5(gvec_vstrc_rt32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
DEF_HELPER_6(gvec_vstrc_cc8, void, ptr, cptr, cptr, cptr, env, i32)
DEF_HELPER_6(gvec_vstrc_cc16, void, ptr, cptr, cptr, cptr, env, i32)
DEF_HELPER_6(gvec_vstrc_cc32, void, ptr, cptr, cptr, cptr, env, i32)
DEF_HELPER_6(gvec_vstrc_cc_rt8, void, ptr, cptr, cptr, cptr, env, i32)
DEF_HELPER_6(gvec_vstrc_cc_rt16, void, ptr, cptr, cptr, cptr, env, i32)
DEF_HELPER_6(gvec_vstrc_cc_rt32, void, ptr, cptr, cptr, cptr, env, i32)
/* === Vector Floating-Point Instructions */
DEF_HELPER_FLAGS_5(gvec_vfa64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfa64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_4(gvec_wfc64, void, cptr, cptr, env, i32)
DEF_HELPER_4(gvec_wfk64, void, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfce64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfce64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfce64_cc, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfce64s_cc, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfch64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfch64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfch64_cc, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfch64s_cc, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfche64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfche64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfche64_cc, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfche64s_cc, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vcdg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vcdg64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vcdlg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vcdlg64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vcgd64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vcgd64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vclgd64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vclgd64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfd64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfd64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vfi64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vfi64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vfll32, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vfll32s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vflr64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vflr64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfm64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfm64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_6(gvec_vfma64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_6(gvec_vfma64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_6(gvec_vfms64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_6(gvec_vfms64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vfsq64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vfsq64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfs64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfs64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_4(gvec_vftci64, void, ptr, cptr, env, i32)
DEF_HELPER_4(gvec_vftci64s, void, ptr, cptr, env, i32)
#ifndef CONFIG_USER_ONLY
DEF_HELPER_3(servc, i32, env, i64, i64)
DEF_HELPER_4(diag, void, env, i32, i32, i32)
target/s390x/insn-data.def
+58
View File
@@ -1191,6 +1191,64 @@
/* VECTOR TEST UNDER MASK */
F(0xe7d8, VTM, VRR_a, V, 0, 0, 0, 0, vtm, 0, IF_VEC)
/* === Vector String Instructions === */
/* VECTOR FIND ANY ELEMENT EQUAL */
F(0xe782, VFAE, VRR_b, V, 0, 0, 0, 0, vfae, 0, IF_VEC)
/* VECTOR FIND ELEMENT EQUAL */
F(0xe780, VFEE, VRR_b, V, 0, 0, 0, 0, vfee, 0, IF_VEC)
/* VECTOR FIND ELEMENT NOT EQUAL */
F(0xe781, VFENE, VRR_b, V, 0, 0, 0, 0, vfene, 0, IF_VEC)
/* VECTOR ISOLATE STRING */
F(0xe75c, VISTR, VRR_a, V, 0, 0, 0, 0, vistr, 0, IF_VEC)
/* VECTOR STRING RANGE COMPARE */
F(0xe78a, VSTRC, VRR_d, V, 0, 0, 0, 0, vstrc, 0, IF_VEC)
/* === Vector Floating-Point Instructions */
/* VECTOR FP ADD */
F(0xe7e3, VFA, VRR_c, V, 0, 0, 0, 0, vfa, 0, IF_VEC)
/* VECTOR FP COMPARE SCALAR */
F(0xe7cb, WFC, VRR_a, V, 0, 0, 0, 0, wfc, 0, IF_VEC)
/* VECTOR FP COMPARE AND SIGNAL SCALAR */
F(0xe7ca, WFK, VRR_a, V, 0, 0, 0, 0, wfc, 0, IF_VEC)
/* VECTOR FP COMPARE EQUAL */
F(0xe7e8, VFCE, VRR_c, V, 0, 0, 0, 0, vfc, 0, IF_VEC)
/* VECTOR FP COMPARE HIGH */
F(0xe7eb, VFCH, VRR_c, V, 0, 0, 0, 0, vfc, 0, IF_VEC)
/* VECTOR FP COMPARE HIGH OR EQUAL */
F(0xe7ea, VFCHE, VRR_c, V, 0, 0, 0, 0, vfc, 0, IF_VEC)
/* VECTOR FP CONVERT FROM FIXED 64-BIT */
F(0xe7c3, VCDG, VRR_a, V, 0, 0, 0, 0, vcdg, 0, IF_VEC)
/* VECTOR FP CONVERT FROM LOGICAL 64-BIT */
F(0xe7c1, VCDLG, VRR_a, V, 0, 0, 0, 0, vcdg, 0, IF_VEC)
/* VECTOR FP CONVERT TO FIXED 64-BIT */
F(0xe7c2, VCGD, VRR_a, V, 0, 0, 0, 0, vcdg, 0, IF_VEC)
/* VECTOR FP CONVERT TO LOGICAL 64-BIT */
F(0xe7c0, VCLGD, VRR_a, V, 0, 0, 0, 0, vcdg, 0, IF_VEC)
/* VECTOR FP DIVIDE */
F(0xe7e5, VFD, VRR_c, V, 0, 0, 0, 0, vfa, 0, IF_VEC)
/* VECTOR LOAD FP INTEGER */
F(0xe7c7, VFI, VRR_a, V, 0, 0, 0, 0, vcdg, 0, IF_VEC)
/* VECTOR LOAD LENGTHENED */
F(0xe7c4, VFLL, VRR_a, V, 0, 0, 0, 0, vfll, 0, IF_VEC)
/* VECTOR LOAD ROUNDED */
F(0xe7c5, VFLR, VRR_a, V, 0, 0, 0, 0, vcdg, 0, IF_VEC)
/* VECTOR FP MULTIPLY */
F(0xe7e7, VFM, VRR_c, V, 0, 0, 0, 0, vfa, 0, IF_VEC)
/* VECTOR FP MULTIPLY AND ADD */
F(0xe78f, VFMA, VRR_e, V, 0, 0, 0, 0, vfma, 0, IF_VEC)
/* VECTOR FP MULTIPLY AND SUBTRACT */
F(0xe78e, VFMS, VRR_e, V, 0, 0, 0, 0, vfma, 0, IF_VEC)
/* VECTOR FP PERFORM SIGN OPERATION */
F(0xe7cc, VFPSO, VRR_a, V, 0, 0, 0, 0, vfpso, 0, IF_VEC)
/* VECTOR FP SQUARE ROOT */
F(0xe7ce, VFSQ, VRR_a, V, 0, 0, 0, 0, vfsq, 0, IF_VEC)
/* VECTOR FP SUBTRACT */
F(0xe7e2, VFS, VRR_c, V, 0, 0, 0, 0, vfa, 0, IF_VEC)
/* VECTOR FP TEST DATA CLASS IMMEDIATE */
F(0xe74a, VFTCI, VRI_e, V, 0, 0, 0, 0, vftci, 0, IF_VEC)
#ifndef CONFIG_USER_ONLY
/* COMPARE AND SWAP AND PURGE */
E(0xb250, CSP, RRE, Z, r1_32u, ra2, r1_P, 0, csp, 0, MO_TEUL, IF_PRIV)
target/s390x/internal.h
+4
View File
@@ -285,6 +285,10 @@ uint32_t set_cc_nz_f128(float128 v);
uint8_t s390_softfloat_exc_to_ieee(unsigned int exc);
int s390_swap_bfp_rounding_mode(CPUS390XState *env, int m3);
void s390_restore_bfp_rounding_mode(CPUS390XState *env, int old_mode);
int float_comp_to_cc(CPUS390XState *env, int float_compare);
uint16_t float32_dcmask(CPUS390XState *env, float32 f1);
uint16_t float64_dcmask(CPUS390XState *env, float64 f1);
uint16_t float128_dcmask(CPUS390XState *env, float128 f1);
/* gdbstub.c */
target/s390x/kvm.c
+8 -8
View File
@@ -418,21 +418,21 @@ int kvm_arch_put_registers(CPUState *cs, int level)
if (can_sync_regs(cs, KVM_SYNC_VRS)) {
for (i = 0; i < 32; i++) {
cs->kvm_run->s.regs.vrs[i][0] = env->vregs[i][0].ll;
cs->kvm_run->s.regs.vrs[i][1] = env->vregs[i][1].ll;
cs->kvm_run->s.regs.vrs[i][0] = env->vregs[i][0];
cs->kvm_run->s.regs.vrs[i][1] = env->vregs[i][1];
}
cs->kvm_run->s.regs.fpc = env->fpc;
cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_VRS;
} else if (can_sync_regs(cs, KVM_SYNC_FPRS)) {
for (i = 0; i < 16; i++) {
cs->kvm_run->s.regs.fprs[i] = get_freg(env, i)->ll;
cs->kvm_run->s.regs.fprs[i] = *get_freg(env, i);
}
cs->kvm_run->s.regs.fpc = env->fpc;
cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_FPRS;
} else {
/* Floating point */
for (i = 0; i < 16; i++) {
fpu.fprs[i] = get_freg(env, i)->ll;
fpu.fprs[i] = *get_freg(env, i);
}
fpu.fpc = env->fpc;
@@ -586,13 +586,13 @@ int kvm_arch_get_registers(CPUState *cs)
/* Floating point and vector registers */
if (can_sync_regs(cs, KVM_SYNC_VRS)) {
for (i = 0; i < 32; i++) {
env->vregs[i][0].ll = cs->kvm_run->s.regs.vrs[i][0];
env->vregs[i][1].ll = cs->kvm_run->s.regs.vrs[i][1];
env->vregs[i][0] = cs->kvm_run->s.regs.vrs[i][0];
env->vregs[i][1] = cs->kvm_run->s.regs.vrs[i][1];
}
env->fpc = cs->kvm_run->s.regs.fpc;
} else if (can_sync_regs(cs, KVM_SYNC_FPRS)) {
for (i = 0; i < 16; i++) {
get_freg(env, i)->ll = cs->kvm_run->s.regs.fprs[i];
*get_freg(env, i) = cs->kvm_run->s.regs.fprs[i];
}
env->fpc = cs->kvm_run->s.regs.fpc;
} else {
@@ -601,7 +601,7 @@ int kvm_arch_get_registers(CPUState *cs)
return r;
}
for (i = 0; i < 16; i++) {
get_freg(env, i)->ll = fpu.fprs[i];
*get_freg(env, i) = fpu.fprs[i];
}
env->fpc = fpu.fpc;
}
target/s390x/machine.c
+64 -64
View File
@@ -66,22 +66,22 @@ static const VMStateDescription vmstate_fpu = {
.minimum_version_id = 1,
.needed = fpu_needed,
.fields = (VMStateField[]) {
VMSTATE_UINT64(env.vregs[0][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[1][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[2][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[3][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[4][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[5][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[6][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[7][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[8][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[9][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[10][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[11][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[12][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[13][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[14][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[15][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[0][0], S390CPU),
VMSTATE_UINT64(env.vregs[1][0], S390CPU),
VMSTATE_UINT64(env.vregs[2][0], S390CPU),
VMSTATE_UINT64(env.vregs[3][0], S390CPU),
VMSTATE_UINT64(env.vregs[4][0], S390CPU),
VMSTATE_UINT64(env.vregs[5][0], S390CPU),
VMSTATE_UINT64(env.vregs[6][0], S390CPU),
VMSTATE_UINT64(env.vregs[7][0], S390CPU),
VMSTATE_UINT64(env.vregs[8][0], S390CPU),
VMSTATE_UINT64(env.vregs[9][0], S390CPU),
VMSTATE_UINT64(env.vregs[10][0], S390CPU),
VMSTATE_UINT64(env.vregs[11][0], S390CPU),
VMSTATE_UINT64(env.vregs[12][0], S390CPU),
VMSTATE_UINT64(env.vregs[13][0], S390CPU),
VMSTATE_UINT64(env.vregs[14][0], S390CPU),
VMSTATE_UINT64(env.vregs[15][0], S390CPU),
VMSTATE_UINT32(env.fpc, S390CPU),
VMSTATE_END_OF_LIST()
}
@@ -99,54 +99,54 @@ static const VMStateDescription vmstate_vregs = {
.needed = vregs_needed,
.fields = (VMStateField[]) {
/* vregs[0][0] -> vregs[15][0] and fregs are overlays */
VMSTATE_UINT64(env.vregs[16][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[17][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[18][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[19][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[20][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[21][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[22][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[23][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[24][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[25][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[26][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[27][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[28][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[29][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[30][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[31][0].ll, S390CPU),
VMSTATE_UINT64(env.vregs[0][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[1][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[2][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[3][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[4][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[5][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[6][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[7][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[8][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[9][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[10][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[11][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[12][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[13][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[14][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[15][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[16][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[17][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[18][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[19][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[20][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[21][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[22][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[23][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[24][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[25][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[26][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[27][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[28][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[29][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[30][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[31][1].ll, S390CPU),
VMSTATE_UINT64(env.vregs[16][0], S390CPU),
VMSTATE_UINT64(env.vregs[17][0], S390CPU),
VMSTATE_UINT64(env.vregs[18][0], S390CPU),
VMSTATE_UINT64(env.vregs[19][0], S390CPU),
VMSTATE_UINT64(env.vregs[20][0], S390CPU),
VMSTATE_UINT64(env.vregs[21][0], S390CPU),
VMSTATE_UINT64(env.vregs[22][0], S390CPU),
VMSTATE_UINT64(env.vregs[23][0], S390CPU),
VMSTATE_UINT64(env.vregs[24][0], S390CPU),
VMSTATE_UINT64(env.vregs[25][0], S390CPU),
VMSTATE_UINT64(env.vregs[26][0], S390CPU),
VMSTATE_UINT64(env.vregs[27][0], S390CPU),
VMSTATE_UINT64(env.vregs[28][0], S390CPU),
VMSTATE_UINT64(env.vregs[29][0], S390CPU),
VMSTATE_UINT64(env.vregs[30][0], S390CPU),
VMSTATE_UINT64(env.vregs[31][0], S390CPU),
VMSTATE_UINT64(env.vregs[0][1], S390CPU),
VMSTATE_UINT64(env.vregs[1][1], S390CPU),
VMSTATE_UINT64(env.vregs[2][1], S390CPU),
VMSTATE_UINT64(env.vregs[3][1], S390CPU),
VMSTATE_UINT64(env.vregs[4][1], S390CPU),
VMSTATE_UINT64(env.vregs[5][1], S390CPU),
VMSTATE_UINT64(env.vregs[6][1], S390CPU),
VMSTATE_UINT64(env.vregs[7][1], S390CPU),
VMSTATE_UINT64(env.vregs[8][1], S390CPU),
VMSTATE_UINT64(env.vregs[9][1], S390CPU),
VMSTATE_UINT64(env.vregs[10][1], S390CPU),
VMSTATE_UINT64(env.vregs[11][1], S390CPU),
VMSTATE_UINT64(env.vregs[12][1], S390CPU),
VMSTATE_UINT64(env.vregs[13][1], S390CPU),
VMSTATE_UINT64(env.vregs[14][1], S390CPU),
VMSTATE_UINT64(env.vregs[15][1], S390CPU),
VMSTATE_UINT64(env.vregs[16][1], S390CPU),
VMSTATE_UINT64(env.vregs[17][1], S390CPU),
VMSTATE_UINT64(env.vregs[18][1], S390CPU),
VMSTATE_UINT64(env.vregs[19][1], S390CPU),
VMSTATE_UINT64(env.vregs[20][1], S390CPU),
VMSTATE_UINT64(env.vregs[21][1], S390CPU),
VMSTATE_UINT64(env.vregs[22][1], S390CPU),
VMSTATE_UINT64(env.vregs[23][1], S390CPU),
VMSTATE_UINT64(env.vregs[24][1], S390CPU),
VMSTATE_UINT64(env.vregs[25][1], S390CPU),
VMSTATE_UINT64(env.vregs[26][1], S390CPU),
VMSTATE_UINT64(env.vregs[27][1], S390CPU),
VMSTATE_UINT64(env.vregs[28][1], S390CPU),
VMSTATE_UINT64(env.vregs[29][1], S390CPU),
VMSTATE_UINT64(env.vregs[30][1], S390CPU),
VMSTATE_UINT64(env.vregs[31][1], S390CPU),
VMSTATE_END_OF_LIST()
}
};

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