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PPC: MPIC: Fix CI bit definitions
The bit definitions for critical interrupt routing are in PowerPC order (most significant bit is 0), while we end up shifting it with normal bit order. Turn the numbers around so we actually end up fetching the right ones. Signed-off-by: Alexander Graf <agraf@suse.de>
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+5
-5
@@ -131,11 +131,11 @@ enum {
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#define MPIC_CPU_REG_SIZE 0x100 + ((MAX_CPU - 1) * 0x1000)
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enum mpic_ide_bits {
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IDR_EP = 0,
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IDR_CI0 = 1,
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IDR_CI1 = 2,
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IDR_P1 = 30,
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IDR_P0 = 31,
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IDR_EP = 31,
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IDR_CI0 = 30,
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IDR_CI1 = 29,
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IDR_P1 = 1,
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IDR_P0 = 0,
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};
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#else
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