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Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20200317' into staging
Fix tcg/i386 bug vs sari_vec. Fix tcg-runtime-gvec.c vs i386 without avx. # gpg: Signature made Tue 17 Mar 2020 18:58:14 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20200317: tcg: Remove tcg-runtime-gvec.c DO_CMP0 tcg: Tidy tcg-runtime-gvec.c DUP* tcg: Tidy tcg-runtime-gvec.c types tcg: Remove CONFIG_VECTOR16 tcg/i386: Bound shift count expanding sari_vec Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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+116
-182
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Load Diff
@@ -5764,58 +5764,6 @@ if test "$plugins" = "yes" &&
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"for this purpose. You can't build with --static."
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fi
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########################################
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# See if 16-byte vector operations are supported.
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# Even without a vector unit the compiler may expand these.
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# There is a bug in old GCC for PPC that crashes here.
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# Unfortunately it's the system compiler for Centos 7.
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cat > $TMPC << EOF
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typedef unsigned char U1 __attribute__((vector_size(16)));
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typedef unsigned short U2 __attribute__((vector_size(16)));
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typedef unsigned int U4 __attribute__((vector_size(16)));
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typedef unsigned long long U8 __attribute__((vector_size(16)));
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typedef signed char S1 __attribute__((vector_size(16)));
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typedef signed short S2 __attribute__((vector_size(16)));
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typedef signed int S4 __attribute__((vector_size(16)));
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typedef signed long long S8 __attribute__((vector_size(16)));
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static U1 a1, b1;
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static U2 a2, b2;
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static U4 a4, b4;
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static U8 a8, b8;
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static S1 c1;
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static S2 c2;
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static S4 c4;
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static S8 c8;
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static int i;
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void helper(void *d, void *a, int shift, int i);
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void helper(void *d, void *a, int shift, int i)
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{
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*(U1 *)(d + i) = *(U1 *)(a + i) << shift;
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*(U2 *)(d + i) = *(U2 *)(a + i) << shift;
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*(U4 *)(d + i) = *(U4 *)(a + i) << shift;
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*(U8 *)(d + i) = *(U8 *)(a + i) << shift;
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}
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int main(void)
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{
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a1 += b1; a2 += b2; a4 += b4; a8 += b8;
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a1 -= b1; a2 -= b2; a4 -= b4; a8 -= b8;
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a1 *= b1; a2 *= b2; a4 *= b4; a8 *= b8;
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a1 &= b1; a2 &= b2; a4 &= b4; a8 &= b8;
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a1 |= b1; a2 |= b2; a4 |= b4; a8 |= b8;
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a1 ^= b1; a2 ^= b2; a4 ^= b4; a8 ^= b8;
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a1 <<= i; a2 <<= i; a4 <<= i; a8 <<= i;
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a1 >>= i; a2 >>= i; a4 >>= i; a8 >>= i;
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c1 >>= i; c2 >>= i; c4 >>= i; c8 >>= i;
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return 0;
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}
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EOF
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vector16=no
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if compile_prog "" "" ; then
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vector16=yes
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fi
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########################################
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# See if __attribute__((alias)) is supported.
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# This false for Xcode 9, but has been remedied for Xcode 10.
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@@ -7446,10 +7394,6 @@ if test "$atomic64" = "yes" ; then
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echo "CONFIG_ATOMIC64=y" >> $config_host_mak
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fi
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if test "$vector16" = "yes" ; then
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echo "CONFIG_VECTOR16=y" >> $config_host_mak
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fi
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if test "$attralias" = "yes" ; then
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echo "CONFIG_ATTRIBUTE_ALIAS=y" >> $config_host_mak
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fi
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@@ -3391,12 +3391,15 @@ static void expand_vec_sari(TCGType type, unsigned vece,
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case MO_64:
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if (imm <= 32) {
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/* We can emulate a small sign extend by performing an arithmetic
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/*
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* We can emulate a small sign extend by performing an arithmetic
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* 32-bit shift and overwriting the high half of a 64-bit logical
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* shift (note that the ISA says shift of 32 is valid).
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* shift. Note that the ISA says shift of 32 is valid, but TCG
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* does not, so we have to bound the smaller shift -- we get the
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* same result in the high half either way.
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*/
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t1 = tcg_temp_new_vec(type);
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tcg_gen_sari_vec(MO_32, t1, v1, imm);
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tcg_gen_sari_vec(MO_32, t1, v1, MIN(imm, 31));
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tcg_gen_shri_vec(MO_64, v0, v1, imm);
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vec_gen_4(INDEX_op_x86_blend_vec, type, MO_32,
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tcgv_vec_arg(v0), tcgv_vec_arg(v0),
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