Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20200317' into staging

Fix tcg/i386 bug vs sari_vec.
Fix tcg-runtime-gvec.c vs i386 without avx.

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# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
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* remotes/rth/tags/pull-tcg-20200317:
  tcg: Remove tcg-runtime-gvec.c DO_CMP0
  tcg: Tidy tcg-runtime-gvec.c DUP*
  tcg: Tidy tcg-runtime-gvec.c types
  tcg: Remove CONFIG_VECTOR16
  tcg/i386: Bound shift count expanding sari_vec

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
2020-03-18 22:15:59 +00:00
3 changed files with 122 additions and 241 deletions
File diff suppressed because it is too large Load Diff
Vendored
-56
View File
@@ -5764,58 +5764,6 @@ if test "$plugins" = "yes" &&
"for this purpose. You can't build with --static."
fi
########################################
# See if 16-byte vector operations are supported.
# Even without a vector unit the compiler may expand these.
# There is a bug in old GCC for PPC that crashes here.
# Unfortunately it's the system compiler for Centos 7.
cat > $TMPC << EOF
typedef unsigned char U1 __attribute__((vector_size(16)));
typedef unsigned short U2 __attribute__((vector_size(16)));
typedef unsigned int U4 __attribute__((vector_size(16)));
typedef unsigned long long U8 __attribute__((vector_size(16)));
typedef signed char S1 __attribute__((vector_size(16)));
typedef signed short S2 __attribute__((vector_size(16)));
typedef signed int S4 __attribute__((vector_size(16)));
typedef signed long long S8 __attribute__((vector_size(16)));
static U1 a1, b1;
static U2 a2, b2;
static U4 a4, b4;
static U8 a8, b8;
static S1 c1;
static S2 c2;
static S4 c4;
static S8 c8;
static int i;
void helper(void *d, void *a, int shift, int i);
void helper(void *d, void *a, int shift, int i)
{
*(U1 *)(d + i) = *(U1 *)(a + i) << shift;
*(U2 *)(d + i) = *(U2 *)(a + i) << shift;
*(U4 *)(d + i) = *(U4 *)(a + i) << shift;
*(U8 *)(d + i) = *(U8 *)(a + i) << shift;
}
int main(void)
{
a1 += b1; a2 += b2; a4 += b4; a8 += b8;
a1 -= b1; a2 -= b2; a4 -= b4; a8 -= b8;
a1 *= b1; a2 *= b2; a4 *= b4; a8 *= b8;
a1 &= b1; a2 &= b2; a4 &= b4; a8 &= b8;
a1 |= b1; a2 |= b2; a4 |= b4; a8 |= b8;
a1 ^= b1; a2 ^= b2; a4 ^= b4; a8 ^= b8;
a1 <<= i; a2 <<= i; a4 <<= i; a8 <<= i;
a1 >>= i; a2 >>= i; a4 >>= i; a8 >>= i;
c1 >>= i; c2 >>= i; c4 >>= i; c8 >>= i;
return 0;
}
EOF
vector16=no
if compile_prog "" "" ; then
vector16=yes
fi
########################################
# See if __attribute__((alias)) is supported.
# This false for Xcode 9, but has been remedied for Xcode 10.
@@ -7446,10 +7394,6 @@ if test "$atomic64" = "yes" ; then
echo "CONFIG_ATOMIC64=y" >> $config_host_mak
fi
if test "$vector16" = "yes" ; then
echo "CONFIG_VECTOR16=y" >> $config_host_mak
fi
if test "$attralias" = "yes" ; then
echo "CONFIG_ATTRIBUTE_ALIAS=y" >> $config_host_mak
fi
+6 -3
View File
@@ -3391,12 +3391,15 @@ static void expand_vec_sari(TCGType type, unsigned vece,
case MO_64:
if (imm <= 32) {
/* We can emulate a small sign extend by performing an arithmetic
/*
* We can emulate a small sign extend by performing an arithmetic
* 32-bit shift and overwriting the high half of a 64-bit logical
* shift (note that the ISA says shift of 32 is valid).
* shift. Note that the ISA says shift of 32 is valid, but TCG
* does not, so we have to bound the smaller shift -- we get the
* same result in the high half either way.
*/
t1 = tcg_temp_new_vec(type);
tcg_gen_sari_vec(MO_32, t1, v1, imm);
tcg_gen_sari_vec(MO_32, t1, v1, MIN(imm, 31));
tcg_gen_shri_vec(MO_64, v0, v1, imm);
vec_gen_4(INDEX_op_x86_blend_vec, type, MO_32,
tcgv_vec_arg(v0), tcgv_vec_arg(v0),