target-arm: Abstract out load/store from a vaddr in AArch32

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AArch32 code (ie traditional 32 bit world) expects to be
able to pass a vaddr in a TCGv_i32. However when QEMU is
compiled with TARGET_LONG_BITS=32 the TCG load/store
functions take a TCGv_i64. Abstract out load/store with
a 32 bit vaddr so we have a place to put the zero extension
of the vaddr and the extension/truncation of the data value.

Apart from the function definitions most of this patch is
a simple s/tcg_gen_qemu_/gen_aa32_/.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-3-git-send-email-peter.maydell@linaro.org

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This commit is contained in:

Peter Maydell

2013-09-10 19:11:27 +01:00

parent 4d017979aa

commit 08307563ff

1 changed files with 210 additions and 124 deletions

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target-arm/translate.c

+210 -124

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