Sacha
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60b84e71d5
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Armjit: Re-enable reg shifts. Thanks [Unknown] for finding the issue.
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2013-03-05 14:55:33 +10:00 |
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Sacha
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4641cf376f
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Armjit: Implement CLZ instruction. Disable reg shifts for now (breaks Wipeout Pure).
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2013-03-05 14:16:35 +10:00 |
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Sacha
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4a56ebd0a0
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Armjit: Add sllv, srlv, srav instructions (reg shift).
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2013-03-05 13:52:03 +10:00 |
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Sacha
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10ad797c6d
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Armjit stubs.
Add a double encoding for VCVT. Implement integer divide (but not working yet). Stubs for msub/msubu. Don't detect vfpv3 on Symbian.
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2013-03-05 13:16:08 +10:00 |
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Sacha
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d5feb4d3ff
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Quick build fix
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2013-03-05 03:13:33 +10:00 |
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Sacha
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1089a31a45
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Armjit: add reverse bit instruction.
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2013-03-05 02:58:51 +10:00 |
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Sacha
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bce3295950
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Fix graphical issues. DISABLE INS instruction for now. Fix OR (it was doing AND).
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2013-03-04 22:09:45 +10:00 |
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Henrik Rydgard
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165cfe53a3
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Quick ins bugfix
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2013-03-04 00:06:33 +01:00 |
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Henrik Rydgard
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7dc75d87b5
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armjit: Re-enable ext/ins, safer implementation. arm7 path disabled for now.
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2013-03-03 23:17:21 +01:00 |
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Henrik Rydgard
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1cddc86e05
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armjit: Temporarily disable ext/ins as they appear to have broken Persona 3 somehow.
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2013-03-03 22:26:20 +01:00 |
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Henrik Rydgard
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650c02c3a5
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Some more armjit work (ext, ins) and VFPU prefix clamps (not enabled)
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2013-03-03 17:36:22 +01:00 |
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Henrik Rydgard
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3c640a0f1e
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armjit: seb and seh instructions
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2013-03-03 15:29:13 +01:00 |
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Unknown W. Brackets
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d647816d10
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Add CONDITIONAL_DISABLE to all armjit funcs.
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2013-03-03 01:40:55 -08:00 |
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Henrik Rydgard
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516ca8a0c4
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Merge branch 'master' into armjit-fpu
Conflicts:
Core/MIPS/ARM/ArmJit.h
Core/MIPS/x86/CompVFPU.cpp
GPU/GLES/Framebuffer.cpp
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2013-02-28 23:56:28 +01:00 |
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Henrik Rydgard
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28575d4672
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Fix the avoidLoad flag in the arm regalloc
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2013-02-28 23:45:47 +01:00 |
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Sacha
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35a57be115
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ARMJIT: Implement MADD, MADDU. Do bitrev if it takes an immediate. Fix a bug where MULTU was being passed through to the interpreter.
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2013-02-28 23:45:46 +01:00 |
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Sacha
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d3f7def328
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ARMJIT: min, max implementations.
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2013-03-01 02:17:39 +10:00 |
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Unknown W. Brackets
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4e8359bae2
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Fix Comp_ShiftType not using ROR.
Untested but looks right? Reported by @xsacha.
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2013-02-24 22:58:31 -08:00 |
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Unknown W. Brackets
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313ffdb495
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Add a stub for clz/clo in x86 jit.
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2013-02-21 01:25:02 -08:00 |
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Henrik Rydgard
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048cf35922
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More ARMJit FPU work - some instructions and optimizations.
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2013-02-14 00:02:09 +01:00 |
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Henrik Rydgard
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78923f5538
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Jit a little more (vfpu single load/store, transfer instructions)
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2013-02-10 12:14:55 +01:00 |
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Henrik Rydgard
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6d3c851d03
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armjit: Fix and enable sltiu, correct this time I think...
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2013-02-06 23:35:24 +01:00 |
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Henrik Rydgard
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d8f4e27926
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Rename ARMABI_MOVI2R to MOVI2R
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2013-01-31 23:41:05 +01:00 |
|
Henrik Rydgard
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d44a731991
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armjit: sltiu causes mysterious crashes, disable again.
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2013-01-30 21:46:06 +01:00 |
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Henrik Rydgard
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1b4394ac5e
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ARM jit: jit integer multiplies. ARM is so nice, very clean.
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2013-01-30 01:06:14 +01:00 |
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